newton_control
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No description provided (USE_CASE_0_ROI_2_ROI_TYPE) Register
Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register » No description provided (PWM_CTRL_0) Register » No description provided (PWM_CTRL_1) Register » No description provided (FSYNCCTRL) Register » No description provided (FSYNCSTATUS) Register » No description provided (FSYNCLSMODCNTR_0) Register » No description provided (FSYNCLSMODCNTR_1) Register » No description provided (FSYNCINTCNTR_0) Register » No description provided (FSYNCINTCNTR_1) Register » No description provided (FSYNCSYSCNTR_0) Register » No description provided (FSYNCSYSCNTR_1) Register » No description provided (GPRR16) Register » No description provided (GPRR17) Register » No description provided (GPRR18) Register » No description provided (GPRR19) Register » No description provided (GPRR20) Register » No description provided (GPRR21) Register » No description provided (GPRR22) Register » No description provided (GPRR23) Register » No description provided (GPRR24) Register » No description provided (GPRR25) Register » No description provided (GPRR26) Register » No description provided (GPRR27) Register » No description provided (GPRR28) Register » No description provided (GPRR29) Register » No description provided (GPRR30) Register » No description provided (GPRR31) Register » No description provided (ADC_CTRL0_S1) Register » No description provided (ADC_CTRL1_S1) Register » No description provided (ADC_CTRL2_S1) Register » No description provided (ADCPLL_CTRL0_S1) Register » No description provided (ADCPLL_CTRL1_S1) Register » No description provided (ADCPLL_CTRL2_S1) Register » No description provided (AMP_CTRL0_S1) Register » No description provided (AMP_CTRL1_S1) Register » No description provided (AMP_CTRL2_S1) Register » No description provided (CHIP_ID) Register » No description provided (CKGEN_CTRL) Register » No description provided (CKGEN_S1) Register » No description provided (CLK_CTRL) Register » No description provided (CLK_DE_CTRL_S1) Register » No description provided (CLK_LVDSTX_S1) Register » No description provided (CLKTREE0) Register » No description provided (CLKTREE_S1) Register » No description provided (DAC_CTRL1) Register » No description provided (DAC_CTRL2) Register » No description provided (DAC_CTRL0_S1) Register » No description provided (DAC_CTRL1_S1) Register » No description provided (DAC_CTRL2_S1) Register » No description provided (DAC_CTRL3_S1) Register » No description provided (DAC_DATA) Register » No description provided (IPDA_CTRL_S1) Register » No description provided (LS_LVDSTX_S1) Register » No description provided (LSCTRL0_S1) Register » No description provided (LSMOD_EN) Register » No description provided (ROW_CTRL) Register » No description provided (PLL_CTRL) Register » No description provided (PLL_STATUS) Register » No description provided (POWER_DOWN_0) Register » No description provided (POWER_DOWN_ADC_OTHERS) Register » No description provided (POWER_DOWN_READOUT) Register » No description provided (PUMP_S1) Register » No description provided (READOUT_S1) Register » No description provided (REGIF_CTRL) Register » No description provided (REGIF_RDATA) Register » No description provided (SSPLL_CTRL0_S1) Register » No description provided (SSPLL_CTRL1_S1) Register » No description provided (SSPLL_CTRL2_S1) Register » No description provided (SYSPLL_CTRL0_S1) Register » No description provided (SYSPLL_CTRL1_S1) Register » No description provided (SYSPLL_CTRL2_S1) Register » No description provided (ANA_TEST_MUX_S1) Register » No description provided (TS_CTRL_S1) Register » No description provided (TS_CTRL) Register » No description provided (TS_DATA) Register » No description provided (VLOWENABLE) Register » No description provided (VLOWREGCTRL0_S2) Register » No description provided (VLOWREGCTRL1_S2) Register » No description provided (VLOWREGCTRL2_S2) Register » No description provided (VLOWREGCTRL3_S2) Register » No description provided (VLOWREGCTRL4_S2) Register » No description provided (VLOWSHOCTRL1) Register » No description provided (VLOWSHOCTRL2) Register » No description provided (VLOWSHOCTRL3) Register » No description provided (VLOWSHODETECT) Register » No description provided (XOSC_CTRL) Register » No description provided (CHAIN1_LEN) Register » No description provided (CHAIN2_LEN) Register » No description provided (SSPLL_CTRL3_S1) Register » No description provided (PIXEL_BIAS) Register » No description provided (DLL_CONTROL) Register » No description provided (ANA_SPARE_0) Register » No description provided (ANA_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_0) Register » No description provided (ANA_SERIAL_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_2) Register » No description provided (DEBUG_MUX_CONTROL_REG) Register » No description provided (SCRATCHPAD_0_) Register » No description provided (CLKGEN_CK1) Register » No description provided (CLKGEN_CK2) Register » No description provided (CLKGEN_CK1REF) Register » No description provided (CLKGEN_CK2REF) Register » No description provided (CLKGEN_L1) Register » No description provided (CLKGEN_L2) Register » No description provided (CLKGEN_CKX) Register » No description provided (CLKGEN_CYCLE) Register » No description provided (CLKGEN_OFFSET) Register » No description provided (CLKGEN_LTOFFSET) Register » No description provided (CLKGEN_BURST_PERIOD) Register » Control Register 0 (CTRLR0) Register » Control Register 1 (CTRLR1) Register » SSI Enable Register (SSIENR) Register » Microwire Control Register (MWCR) Register » Slave Enable Register (SER) Register » Baud Rate Select (BAUDR) Register » Transmit FIFO Threshold Level (TXFTLR) Register » Receive FIFO Threshold Level (RXFTLR) Register » Transmit FIFO Level Register (TXFLR) Register » Receive FIFO Level Register (RXFLR) Register » Status Register (SR) Register » Interrupt Mask Register (IMR) Register » Interrupt Status Register (ISR) Register » Raw Interrupt Status Register (RISR) Register » Transmit FIFO Overflow Interrupt Clear Register Register (TXOICR) Register » Receive FIFO Overflow Interrupt Clear Register (RXOICR) Register » Receive FIFO Underflow Interrupt Clear Register (RXUICR) Register » Multi-Master Interrupt Clear Register (MSTICR) Register » Interrupt Clear Register (ICR) Register » Identification Register (IDR) Register » Core Kit version ID Register (SSI_VERSION_ID) Register » DW_apb_ssi Data Register (DR0) Register » No description provided (CSI2_TX_BASE_CFG_NUM_LANES) Register » No description provided (CSI2_TX_BASE_CFG_T_PRE) Register » No description provided (CSI2_TX_BASE_CFG_T_POST) Register » No description provided (CSI2_TX_BASE_CFG_TX_GAP) Register » No description provided (CSI2_TX_BASE_CFG_T_CLK_GAP) Register » No description provided (CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK) Register » No description provided (CSI2_TX_BASE_CFG_TWAKEUP) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ACTIVE) Register » No description provided (CSI2_TX_BASE_ULPS_ACTIVE) Register » No description provided (CSI2_TX_BASE_IRQ_STATUS) Register » No description provided (CSI2_TX_BASE_IRQ_ENABLE) Register » No description provided (CSI2_TX_BASE_CSI2TX_IRQ_CLR) Register » No description provided (CSI2_TX_BASE_CFG_CLK_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_DATA_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_CPHY_EN) Register » No description provided (CSI2_TX_BASE_CFG_PPI_16_EN) Register » No description provided (CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN) Register » No description provided (CSI2_TX_BASE_CFG_VCX_EN) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1) Register » Power Control Register (PWR_CTRL) Register » Program status register (STATUS) Register » Error location (ERR_LOCATION) Register » Timing Configuration (TIMING) Register » Characterization Options (CHARACTERIZATION) Register » Blank Check Register (BLANK_CHECK) Register » No description provided (LPSCTRL) Register » No description provided (LPSWAVEFREQ) Register » No description provided (LPSWAVEGENACC) Register » No description provided (LPSRAMADDR) Register » No description provided (LPSRAMRDCMD) Register » No description provided (LPSWAVEGENADDR) Register » No description provided (LPSMARGIN) Register » No description provided (LPSDBG) Register » No description provided (LPSRAMDATA) Register » No description provided (LPSRAMDATA_ALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register » No description provided (PWM_CTRL_0) Register » No description provided (PWM_CTRL_1) Register » No description provided (FSYNCCTRL) Register » No description provided (FSYNCSTATUS) Register » No description provided (FSYNCLSMODCNTR_0) Register » No description provided (FSYNCLSMODCNTR_1) Register » No description provided (FSYNCINTCNTR_0) Register » No description provided (FSYNCINTCNTR_1) Register » No description provided (FSYNCSYSCNTR_0) Register » No description provided (FSYNCSYSCNTR_1) Register » No description provided (GPRR16) Register » No description provided (GPRR17) Register » No description provided (GPRR18) Register » No description provided (GPRR19) Register » No description provided (GPRR20) Register » No description provided (GPRR21) Register » No description provided (GPRR22) Register » No description provided (GPRR23) Register » No description provided (GPRR24) Register » No description provided (GPRR25) Register » No description provided (GPRR26) Register » No description provided (GPRR27) Register » No description provided (GPRR28) Register » No description provided (GPRR29) Register » No description provided (GPRR30) Register » No description provided (GPRR31) Register » No description provided (ADC_CTRL0_S1) Register » No description provided (ADC_CTRL1_S1) Register » No description provided (ADC_CTRL2_S1) Register » No description provided (ADCPLL_CTRL0_S1) Register » No description provided (ADCPLL_CTRL1_S1) Register » No description provided (ADCPLL_CTRL2_S1) Register » No description provided (AMP_CTRL0_S1) Register » No description provided (AMP_CTRL1_S1) Register » No description provided (AMP_CTRL2_S1) Register » No description provided (CHIP_ID) Register » No description provided (CKGEN_CTRL) Register » No description provided (CKGEN_S1) Register » No description provided (CLK_CTRL) Register » No description provided (CLK_DE_CTRL_S1) Register » No description provided (CLK_LVDSTX_S1) Register » No description provided (CLKTREE0) Register » No description provided (CLKTREE_S1) Register » No description provided (DAC_CTRL1) Register » No description provided (DAC_CTRL2) Register » No description provided (DAC_CTRL0_S1) Register » No description provided (DAC_CTRL1_S1) Register » No description provided (DAC_CTRL2_S1) Register » No description provided (DAC_CTRL3_S1) Register » No description provided (DAC_DATA) Register » No description provided (IPDA_CTRL_S1) Register » No description provided (LS_LVDSTX_S1) Register » No description provided (LSCTRL0_S1) Register » No description provided (LSMOD_EN) Register » No description provided (ROW_CTRL) Register » No description provided (PLL_CTRL) Register » No description provided (PLL_STATUS) Register » No description provided (POWER_DOWN_0) Register » No description provided (POWER_DOWN_ADC_OTHERS) Register » No description provided (POWER_DOWN_READOUT) Register » No description provided (PUMP_S1) Register » No description provided (READOUT_S1) Register » No description provided (REGIF_CTRL) Register » No description provided (REGIF_RDATA) Register » No description provided (SSPLL_CTRL0_S1) Register » No description provided (SSPLL_CTRL1_S1) Register » No description provided (SSPLL_CTRL2_S1) Register » No description provided (SYSPLL_CTRL0_S1) Register » No description provided (SYSPLL_CTRL1_S1) Register » No description provided (SYSPLL_CTRL2_S1) Register » No description provided (ANA_TEST_MUX_S1) Register » No description provided (TS_CTRL_S1) Register » No description provided (TS_CTRL) Register » No description provided (TS_DATA) Register » No description provided (VLOWENABLE) Register » No description provided (VLOWREGCTRL0_S2) Register » No description provided (VLOWREGCTRL1_S2) Register » No description provided (VLOWREGCTRL2_S2) Register » No description provided (VLOWREGCTRL3_S2) Register » No description provided (VLOWREGCTRL4_S2) Register » No description provided (VLOWSHOCTRL1) Register » No description provided (VLOWSHOCTRL2) Register » No description provided (VLOWSHOCTRL3) Register » No description provided (VLOWSHODETECT) Register » No description provided (XOSC_CTRL) Register » No description provided (CHAIN1_LEN) Register » No description provided (CHAIN2_LEN) Register » No description provided (SSPLL_CTRL3_S1) Register » No description provided (PIXEL_BIAS) Register » No description provided (DLL_CONTROL) Register » No description provided (ANA_SPARE_0) Register » No description provided (ANA_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_0) Register » No description provided (ANA_SERIAL_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_2) Register » No description provided (DEBUG_MUX_CONTROL_REG) Register » No description provided (SCRATCHPAD_0_) Register » No description provided (CLKGEN_CK1) Register » No description provided (CLKGEN_CK2) Register » No description provided (CLKGEN_CK1REF) Register » No description provided (CLKGEN_CK2REF) Register » No description provided (CLKGEN_L1) Register » No description provided (CLKGEN_L2) Register » No description provided (CLKGEN_CKX) Register » No description provided (CLKGEN_CYCLE) Register » No description provided (CLKGEN_OFFSET) Register » No description provided (CLKGEN_LTOFFSET) Register » No description provided (CLKGEN_BURST_PERIOD) Register » Control Register 0 (CTRLR0) Register » Control Register 1 (CTRLR1) Register » SSI Enable Register (SSIENR) Register » Microwire Control Register (MWCR) Register » Slave Enable Register (SER) Register » Baud Rate Select (BAUDR) Register » Transmit FIFO Threshold Level (TXFTLR) Register » Receive FIFO Threshold Level (RXFTLR) Register » Transmit FIFO Level Register (TXFLR) Register » Receive FIFO Level Register (RXFLR) Register » Status Register (SR) Register » Interrupt Mask Register (IMR) Register » Interrupt Status Register (ISR) Register » Raw Interrupt Status Register (RISR) Register » Transmit FIFO Overflow Interrupt Clear Register Register (TXOICR) Register » Receive FIFO Overflow Interrupt Clear Register (RXOICR) Register » Receive FIFO Underflow Interrupt Clear Register (RXUICR) Register » Multi-Master Interrupt Clear Register (MSTICR) Register » Interrupt Clear Register (ICR) Register » Identification Register (IDR) Register » Core Kit version ID Register (SSI_VERSION_ID) Register » DW_apb_ssi Data Register (DR0) Register » No description provided (CSI2_TX_BASE_CFG_NUM_LANES) Register » No description provided (CSI2_TX_BASE_CFG_T_PRE) Register » No description provided (CSI2_TX_BASE_CFG_T_POST) Register » No description provided (CSI2_TX_BASE_CFG_TX_GAP) Register » No description provided (CSI2_TX_BASE_CFG_T_CLK_GAP) Register » No description provided (CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK) Register » No description provided (CSI2_TX_BASE_CFG_TWAKEUP) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ACTIVE) Register » No description provided (CSI2_TX_BASE_ULPS_ACTIVE) Register » No description provided (CSI2_TX_BASE_IRQ_STATUS) Register » No description provided (CSI2_TX_BASE_IRQ_ENABLE) Register » No description provided (CSI2_TX_BASE_CSI2TX_IRQ_CLR) Register » No description provided (CSI2_TX_BASE_CFG_CLK_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_DATA_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_CPHY_EN) Register » No description provided (CSI2_TX_BASE_CFG_PPI_16_EN) Register » No description provided (CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN) Register » No description provided (CSI2_TX_BASE_CFG_VCX_EN) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1) Register » Power Control Register (PWR_CTRL) Register » Program status register (STATUS) Register » Error location (ERR_LOCATION) Register » Timing Configuration (TIMING) Register » Characterization Options (CHARACTERIZATION) Register » Blank Check Register (BLANK_CHECK) Register » No description provided (LPSCTRL) Register » No description provided (LPSWAVEFREQ) Register » No description provided (LPSWAVEGENACC) Register » No description provided (LPSRAMADDR) Register » No description provided (LPSRAMRDCMD) Register » No description provided (LPSWAVEGENADDR) Register » No description provided (LPSMARGIN) Register » No description provided (LPSDBG) Register » No description provided (LPSRAMDATA) Register » No description provided (LPSRAMDATA_ALIAS) Register » No description provided (SSWAVEFREQ) Register » No description provided (SSWAVEPERIOD) Register » No description provided (SSWAVEAMP) Register » No description provided (SSPINLO) Register » No description provided (SSPINHI) Register » No description provided (SSINTERVLO) Register » No description provided (SSINTERVHI) Register » No description provided (SSWAVEOFFSET) Register » No description provided (SSCTRL) Register » No description provided (SSMODFREQ) Register » No description provided (SSMODAMP) Register » No description provided (SSINTERV_10) Register » No description provided (SSINTERV_11) Register » No description provided (SSINTERV_20) Register » No description provided (SSINTERV_21) Register » No description provided (SSINTERV_30) Register » No description provided (SSINTERV_31) Register » No description provided (SSVALUE_00) Register » No description provided (SSVALUE_01) Register » No description provided (SSVALUE_10) Register » No description provided (SSVALUE_11) Register » No description provided (SSVALUE_20) Register » No description provided (SSVALUE_21) Register » No description provided (SSVALUE_30) Register » No description provided (SSVALUE_31) Register » No description provided (SSDBG) Register » No description provided (PCMCTRL_0) Register » No description provided (PCMCTRL_1) Register » No description provided (PCMOUT) Register » No description provided (OSC_PERIOD_CTRL) Register » No description provided (OSC_PERIOD_RD) Register » No description provided (CORRECTION_CONFIG) Register » No description provided (USE_CASE_FRAME_CONFIG) Register » No description provided (USE_CASE_MIPI_PACKET_CONTROL) Register » No description provided (GAIN0) Register » No description provided (GAIN1) Register » No description provided (GAIN2) Register » No description provided (GAIN3) Register » No description provided (PARITY_GAIN_MEM) Register » No description provided (PARITY_LINE_MEM) Register » No description provided (PP_LFSR) Register » No description provided (PP_DECODE_ST_1) Register » No description provided (PP_DECODE_ST_2) Register » No description provided (PP_ENCODE_ST) Register » No description provided (PP_ENCODE_GT) Register » No description provided (DBG_MUX) Register » No description provided (GAIN_MARGIN_CONTROL) Register » No description provided (LINE_MARGIN_CONTROL) Register » No description provided (ROI_ROW_START) Register » No description provided (ROI_HEIGHT) Register » No description provided (ROI_COLUMN_START) Register » No description provided (ROI_WIDTH) Register » No description provided (PP_USEQ_WRITE) Register » No description provided (PP_ADC_DELAY) Register » No description provided (MIPI_BUFF_MARGIN_CONTROL) Register » No description provided (MIPI_HEADER_WIDTH) Register » No description provided (FRAME_NUMBER) Register » No description provided (MICRO_SEQUENCER_FW_VERSION_LSB) Register » No description provided (MICRO_SEQUENCER_FW_VERSION_MSB) Register » No description provided (TS_CAL_VER) Register » No description provided (ADC_CAL_VER) Register » No description provided (REG_0) Register » No description provided (REG_1) Register » No description provided (REG_2) Register » No description provided (REG_3) Register » No description provided (REG_4) Register » No description provided (REG_5) Register » No description provided (REG_6) Register » No description provided (REG_7) Register » No description provided (PARITY_MIPI_BUFFER) Register » No description provided (PACKET_COUNT) Register » No description provided (PACKETS_PER_FRAME) Register » No description provided (ROW_VECTOR) Register » No description provided (ROWS_PER_PACKET_OUT) Register » No description provided (MIPI_RD_EN_MAX) Register » No description provided (ANALOG_SS) Register » No description provided (MIPI_BUFF_PARITY_ERR_CNT) Register » No description provided (LINE_MEM_PARITY_ERR_CNT) Register » No description provided (GAIN_MEM_PARITY_ERR_CNT) Register » No description provided (IA_SELECT) Register » No description provided (IA_ADDR_REG) Register » No description provided (IA_WRDATA_REG) Register » No description provided (IA_WRDATA_REG_ALIAS) Register » No description provided (IA_RDDATA_REG) Register » No description provided (IA_RDDATA_REG_ALIAS) Register » No description provided (IA_BANK_sYPE) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register » No description provided (PWM_CTRL_0) Register » No description provided (PWM_CTRL_1) Register » No description provided (FSYNCCTRL) Register » No description provided (FSYNCSTATUS) Register » No description provided (FSYNCLSMODCNTR_0) Register » No description provided (FSYNCLSMODCNTR_1) Register » No description provided (FSYNCINTCNTR_0) Register » No description provided (FSYNCINTCNTR_1) Register » No description provided (FSYNCSYSCNTR_0) Register » No description provided (FSYNCSYSCNTR_1) Register » No description provided (GPRR16) Register » No description provided (GPRR17) Register » No description provided (GPRR18) Register » No description provided (GPRR19) Register » No description provided (GPRR20) Register » No description provided (GPRR21) Register » No description provided (GPRR22) Register » No description provided (GPRR23) Register » No description provided (GPRR24) Register » No description provided (GPRR25) Register » No description provided (GPRR26) Register » No description provided (GPRR27) Register » No description provided (GPRR28) Register » No description provided (GPRR29) Register » No description provided (GPRR30) Register » No description provided (GPRR31) Register » No description provided (ADC_CTRL0_S1) Register » No description provided (ADC_CTRL1_S1) Register » No description provided (ADC_CTRL2_S1) Register » No description provided (ADCPLL_CTRL0_S1) Register » No description provided (ADCPLL_CTRL1_S1) Register » No description provided (ADCPLL_CTRL2_S1) Register » No description provided (AMP_CTRL0_S1) Register » No description provided (AMP_CTRL1_S1) Register » No description provided (AMP_CTRL2_S1) Register » No description provided (CHIP_ID) Register » No description provided (CKGEN_CTRL) Register » No description provided (CKGEN_S1) Register » No description provided (CLK_CTRL) Register » No description provided (CLK_DE_CTRL_S1) Register » No description provided (CLK_LVDSTX_S1) Register » No description provided (CLKTREE0) Register » No description provided (CLKTREE_S1) Register » No description provided (DAC_CTRL1) Register » No description provided (DAC_CTRL2) Register » No description provided (DAC_CTRL0_S1) Register » No description provided (DAC_CTRL1_S1) Register » No description provided (DAC_CTRL2_S1) Register » No description provided (DAC_CTRL3_S1) Register » No description provided (DAC_DATA) Register » No description provided (IPDA_CTRL_S1) Register » No description provided (LS_LVDSTX_S1) Register » No description provided (LSCTRL0_S1) Register » No description provided (LSMOD_EN) Register » No description provided (ROW_CTRL) Register » No description provided (PLL_CTRL) Register » No description provided (PLL_STATUS) Register » No description provided (POWER_DOWN_0) Register » No description provided (POWER_DOWN_ADC_OTHERS) Register » No description provided (POWER_DOWN_READOUT) Register » No description provided (PUMP_S1) Register » No description provided (READOUT_S1) Register » No description provided (REGIF_CTRL) Register » No description provided (REGIF_RDATA) Register » No description provided (SSPLL_CTRL0_S1) Register » No description provided (SSPLL_CTRL1_S1) Register » No description provided (SSPLL_CTRL2_S1) Register » No description provided (SYSPLL_CTRL0_S1) Register » No description provided (SYSPLL_CTRL1_S1) Register » No description provided (SYSPLL_CTRL2_S1) Register » No description provided (ANA_TEST_MUX_S1) Register » No description provided (TS_CTRL_S1) Register » No description provided (TS_CTRL) Register » No description provided (TS_DATA) Register » No description provided (VLOWENABLE) Register » No description provided (VLOWREGCTRL0_S2) Register » No description provided (VLOWREGCTRL1_S2) Register » No description provided (VLOWREGCTRL2_S2) Register » No description provided (VLOWREGCTRL3_S2) Register » No description provided (VLOWREGCTRL4_S2) Register » No description provided (VLOWSHOCTRL1) Register » No description provided (VLOWSHOCTRL2) Register » No description provided (VLOWSHOCTRL3) Register » No description provided (VLOWSHODETECT) Register » No description provided (XOSC_CTRL) Register » No description provided (CHAIN1_LEN) Register » No description provided (CHAIN2_LEN) Register » No description provided (SSPLL_CTRL3_S1) Register » No description provided (PIXEL_BIAS) Register » No description provided (DLL_CONTROL) Register » No description provided (ANA_SPARE_0) Register » No description provided (ANA_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_0) Register » No description provided (ANA_SERIAL_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_2) Register » No description provided (DEBUG_MUX_CONTROL_REG) Register » No description provided (SCRATCHPAD_0_) Register » No description provided (CLKGEN_CK1) Register » No description provided (CLKGEN_CK2) Register » No description provided (CLKGEN_CK1REF) Register » No description provided (CLKGEN_CK2REF) Register » No description provided (CLKGEN_L1) Register » No description provided (CLKGEN_L2) Register » No description provided (CLKGEN_CKX) Register » No description provided (CLKGEN_CYCLE) Register » No description provided (CLKGEN_OFFSET) Register » No description provided (CLKGEN_LTOFFSET) Register » No description provided (CLKGEN_BURST_PERIOD) Register » Control Register 0 (CTRLR0) Register » Control Register 1 (CTRLR1) Register » SSI Enable Register (SSIENR) Register » Microwire Control Register (MWCR) Register » Slave Enable Register (SER) Register » Baud Rate Select (BAUDR) Register » Transmit FIFO Threshold Level (TXFTLR) Register » Receive FIFO Threshold Level (RXFTLR) Register » Transmit FIFO Level Register (TXFLR) Register » Receive FIFO Level Register (RXFLR) Register » Status Register (SR) Register » Interrupt Mask Register (IMR) Register » Interrupt Status Register (ISR) Register » Raw Interrupt Status Register (RISR) Register » Transmit FIFO Overflow Interrupt Clear Register Register (TXOICR) Register » Receive FIFO Overflow Interrupt Clear Register (RXOICR) Register » Receive FIFO Underflow Interrupt Clear Register (RXUICR) Register » Multi-Master Interrupt Clear Register (MSTICR) Register » Interrupt Clear Register (ICR) Register » Identification Register (IDR) Register » Core Kit version ID Register (SSI_VERSION_ID) Register » DW_apb_ssi Data Register (DR0) Register » No description provided (CSI2_TX_BASE_CFG_NUM_LANES) Register » No description provided (CSI2_TX_BASE_CFG_T_PRE) Register » No description provided (CSI2_TX_BASE_CFG_T_POST) Register » No description provided (CSI2_TX_BASE_CFG_TX_GAP) Register » No description provided (CSI2_TX_BASE_CFG_T_CLK_GAP) Register » No description provided (CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK) Register » No description provided (CSI2_TX_BASE_CFG_TWAKEUP) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ACTIVE) Register » No description provided (CSI2_TX_BASE_ULPS_ACTIVE) Register » No description provided (CSI2_TX_BASE_IRQ_STATUS) Register » No description provided (CSI2_TX_BASE_IRQ_ENABLE) Register » No description provided (CSI2_TX_BASE_CSI2TX_IRQ_CLR) Register » No description provided (CSI2_TX_BASE_CFG_CLK_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_DATA_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_CPHY_EN) Register » No description provided (CSI2_TX_BASE_CFG_PPI_16_EN) Register » No description provided (CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN) Register » No description provided (CSI2_TX_BASE_CFG_VCX_EN) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1) Register » Power Control Register (PWR_CTRL) Register » Program status register (STATUS) Register » Error location (ERR_LOCATION) Register » Timing Configuration (TIMING) Register » Characterization Options (CHARACTERIZATION) Register » Blank Check Register (BLANK_CHECK) Register » No description provided (LPSCTRL) Register » No description provided (LPSWAVEFREQ) Register » No description provided (LPSWAVEGENACC) Register » No description provided (LPSRAMADDR) Register » No description provided (LPSRAMRDCMD) Register » No description provided (LPSWAVEGENADDR) Register » No description provided (LPSMARGIN) Register » No description provided (LPSDBG) Register » No description provided (LPSRAMDATA) Register » No description provided (LPSRAMDATA_ALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register » No description provided (PWM_CTRL_0) Register » No description provided (PWM_CTRL_1) Register » No description provided (FSYNCCTRL) Register » No description provided (FSYNCSTATUS) Register » No description provided (FSYNCLSMODCNTR_0) Register » No description provided (FSYNCLSMODCNTR_1) Register » No description provided (FSYNCINTCNTR_0) Register » No description provided (FSYNCINTCNTR_1) Register » No description provided (FSYNCSYSCNTR_0) Register » No description provided (FSYNCSYSCNTR_1) Register » No description provided (GPRR16) Register » No description provided (GPRR17) Register » No description provided (GPRR18) Register » No description provided (GPRR19) Register » No description provided (GPRR20) Register » No description provided (GPRR21) Register » No description provided (GPRR22) Register » No description provided (GPRR23) Register » No description provided (GPRR24) Register » No description provided (GPRR25) Register » No description provided (GPRR26) Register » No description provided (GPRR27) Register » No description provided (GPRR28) Register » No description provided (GPRR29) Register » No description provided (GPRR30) Register » No description provided (GPRR31) Register » No description provided (ADC_CTRL0_S1) Register » No description provided (ADC_CTRL1_S1) Register » No description provided (ADC_CTRL2_S1) Register » No description provided (ADCPLL_CTRL0_S1) Register » No description provided (ADCPLL_CTRL1_S1) Register » No description provided (ADCPLL_CTRL2_S1) Register » No description provided (AMP_CTRL0_S1) Register » No description provided (AMP_CTRL1_S1) Register » No description provided (AMP_CTRL2_S1) Register » No description provided (CHIP_ID) Register » No description provided (CKGEN_CTRL) Register » No description provided (CKGEN_S1) Register » No description provided (CLK_CTRL) Register » No description provided (CLK_DE_CTRL_S1) Register » No description provided (CLK_LVDSTX_S1) Register » No description provided (CLKTREE0) Register » No description provided (CLKTREE_S1) Register » No description provided (DAC_CTRL1) Register » No description provided (DAC_CTRL2) Register » No description provided (DAC_CTRL0_S1) Register » No description provided (DAC_CTRL1_S1) Register » No description provided (DAC_CTRL2_S1) Register » No description provided (DAC_CTRL3_S1) Register » No description provided (DAC_DATA) Register » No description provided (IPDA_CTRL_S1) Register » No description provided (LS_LVDSTX_S1) Register » No description provided (LSCTRL0_S1) Register » No description provided (LSMOD_EN) Register » No description provided (ROW_CTRL) Register » No description provided (PLL_CTRL) Register » No description provided (PLL_STATUS) Register » No description provided (POWER_DOWN_0) Register » No description provided (POWER_DOWN_ADC_OTHERS) Register » No description provided (POWER_DOWN_READOUT) Register » No description provided (PUMP_S1) Register » No description provided (READOUT_S1) Register » No description provided (REGIF_CTRL) Register » No description provided (REGIF_RDATA) Register » No description provided (SSPLL_CTRL0_S1) Register » No description provided (SSPLL_CTRL1_S1) Register » No description provided (SSPLL_CTRL2_S1) Register » No description provided (SYSPLL_CTRL0_S1) Register » No description provided (SYSPLL_CTRL1_S1) Register » No description provided (SYSPLL_CTRL2_S1) Register » No description provided (ANA_TEST_MUX_S1) Register » No description provided (TS_CTRL_S1) Register » No description provided (TS_CTRL) Register » No description provided (TS_DATA) Register » No description provided (VLOWENABLE) Register » No description provided (VLOWREGCTRL0_S2) Register » No description provided (VLOWREGCTRL1_S2) Register » No description provided (VLOWREGCTRL2_S2) Register » No description provided (VLOWREGCTRL3_S2) Register » No description provided (VLOWREGCTRL4_S2) Register » No description provided (VLOWSHOCTRL1) Register » No description provided (VLOWSHOCTRL2) Register » No description provided (VLOWSHOCTRL3) Register » No description provided (VLOWSHODETECT) Register » No description provided (XOSC_CTRL) Register » No description provided (CHAIN1_LEN) Register » No description provided (CHAIN2_LEN) Register » No description provided (SSPLL_CTRL3_S1) Register » No description provided (PIXEL_BIAS) Register » No description provided (DLL_CONTROL) Register » No description provided (ANA_SPARE_0) Register » No description provided (ANA_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_0) Register » No description provided (ANA_SERIAL_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_2) Register » No description provided (DEBUG_MUX_CONTROL_REG) Register » No description provided (SCRATCHPAD_0_) Register » No description provided (CLKGEN_CK1) Register » No description provided (CLKGEN_CK2) Register » No description provided (CLKGEN_CK1REF) Register » No description provided (CLKGEN_CK2REF) Register » No description provided (CLKGEN_L1) Register » No description provided (CLKGEN_L2) Register » No description provided (CLKGEN_CKX) Register » No description provided (CLKGEN_CYCLE) Register » No description provided (CLKGEN_OFFSET) Register » No description provided (CLKGEN_LTOFFSET) Register » No description provided (CLKGEN_BURST_PERIOD) Register » Control Register 0 (CTRLR0) Register » Control Register 1 (CTRLR1) Register » SSI Enable Register (SSIENR) Register » Microwire Control Register (MWCR) Register » Slave Enable Register (SER) Register » Baud Rate Select (BAUDR) Register » Transmit FIFO Threshold Level (TXFTLR) Register » Receive FIFO Threshold Level (RXFTLR) Register » Transmit FIFO Level Register (TXFLR) Register » Receive FIFO Level Register (RXFLR) Register » Status Register (SR) Register » Interrupt Mask Register (IMR) Register » Interrupt Status Register (ISR) Register » Raw Interrupt Status Register (RISR) Register » Transmit FIFO Overflow Interrupt Clear Register Register (TXOICR) Register » Receive FIFO Overflow Interrupt Clear Register (RXOICR) Register » Receive FIFO Underflow Interrupt Clear Register (RXUICR) Register » Multi-Master Interrupt Clear Register (MSTICR) Register » Interrupt Clear Register (ICR) Register » Identification Register (IDR) Register » Core Kit version ID Register (SSI_VERSION_ID) Register » DW_apb_ssi Data Register (DR0) Register » No description provided (CSI2_TX_BASE_CFG_NUM_LANES) Register » No description provided (CSI2_TX_BASE_CFG_T_PRE) Register » No description provided (CSI2_TX_BASE_CFG_T_POST) Register » No description provided (CSI2_TX_BASE_CFG_TX_GAP) Register » No description provided (CSI2_TX_BASE_CFG_T_CLK_GAP) Register » No description provided (CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK) Register » No description provided (CSI2_TX_BASE_CFG_TWAKEUP) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ACTIVE) Register » No description provided (CSI2_TX_BASE_ULPS_ACTIVE) Register » No description provided (CSI2_TX_BASE_IRQ_STATUS) Register » No description provided (CSI2_TX_BASE_IRQ_ENABLE) Register » No description provided (CSI2_TX_BASE_CSI2TX_IRQ_CLR) Register » No description provided (CSI2_TX_BASE_CFG_CLK_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_DATA_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_CPHY_EN) Register » No description provided (CSI2_TX_BASE_CFG_PPI_16_EN) Register » No description provided (CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN) Register » No description provided (CSI2_TX_BASE_CFG_VCX_EN) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1) Register » Power Control Register (PWR_CTRL) Register » Program status register (STATUS) Register » Error location (ERR_LOCATION) Register » Timing Configuration (TIMING) Register » Characterization Options (CHARACTERIZATION) Register » Blank Check Register (BLANK_CHECK) Register » No description provided (LPSCTRL) Register » No description provided (LPSWAVEFREQ) Register » No description provided (LPSWAVEGENACC) Register » No description provided (LPSRAMADDR) Register » No description provided (LPSRAMRDCMD) Register » No description provided (LPSWAVEGENADDR) Register » No description provided (LPSMARGIN) Register » No description provided (LPSDBG) Register » No description provided (LPSRAMDATA) Register » No description provided (LPSRAMDATA_ALIAS) Register » No description provided (SSWAVEFREQ) Register » No description provided (SSWAVEPERIOD) Register » No description provided (SSWAVEAMP) Register » No description provided (SSPINLO) Register » No description provided (SSPINHI) Register » No description provided (SSINTERVLO) Register » No description provided (SSINTERVHI) Register » No description provided (SSWAVEOFFSET) Register » No description provided (SSCTRL) Register » No description provided (SSMODFREQ) Register » No description provided (SSMODAMP) Register » No description provided (SSINTERV_10) Register » No description provided (SSINTERV_11) Register » No description provided (SSINTERV_20) Register » No description provided (SSINTERV_21) Register » No description provided (SSINTERV_30) Register » No description provided (SSINTERV_31) Register » No description provided (SSVALUE_00) Register » No description provided (SSVALUE_01) Register » No description provided (SSVALUE_10) Register » No description provided (SSVALUE_11) Register » No description provided (SSVALUE_20) Register » No description provided (SSVALUE_21) Register » No description provided (SSVALUE_30) Register » No description provided (SSVALUE_31) Register » No description provided (SSDBG) Register » No description provided (PCMCTRL_0) Register » No description provided (PCMCTRL_1) Register » No description provided (PCMOUT) Register » No description provided (OSC_PERIOD_CTRL) Register » No description provided (OSC_PERIOD_RD) Register » No description provided (CORRECTION_CONFIG) Register » No description provided (USE_CASE_FRAME_CONFIG) Register » No description provided (USE_CASE_MIPI_PACKET_CONTROL) Register » No description provided (GAIN0) Register » No description provided (GAIN1) Register » No description provided (GAIN2) Register » No description provided (GAIN3) Register » No description provided (PARITY_GAIN_MEM) Register » No description provided (PARITY_LINE_MEM) Register » No description provided (PP_LFSR) Register » No description provided (PP_DECODE_ST_1) Register » No description provided (PP_DECODE_ST_2) Register » No description provided (PP_ENCODE_ST) Register » No description provided (PP_ENCODE_GT) Register » No description provided (DBG_MUX) Register » No description provided (GAIN_MARGIN_CONTROL) Register » No description provided (LINE_MARGIN_CONTROL) Register » No description provided (ROI_ROW_START) Register » No description provided (ROI_HEIGHT) Register » No description provided (ROI_COLUMN_START) Register » No description provided (ROI_WIDTH) Register » No description provided (PP_USEQ_WRITE) Register » No description provided (PP_ADC_DELAY) Register » No description provided (MIPI_BUFF_MARGIN_CONTROL) Register » No description provided (MIPI_HEADER_WIDTH) Register » No description provided (FRAME_NUMBER) Register » No description provided (MICRO_SEQUENCER_FW_VERSION_LSB) Register » No description provided (MICRO_SEQUENCER_FW_VERSION_MSB) Register » No description provided (TS_CAL_VER) Register » No description provided (ADC_CAL_VER) Register » No description provided (REG_0) Register » No description provided (REG_1) Register » No description provided (REG_2) Register » No description provided (REG_3) Register » No description provided (REG_4) Register » No description provided (REG_5) Register » No description provided (REG_6) Register » No description provided (REG_7) Register » No description provided (PARITY_MIPI_BUFFER) Register » No description provided (PACKET_COUNT) Register » No description provided (PACKETS_PER_FRAME) Register » No description provided (ROW_VECTOR) Register » No description provided (ROWS_PER_PACKET_OUT) Register » No description provided (MIPI_RD_EN_MAX) Register » No description provided (ANALOG_SS) Register » No description provided (MIPI_BUFF_PARITY_ERR_CNT) Register » No description provided (LINE_MEM_PARITY_ERR_CNT) Register » No description provided (GAIN_MEM_PARITY_ERR_CNT) Register » No description provided (IA_SELECT) Register » No description provided (IA_ADDR_REG) Register » No description provided (IA_WRDATA_REG) Register » No description provided (IA_WRDATA_REG_ALIAS) Register » No description provided (IA_RDDATA_REG) Register » No description provided (IA_RDDATA_REG_ALIAS) Register » No description provided (IA_BANK_TYPE) Register » No description provided (PARITY_COUNT) Register » No description provided (INTERRUPT) Register » No description provided (MIPI_SKEW_CAL) Register » No description provided (MIPI_ESC_CLK_DIV) Register » No description provided (DE_CONTROL) Register » No description provided (BINNED1X2_REPEAT_COUNT) Register » No description provided (OVERRIDE_DATA_REG1) Register » No description provided (OVERRIDE_DATA_REG2) Register » No description provided (OVERRIDE_DATA_REG3) Register » No description provided (BINNED1X2_END) Register » No description provided (OVERRIDE_SEL_REG1) Register » No description provided (OVERRIDE_SEL_REG2) Register » No description provided (OVERRIDE_SEL_REG3) Register » No description provided (BINNED1X2_START) Register » No description provided (AMP_MUX_SEL_EE_LOW) Register » No description provided (AMP_MUX_SEL_EE_HIGH) Register » No description provided (AMP_MUX_SEL_EO_LOW) Register » No description provided (AMP_MUX_SEL_EO_HIGH) Register » No description provided (AMP_MUX_SEL_OE_LOW) Register » No description provided (AMP_MUX_SEL_OE_HIGH) Register » No description provided (AMP_MUX_SEL_OO_LOW) Register » No description provided (AMP_MUX_SEL_OO_HIGH) Register » No description provided (AMP_MUX_SEL_SELB_LOW) Register » No description provided (AMP_MUX_SEL_SELB_HIGH) Register » No description provided (NATIVE_RESOLUTION_START) Register » No description provided (NATIVE_RESOLUTION_END) Register » No description provided (NATIVE_RESOLUTION_REPEAT) Register » No description provided (SUB_SAMPLED_2X_START) Register » No description provided (SUB_SAMPLED_2X_END) Register » No description provided (SUB_SAMPLED_2X_REPEAT) Register » No description provided (SUB_SAMPLED_4X_START) Register » No description provided (SUB_SAMPLED_4X_END) Register » No description provided (SUB_SAMPLED_4X_REPEAT) Register » No description provided (BINNED_START) Register » No description provided (BINNED_END) Register » No description provided (BINNED_REPEAT) Register » No description provided (DARK_START) Register » No description provided (DARK_END) Register » No description provided (DARK_REPEAT) Register » No description provided (PREAMBLE_START) Register » No description provided (PREAMBLE_END) Register » No description provided (PREAMBLE_REPEAT) Register » No description provided (POSTAMBLE_START) Register » No description provided (POSTAMBLE_END) Register » No description provided (POSTAMBLE_REPEAT) Register » No description provided (ARRAY_INIT_VEC_DARK) Register » No description provided (ARRAY_INIT_VEC) Register » No description provided (TYPE_OVERRIDE) Register » No description provided (MEM_DFT) Register » No description provided (DBG_MUX_CONTROL_0) Register » No description provided (DBG_MUX_CONTROL_1) Register » No description provided (DBG_MUX_CONTROL_2) Register » No description provided (DBG_MUX_CONTROL_3) Register » No description provided (DBG_MUX_CONTROL_4) Register » No description provided (DE_IA_SELECT) Register » No description provided (DE_IA_ADDR_REG) Register » No description provided (DE_IA_WRDATA_REG) Register » No description provided (DE_IA_WRDATA_REG_ALIAS) Register » No description provided (DE_IA_RDDATA_REG) Register » No description provided (DE_IA_RDDATA_REG_ALIAS) Register » No description provided (USE_CASE_0_ROI_0_ROW_VEC_sOPBOT) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register » No description provided (PWM_CTRL_0) Register » No description provided (PWM_CTRL_1) Register » No description provided (FSYNCCTRL) Register » No description provided (FSYNCSTATUS) Register » No description provided (FSYNCLSMODCNTR_0) Register » No description provided (FSYNCLSMODCNTR_1) Register » No description provided (FSYNCINTCNTR_0) Register » No description provided (FSYNCINTCNTR_1) Register » No description provided (FSYNCSYSCNTR_0) Register » No description provided (FSYNCSYSCNTR_1) Register » No description provided (GPRR16) Register » No description provided (GPRR17) Register » No description provided (GPRR18) Register » No description provided (GPRR19) Register » No description provided (GPRR20) Register » No description provided (GPRR21) Register » No description provided (GPRR22) Register » No description provided (GPRR23) Register » No description provided (GPRR24) Register » No description provided (GPRR25) Register » No description provided (GPRR26) Register » No description provided (GPRR27) Register » No description provided (GPRR28) Register » No description provided (GPRR29) Register » No description provided (GPRR30) Register » No description provided (GPRR31) Register » No description provided (ADC_CTRL0_S1) Register » No description provided (ADC_CTRL1_S1) Register » No description provided (ADC_CTRL2_S1) Register » No description provided (ADCPLL_CTRL0_S1) Register » No description provided (ADCPLL_CTRL1_S1) Register » No description provided (ADCPLL_CTRL2_S1) Register » No description provided (AMP_CTRL0_S1) Register » No description provided (AMP_CTRL1_S1) Register » No description provided (AMP_CTRL2_S1) Register » No description provided (CHIP_ID) Register » No description provided (CKGEN_CTRL) Register » No description provided (CKGEN_S1) Register » No description provided (CLK_CTRL) Register » No description provided (CLK_DE_CTRL_S1) Register » No description provided (CLK_LVDSTX_S1) Register » No description provided (CLKTREE0) Register » No description provided (CLKTREE_S1) Register » No description provided (DAC_CTRL1) Register » No description provided (DAC_CTRL2) Register » No description provided (DAC_CTRL0_S1) Register » No description provided (DAC_CTRL1_S1) Register » No description provided (DAC_CTRL2_S1) Register » No description provided (DAC_CTRL3_S1) Register » No description provided (DAC_DATA) Register » No description provided (IPDA_CTRL_S1) Register » No description provided (LS_LVDSTX_S1) Register » No description provided (LSCTRL0_S1) Register » No description provided (LSMOD_EN) Register » No description provided (ROW_CTRL) Register » No description provided (PLL_CTRL) Register » No description provided (PLL_STATUS) Register » No description provided (POWER_DOWN_0) Register » No description provided (POWER_DOWN_ADC_OTHERS) Register » No description provided (POWER_DOWN_READOUT) Register » No description provided (PUMP_S1) Register » No description provided (READOUT_S1) Register » No description provided (REGIF_CTRL) Register » No description provided (REGIF_RDATA) Register » No description provided (SSPLL_CTRL0_S1) Register » No description provided (SSPLL_CTRL1_S1) Register » No description provided (SSPLL_CTRL2_S1) Register » No description provided (SYSPLL_CTRL0_S1) Register » No description provided (SYSPLL_CTRL1_S1) Register » No description provided (SYSPLL_CTRL2_S1) Register » No description provided (ANA_TEST_MUX_S1) Register » No description provided (TS_CTRL_S1) Register » No description provided (TS_CTRL) Register » No description provided (TS_DATA) Register » No description provided (VLOWENABLE) Register » No description provided (VLOWREGCTRL0_S2) Register » No description provided (VLOWREGCTRL1_S2) Register » No description provided (VLOWREGCTRL2_S2) Register » No description provided (VLOWREGCTRL3_S2) Register » No description provided (VLOWREGCTRL4_S2) Register » No description provided (VLOWSHOCTRL1) Register » No description provided (VLOWSHOCTRL2) Register » No description provided (VLOWSHOCTRL3) Register » No description provided (VLOWSHODETECT) Register » No description provided (XOSC_CTRL) Register » No description provided (CHAIN1_LEN) Register » No description provided (CHAIN2_LEN) Register » No description provided (SSPLL_CTRL3_S1) Register » No description provided (PIXEL_BIAS) Register » No description provided (DLL_CONTROL) Register » No description provided (ANA_SPARE_0) Register » No description provided (ANA_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_0) Register » No description provided (ANA_SERIAL_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_2) Register » No description provided (DEBUG_MUX_CONTROL_REG) Register » No description provided (SCRATCHPAD_0_) Register » No description provided (CLKGEN_CK1) Register » No description provided (CLKGEN_CK2) Register » No description provided (CLKGEN_CK1REF) Register » No description provided (CLKGEN_CK2REF) Register » No description provided (CLKGEN_L1) Register » No description provided (CLKGEN_L2) Register » No description provided (CLKGEN_CKX) Register » No description provided (CLKGEN_CYCLE) Register » No description provided (CLKGEN_OFFSET) Register » No description provided (CLKGEN_LTOFFSET) Register » No description provided (CLKGEN_BURST_PERIOD) Register » Control Register 0 (CTRLR0) Register » Control Register 1 (CTRLR1) Register » SSI Enable Register (SSIENR) Register » Microwire Control Register (MWCR) Register » Slave Enable Register (SER) Register » Baud Rate Select (BAUDR) Register » Transmit FIFO Threshold Level (TXFTLR) Register » Receive FIFO Threshold Level (RXFTLR) Register » Transmit FIFO Level Register (TXFLR) Register » Receive FIFO Level Register (RXFLR) Register » Status Register (SR) Register » Interrupt Mask Register (IMR) Register » Interrupt Status Register (ISR) Register » Raw Interrupt Status Register (RISR) Register » Transmit FIFO Overflow Interrupt Clear Register Register (TXOICR) Register » Receive FIFO Overflow Interrupt Clear Register (RXOICR) Register » Receive FIFO Underflow Interrupt Clear Register (RXUICR) Register » Multi-Master Interrupt Clear Register (MSTICR) Register » Interrupt Clear Register (ICR) Register » Identification Register (IDR) Register » Core Kit version ID Register (SSI_VERSION_ID) Register » DW_apb_ssi Data Register (DR0) Register » No description provided (CSI2_TX_BASE_CFG_NUM_LANES) Register » No description provided (CSI2_TX_BASE_CFG_T_PRE) Register » No description provided (CSI2_TX_BASE_CFG_T_POST) Register » No description provided (CSI2_TX_BASE_CFG_TX_GAP) Register » No description provided (CSI2_TX_BASE_CFG_T_CLK_GAP) Register » No description provided (CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK) Register » No description provided (CSI2_TX_BASE_CFG_TWAKEUP) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ACTIVE) Register » No description provided (CSI2_TX_BASE_ULPS_ACTIVE) Register » No description provided (CSI2_TX_BASE_IRQ_STATUS) Register » No description provided (CSI2_TX_BASE_IRQ_ENABLE) Register » No description provided (CSI2_TX_BASE_CSI2TX_IRQ_CLR) Register » No description provided (CSI2_TX_BASE_CFG_CLK_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_DATA_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_CPHY_EN) Register » No description provided (CSI2_TX_BASE_CFG_PPI_16_EN) Register » No description provided (CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN) Register » No description provided (CSI2_TX_BASE_CFG_VCX_EN) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1) Register » Power Control Register (PWR_CTRL) Register » Program status register (STATUS) Register » Error location (ERR_LOCATION) Register » Timing Configuration (TIMING) Register » Characterization Options (CHARACTERIZATION) Register » Blank Check Register (BLANK_CHECK) Register » No description provided (LPSCTRL) Register » No description provided (LPSWAVEFREQ) Register » No description provided (LPSWAVEGENACC) Register » No description provided (LPSRAMADDR) Register » No description provided (LPSRAMRDCMD) Register » No description provided (LPSWAVEGENADDR) Register » No description provided (LPSMARGIN) Register » No description provided (LPSDBG) Register » No description provided (LPSRAMDATA) Register » No description provided (LPSRAMDATA_ALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register » No description provided (PWM_CTRL_0) Register » No description provided (PWM_CTRL_1) Register » No description provided (FSYNCCTRL) Register » No description provided (FSYNCSTATUS) Register » No description provided (FSYNCLSMODCNTR_0) Register » No description provided (FSYNCLSMODCNTR_1) Register » No description provided (FSYNCINTCNTR_0) Register » No description provided (FSYNCINTCNTR_1) Register » No description provided (FSYNCSYSCNTR_0) Register » No description provided (FSYNCSYSCNTR_1) Register » No description provided (GPRR16) Register » No description provided (GPRR17) Register » No description provided (GPRR18) Register » No description provided (GPRR19) Register » No description provided (GPRR20) Register » No description provided (GPRR21) Register » No description provided (GPRR22) Register » No description provided (GPRR23) Register » No description provided (GPRR24) Register » No description provided (GPRR25) Register » No description provided (GPRR26) Register » No description provided (GPRR27) Register » No description provided (GPRR28) Register » No description provided (GPRR29) Register » No description provided (GPRR30) Register » No description provided (GPRR31) Register » No description provided (ADC_CTRL0_S1) Register » No description provided (ADC_CTRL1_S1) Register » No description provided (ADC_CTRL2_S1) Register » No description provided (ADCPLL_CTRL0_S1) Register » No description provided (ADCPLL_CTRL1_S1) Register » No description provided (ADCPLL_CTRL2_S1) Register » No description provided (AMP_CTRL0_S1) Register » No description provided (AMP_CTRL1_S1) Register » No description provided (AMP_CTRL2_S1) Register » No description provided (CHIP_ID) Register » No description provided (CKGEN_CTRL) Register » No description provided (CKGEN_S1) Register » No description provided (CLK_CTRL) Register » No description provided (CLK_DE_CTRL_S1) Register » No description provided (CLK_LVDSTX_S1) Register » No description provided (CLKTREE0) Register » No description provided (CLKTREE_S1) Register » No description provided (DAC_CTRL1) Register » No description provided (DAC_CTRL2) Register » No description provided (DAC_CTRL0_S1) Register » No description provided (DAC_CTRL1_S1) Register » No description provided (DAC_CTRL2_S1) Register » No description provided (DAC_CTRL3_S1) Register » No description provided (DAC_DATA) Register » No description provided (IPDA_CTRL_S1) Register » No description provided (LS_LVDSTX_S1) Register » No description provided (LSCTRL0_S1) Register » No description provided (LSMOD_EN) Register » No description provided (ROW_CTRL) Register » No description provided (PLL_CTRL) Register » No description provided (PLL_STATUS) Register » No description provided (POWER_DOWN_0) Register » No description provided (POWER_DOWN_ADC_OTHERS) Register » No description provided (POWER_DOWN_READOUT) Register » No description provided (PUMP_S1) Register » No description provided (READOUT_S1) Register » No description provided (REGIF_CTRL) Register » No description provided (REGIF_RDATA) Register » No description provided (SSPLL_CTRL0_S1) Register » No description provided (SSPLL_CTRL1_S1) Register » No description provided (SSPLL_CTRL2_S1) Register » No description provided (SYSPLL_CTRL0_S1) Register » No description provided (SYSPLL_CTRL1_S1) Register » No description provided (SYSPLL_CTRL2_S1) Register » No description provided (ANA_TEST_MUX_S1) Register » No description provided (TS_CTRL_S1) Register » No description provided (TS_CTRL) Register » No description provided (TS_DATA) Register » No description provided (VLOWENABLE) Register » No description provided (VLOWREGCTRL0_S2) Register » No description provided (VLOWREGCTRL1_S2) Register » No description provided (VLOWREGCTRL2_S2) Register » No description provided (VLOWREGCTRL3_S2) Register » No description provided (VLOWREGCTRL4_S2) Register » No description provided (VLOWSHOCTRL1) Register » No description provided (VLOWSHOCTRL2) Register » No description provided (VLOWSHOCTRL3) Register » No description provided (VLOWSHODETECT) Register » No description provided (XOSC_CTRL) Register » No description provided (CHAIN1_LEN) Register » No description provided (CHAIN2_LEN) Register » No description provided (SSPLL_CTRL3_S1) Register » No description provided (PIXEL_BIAS) Register » No description provided (DLL_CONTROL) Register » No description provided (ANA_SPARE_0) Register » No description provided (ANA_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_0) Register » No description provided (ANA_SERIAL_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_2) Register » No description provided (DEBUG_MUX_CONTROL_REG) Register » No description provided (SCRATCHPAD_0_) Register » No description provided (CLKGEN_CK1) Register » No description provided (CLKGEN_CK2) Register » No description provided (CLKGEN_CK1REF) Register » No description provided (CLKGEN_CK2REF) Register » No description provided (CLKGEN_L1) Register » No description provided (CLKGEN_L2) Register » No description provided (CLKGEN_CKX) Register » No description provided (CLKGEN_CYCLE) Register » No description provided (CLKGEN_OFFSET) Register » No description provided (CLKGEN_LTOFFSET) Register » No description provided (CLKGEN_BURST_PERIOD) Register » Control Register 0 (CTRLR0) Register » Control Register 1 (CTRLR1) Register » SSI Enable Register (SSIENR) Register » Microwire Control Register (MWCR) Register » Slave Enable Register (SER) Register » Baud Rate Select (BAUDR) Register » Transmit FIFO Threshold Level (TXFTLR) Register » Receive FIFO Threshold Level (RXFTLR) Register » Transmit FIFO Level Register (TXFLR) Register » Receive FIFO Level Register (RXFLR) Register » Status Register (SR) Register » Interrupt Mask Register (IMR) Register » Interrupt Status Register (ISR) Register » Raw Interrupt Status Register (RISR) Register » Transmit FIFO Overflow Interrupt Clear Register Register (TXOICR) Register » Receive FIFO Overflow Interrupt Clear Register (RXOICR) Register » Receive FIFO Underflow Interrupt Clear Register (RXUICR) Register » Multi-Master Interrupt Clear Register (MSTICR) Register » Interrupt Clear Register (ICR) Register » Identification Register (IDR) Register » Core Kit version ID Register (SSI_VERSION_ID) Register » DW_apb_ssi Data Register (DR0) Register » No description provided (CSI2_TX_BASE_CFG_NUM_LANES) Register » No description provided (CSI2_TX_BASE_CFG_T_PRE) Register » No description provided (CSI2_TX_BASE_CFG_T_POST) Register » No description provided (CSI2_TX_BASE_CFG_TX_GAP) Register » No description provided (CSI2_TX_BASE_CFG_T_CLK_GAP) Register » No description provided (CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK) Register » No description provided (CSI2_TX_BASE_CFG_TWAKEUP) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ACTIVE) Register » No description provided (CSI2_TX_BASE_ULPS_ACTIVE) Register » No description provided (CSI2_TX_BASE_IRQ_STATUS) Register » No description provided (CSI2_TX_BASE_IRQ_ENABLE) Register » No description provided (CSI2_TX_BASE_CSI2TX_IRQ_CLR) Register » No description provided (CSI2_TX_BASE_CFG_CLK_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_DATA_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_CPHY_EN) Register » No description provided (CSI2_TX_BASE_CFG_PPI_16_EN) Register » No description provided (CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN) Register » No description provided (CSI2_TX_BASE_CFG_VCX_EN) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1) Register » Power Control Register (PWR_CTRL) Register » Program status register (STATUS) Register » Error location (ERR_LOCATION) Register » Timing Configuration (TIMING) Register » Characterization Options (CHARACTERIZATION) Register » Blank Check Register (BLANK_CHECK) Register » No description provided (LPSCTRL) Register » No description provided (LPSWAVEFREQ) Register » No description provided (LPSWAVEGENACC) Register » No description provided (LPSRAMADDR) Register » No description provided (LPSRAMRDCMD) Register » No description provided (LPSWAVEGENADDR) Register » No description provided (LPSMARGIN) Register » No description provided (LPSDBG) Register » No description provided (LPSRAMDATA) Register » No description provided (LPSRAMDATA_ALIAS) Register » No description provided (SSWAVEFREQ) Register » No description provided (SSWAVEPERIOD) Register » No description provided (SSWAVEAMP) Register » No description provided (SSPINLO) Register » No description provided (SSPINHI) Register » No description provided (SSINTERVLO) Register » No description provided (SSINTERVHI) Register » No description provided (SSWAVEOFFSET) Register » No description provided (SSCTRL) Register » No description provided (SSMODFREQ) Register » No description provided (SSMODAMP) Register » No description provided (SSINTERV_10) Register » No description provided (SSINTERV_11) Register » No description provided (SSINTERV_20) Register » No description provided (SSINTERV_21) Register » No description provided (SSINTERV_30) Register » No description provided (SSINTERV_31) Register » No description provided (SSVALUE_00) Register » No description provided (SSVALUE_01) Register » No description provided (SSVALUE_10) Register » No description provided (SSVALUE_11) Register » No description provided (SSVALUE_20) Register » No description provided (SSVALUE_21) Register » No description provided (SSVALUE_30) Register » No description provided (SSVALUE_31) Register » No description provided (SSDBG) Register » No description provided (PCMCTRL_0) Register » No description provided (PCMCTRL_1) Register » No description provided (PCMOUT) Register » No description provided (OSC_PERIOD_CTRL) Register » No description provided (OSC_PERIOD_RD) Register » No description provided (CORRECTION_CONFIG) Register » No description provided (USE_CASE_FRAME_CONFIG) Register » No description provided (USE_CASE_MIPI_PACKET_CONTROL) Register » No description provided (GAIN0) Register » No description provided (GAIN1) Register » No description provided (GAIN2) Register » No description provided (GAIN3) Register » No description provided (PARITY_GAIN_MEM) Register » No description provided (PARITY_LINE_MEM) Register » No description provided (PP_LFSR) Register » No description provided (PP_DECODE_ST_1) Register » No description provided (PP_DECODE_ST_2) Register » No description provided (PP_ENCODE_ST) Register » No description provided (PP_ENCODE_GT) Register » No description provided (DBG_MUX) Register » No description provided (GAIN_MARGIN_CONTROL) Register » No description provided (LINE_MARGIN_CONTROL) Register » No description provided (ROI_ROW_START) Register » No description provided (ROI_HEIGHT) Register » No description provided (ROI_COLUMN_START) Register » No description provided (ROI_WIDTH) Register » No description provided (PP_USEQ_WRITE) Register » No description provided (PP_ADC_DELAY) Register » No description provided (MIPI_BUFF_MARGIN_CONTROL) Register » No description provided (MIPI_HEADER_WIDTH) Register » No description provided (FRAME_NUMBER) Register » No description provided (MICRO_SEQUENCER_FW_VERSION_LSB) Register » No description provided (MICRO_SEQUENCER_FW_VERSION_MSB) Register » No description provided (TS_CAL_VER) Register » No description provided (ADC_CAL_VER) Register » No description provided (REG_0) Register » No description provided (REG_1) Register » No description provided (REG_2) Register » No description provided (REG_3) Register » No description provided (REG_4) Register » No description provided (REG_5) Register » No description provided (REG_6) Register » No description provided (REG_7) Register » No description provided (PARITY_MIPI_BUFFER) Register » No description provided (PACKET_COUNT) Register » No description provided (PACKETS_PER_FRAME) Register » No description provided (ROW_VECTOR) Register » No description provided (ROWS_PER_PACKET_OUT) Register » No description provided (MIPI_RD_EN_MAX) Register » No description provided (ANALOG_SS) Register » No description provided (MIPI_BUFF_PARITY_ERR_CNT) Register » No description provided (LINE_MEM_PARITY_ERR_CNT) Register » No description provided (GAIN_MEM_PARITY_ERR_CNT) Register » No description provided (IA_SELECT) Register » No description provided (IA_ADDR_REG) Register » No description provided (IA_WRDATA_REG) Register » No description provided (IA_WRDATA_REG_ALIAS) Register » No description provided (IA_RDDATA_REG) Register » No description provided (IA_RDDATA_REG_ALIAS) Register » No description provided (IA_BANK_sYPE) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register » No description provided (PWM_CTRL_0) Register » No description provided (PWM_CTRL_1) Register » No description provided (FSYNCCTRL) Register » No description provided (FSYNCSTATUS) Register » No description provided (FSYNCLSMODCNTR_0) Register » No description provided (FSYNCLSMODCNTR_1) Register » No description provided (FSYNCINTCNTR_0) Register » No description provided (FSYNCINTCNTR_1) Register » No description provided (FSYNCSYSCNTR_0) Register » No description provided (FSYNCSYSCNTR_1) Register » No description provided (GPRR16) Register » No description provided (GPRR17) Register » No description provided (GPRR18) Register » No description provided (GPRR19) Register » No description provided (GPRR20) Register » No description provided (GPRR21) Register » No description provided (GPRR22) Register » No description provided (GPRR23) Register » No description provided (GPRR24) Register » No description provided (GPRR25) Register » No description provided (GPRR26) Register » No description provided (GPRR27) Register » No description provided (GPRR28) Register » No description provided (GPRR29) Register » No description provided (GPRR30) Register » No description provided (GPRR31) Register » No description provided (ADC_CTRL0_S1) Register » No description provided (ADC_CTRL1_S1) Register » No description provided (ADC_CTRL2_S1) Register » No description provided (ADCPLL_CTRL0_S1) Register » No description provided (ADCPLL_CTRL1_S1) Register » No description provided (ADCPLL_CTRL2_S1) Register » No description provided (AMP_CTRL0_S1) Register » No description provided (AMP_CTRL1_S1) Register » No description provided (AMP_CTRL2_S1) Register » No description provided (CHIP_ID) Register » No description provided (CKGEN_CTRL) Register » No description provided (CKGEN_S1) Register » No description provided (CLK_CTRL) Register » No description provided (CLK_DE_CTRL_S1) Register » No description provided (CLK_LVDSTX_S1) Register » No description provided (CLKTREE0) Register » No description provided (CLKTREE_S1) Register » No description provided (DAC_CTRL1) Register » No description provided (DAC_CTRL2) Register » No description provided (DAC_CTRL0_S1) Register » No description provided (DAC_CTRL1_S1) Register » No description provided (DAC_CTRL2_S1) Register » No description provided (DAC_CTRL3_S1) Register » No description provided (DAC_DATA) Register » No description provided (IPDA_CTRL_S1) Register » No description provided (LS_LVDSTX_S1) Register » No description provided (LSCTRL0_S1) Register » No description provided (LSMOD_EN) Register » No description provided (ROW_CTRL) Register » No description provided (PLL_CTRL) Register » No description provided (PLL_STATUS) Register » No description provided (POWER_DOWN_0) Register » No description provided (POWER_DOWN_ADC_OTHERS) Register » No description provided (POWER_DOWN_READOUT) Register » No description provided (PUMP_S1) Register » No description provided (READOUT_S1) Register » No description provided (REGIF_CTRL) Register » No description provided (REGIF_RDATA) Register » No description provided (SSPLL_CTRL0_S1) Register » No description provided (SSPLL_CTRL1_S1) Register » No description provided (SSPLL_CTRL2_S1) Register » No description provided (SYSPLL_CTRL0_S1) Register » No description provided (SYSPLL_CTRL1_S1) Register » No description provided (SYSPLL_CTRL2_S1) Register » No description provided (ANA_TEST_MUX_S1) Register » No description provided (TS_CTRL_S1) Register » No description provided (TS_CTRL) Register » No description provided (TS_DATA) Register » No description provided (VLOWENABLE) Register » No description provided (VLOWREGCTRL0_S2) Register » No description provided (VLOWREGCTRL1_S2) Register » No description provided (VLOWREGCTRL2_S2) Register » No description provided (VLOWREGCTRL3_S2) Register » No description provided (VLOWREGCTRL4_S2) Register » No description provided (VLOWSHOCTRL1) Register » No description provided (VLOWSHOCTRL2) Register » No description provided (VLOWSHOCTRL3) Register » No description provided (VLOWSHODETECT) Register » No description provided (XOSC_CTRL) Register » No description provided (CHAIN1_LEN) Register » No description provided (CHAIN2_LEN) Register » No description provided (SSPLL_CTRL3_S1) Register » No description provided (PIXEL_BIAS) Register » No description provided (DLL_CONTROL) Register » No description provided (ANA_SPARE_0) Register » No description provided (ANA_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_0) Register » No description provided (ANA_SERIAL_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_2) Register » No description provided (DEBUG_MUX_CONTROL_REG) Register » No description provided (SCRATCHPAD_0_) Register » No description provided (CLKGEN_CK1) Register » No description provided (CLKGEN_CK2) Register » No description provided (CLKGEN_CK1REF) Register » No description provided (CLKGEN_CK2REF) Register » No description provided (CLKGEN_L1) Register » No description provided (CLKGEN_L2) Register » No description provided (CLKGEN_CKX) Register » No description provided (CLKGEN_CYCLE) Register » No description provided (CLKGEN_OFFSET) Register » No description provided (CLKGEN_LTOFFSET) Register » No description provided (CLKGEN_BURST_PERIOD) Register » Control Register 0 (CTRLR0) Register » Control Register 1 (CTRLR1) Register » SSI Enable Register (SSIENR) Register » Microwire Control Register (MWCR) Register » Slave Enable Register (SER) Register » Baud Rate Select (BAUDR) Register » Transmit FIFO Threshold Level (TXFTLR) Register » Receive FIFO Threshold Level (RXFTLR) Register » Transmit FIFO Level Register (TXFLR) Register » Receive FIFO Level Register (RXFLR) Register » Status Register (SR) Register » Interrupt Mask Register (IMR) Register » Interrupt Status Register (ISR) Register » Raw Interrupt Status Register (RISR) Register » Transmit FIFO Overflow Interrupt Clear Register Register (TXOICR) Register » Receive FIFO Overflow Interrupt Clear Register (RXOICR) Register » Receive FIFO Underflow Interrupt Clear Register (RXUICR) Register » Multi-Master Interrupt Clear Register (MSTICR) Register » Interrupt Clear Register (ICR) Register » Identification Register (IDR) Register » Core Kit version ID Register (SSI_VERSION_ID) Register » DW_apb_ssi Data Register (DR0) Register » No description provided (CSI2_TX_BASE_CFG_NUM_LANES) Register » No description provided (CSI2_TX_BASE_CFG_T_PRE) Register » No description provided (CSI2_TX_BASE_CFG_T_POST) Register » No description provided (CSI2_TX_BASE_CFG_TX_GAP) Register » No description provided (CSI2_TX_BASE_CFG_T_CLK_GAP) Register » No description provided (CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK) Register » No description provided (CSI2_TX_BASE_CFG_TWAKEUP) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ACTIVE) Register » No description provided (CSI2_TX_BASE_ULPS_ACTIVE) Register » No description provided (CSI2_TX_BASE_IRQ_STATUS) Register » No description provided (CSI2_TX_BASE_IRQ_ENABLE) Register » No description provided (CSI2_TX_BASE_CSI2TX_IRQ_CLR) Register » No description provided (CSI2_TX_BASE_CFG_CLK_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_DATA_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_CPHY_EN) Register » No description provided (CSI2_TX_BASE_CFG_PPI_16_EN) Register » No description provided (CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN) Register » No description provided (CSI2_TX_BASE_CFG_VCX_EN) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1) Register » Power Control Register (PWR_CTRL) Register » Program status register (STATUS) Register » Error location (ERR_LOCATION) Register » Timing Configuration (TIMING) Register » Characterization Options (CHARACTERIZATION) Register » Blank Check Register (BLANK_CHECK) Register » No description provided (LPSCTRL) Register » No description provided (LPSWAVEFREQ) Register » No description provided (LPSWAVEGENACC) Register » No description provided (LPSRAMADDR) Register » No description provided (LPSRAMRDCMD) Register » No description provided (LPSWAVEGENADDR) Register » No description provided (LPSMARGIN) Register » No description provided (LPSDBG) Register » No description provided (LPSRAMDATA) Register » No description provided (LPSRAMDATA_ALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register | Sequence Start Address Register (SEQUENCESTARTADDR) Register » Sequence End Address Register (SEQUENCEENDADDR) Register » Useq control Register (USEQCONTROLREGISTER) Register » FrameSync Control Register (FRAMESYNCCTRL) Register » The breakpoint feature is used by the software for debugging purposes. (BREAKPOINTCTRL) Register » Update Stamp Value Register (UPDATESTAMP) Register » Controls clock gates for various digital circuit power-down (DIGPWRDOWN) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG1READOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATELATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXSATURATEREADOUTCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (ROWCNTINCRCONTROL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0LATCHCTRL) Register » DEPRECATED: This register is deprecated and should not be used. (PIXGAINTAG0READOUTCTRL) Register » Configures Read prefetching on I2C reads (I2CCTRL) Register » Sequence Status Register (SEQUENCESTATUS) Register » Clock Control Register (SYSTEMCLOCKCONTROL) Register » Call Repeat Count Value (CALLRPTCOUNT) Register » DEPRECATED: This register is deprecated and should not be used. (GTSWAP) Register » Interrupt Enable Register (INTERRUPTENABLE) Register » Error Set Register (ERRORSET) Register » Error Status Register (ERRORSTATUS) Register » No description provided (GPIOCTRL) Register » No description provided (GPIOINPUT) Register » No description provided (GPIOOUTPUTSET) Register » No description provided (GPIOOUTPUTCLR) Register » No description provided (PIXELINTERFACECTRL) Register » No description provided (ROWCNTINCRCONTROL2) Register » No description provided (GPIOFSYNCSNAPSHOT) Register » No description provided (WAITFORSYNCSOURCE) Register » No description provided (CTIMECTRL) Register » No description provided (CTIME_0) Register » No description provided (CTIME_1) Register » No description provided (CTIME_2) Register » No description provided (CTIME_3) Register » No description provided (CTIME_4) Register » No description provided (CTIME_5) Register » No description provided (SOFT_RESET) Register » No description provided (WAITFORSYNCPOLARITY) Register » MIcrosequencer ram DFT controls (USEQ_DFT) Register » Microsequener parity error bits (USEQ_PARITY) Register » HSP RAM DFT controls (HSP_DFT) Register » No description provided (PCCOND) Register » No description provided (GPRR0) Register » No description provided (GPRR1) Register » No description provided (GPRR2) Register » No description provided (GPRR3) Register » No description provided (GPRR4) Register » No description provided (GPRR5) Register » No description provided (GPRR6) Register » No description provided (GPRR7) Register » No description provided (GPRR8) Register » No description provided (GPRR9) Register » No description provided (GPRR10) Register » No description provided (GPRR11) Register » No description provided (GPRR12) Register » No description provided (GPRR13) Register » No description provided (GPRR14) Register » No description provided (GPRR15) Register » No description provided (AMPCLKCTRL) Register » No description provided (AMPCLK2CTRL) Register » No description provided (AMPCLK3CTRL1) Register » No description provided (AMPCLK3CTRL2) Register » No description provided (NOISERESETCTRL1) Register » No description provided (NOISERESETCTRL2) Register » No description provided (PIXRESETCTRL1) Register » No description provided (PIXRESETCTRL2) Register » No description provided (GPIOPINFUNC1) Register » No description provided (GPIOPINFUNC2) Register » No description provided (USEQ_DBGMUX) Register » No description provided (USEQ_CHIP_DBGMUX) Register » No description provided (MM_CTRL) Register » No description provided (ERRJMPADDR) Register » No description provided (STOPERRENA) Register » No description provided (ADCCNVTCTRL1) Register » No description provided (ADCCNVTCTRL2) Register » No description provided (ADCCNVTCTRL3) Register » No description provided (ADCCNVTCTRL4) Register » No description provided (GAINTAG1CLKCTRL1) Register » No description provided (GAINTAG1CLKCTRL2) Register » No description provided (GAINTAGTHRESHCTRL1) Register » No description provided (GAINTAGTHRESHCTRL2) Register » No description provided (GAINTAGTHRESHSEL) Register » No description provided (GAINTAG0CLKCTRL1) Register » No description provided (GAINTAG0CLKCTRL2) Register » No description provided (FORCESFCTRL1) Register » No description provided (FORCESFCTRL2) Register » No description provided (FORCEIPDACTRL1) Register » No description provided (FORCEIPDACTRL2) Register » Useq Ram Load start Address Register (USEQRAMLOADADDR) Register » Useq Ram Read start Address Register (USEQRAMRDSTADDR) Register » Useq Ram Load Data Register (USEQRAMLOADDATA) Register » Useq Ram Load Data Register (USEQRAMLOADDATAALIAS) Register » Useq Ram Read Data Register (USEQRAMRDDATA) Register » Useq Ram Read Data Register (USEQRAMRDDATAALIAS) Register » No description provided (PWM_CTRL_0) Register » No description provided (PWM_CTRL_1) Register » No description provided (FSYNCCTRL) Register » No description provided (FSYNCSTATUS) Register » No description provided (FSYNCLSMODCNTR_0) Register » No description provided (FSYNCLSMODCNTR_1) Register » No description provided (FSYNCINTCNTR_0) Register » No description provided (FSYNCINTCNTR_1) Register » No description provided (FSYNCSYSCNTR_0) Register » No description provided (FSYNCSYSCNTR_1) Register » No description provided (GPRR16) Register » No description provided (GPRR17) Register » No description provided (GPRR18) Register » No description provided (GPRR19) Register » No description provided (GPRR20) Register » No description provided (GPRR21) Register » No description provided (GPRR22) Register » No description provided (GPRR23) Register » No description provided (GPRR24) Register » No description provided (GPRR25) Register » No description provided (GPRR26) Register » No description provided (GPRR27) Register » No description provided (GPRR28) Register » No description provided (GPRR29) Register » No description provided (GPRR30) Register » No description provided (GPRR31) Register » No description provided (ADC_CTRL0_S1) Register » No description provided (ADC_CTRL1_S1) Register » No description provided (ADC_CTRL2_S1) Register » No description provided (ADCPLL_CTRL0_S1) Register » No description provided (ADCPLL_CTRL1_S1) Register » No description provided (ADCPLL_CTRL2_S1) Register » No description provided (AMP_CTRL0_S1) Register » No description provided (AMP_CTRL1_S1) Register » No description provided (AMP_CTRL2_S1) Register » No description provided (CHIP_ID) Register » No description provided (CKGEN_CTRL) Register » No description provided (CKGEN_S1) Register » No description provided (CLK_CTRL) Register » No description provided (CLK_DE_CTRL_S1) Register » No description provided (CLK_LVDSTX_S1) Register » No description provided (CLKTREE0) Register » No description provided (CLKTREE_S1) Register » No description provided (DAC_CTRL1) Register » No description provided (DAC_CTRL2) Register » No description provided (DAC_CTRL0_S1) Register » No description provided (DAC_CTRL1_S1) Register » No description provided (DAC_CTRL2_S1) Register » No description provided (DAC_CTRL3_S1) Register » No description provided (DAC_DATA) Register » No description provided (IPDA_CTRL_S1) Register » No description provided (LS_LVDSTX_S1) Register » No description provided (LSCTRL0_S1) Register » No description provided (LSMOD_EN) Register » No description provided (ROW_CTRL) Register » No description provided (PLL_CTRL) Register » No description provided (PLL_STATUS) Register » No description provided (POWER_DOWN_0) Register » No description provided (POWER_DOWN_ADC_OTHERS) Register » No description provided (POWER_DOWN_READOUT) Register » No description provided (PUMP_S1) Register » No description provided (READOUT_S1) Register » No description provided (REGIF_CTRL) Register » No description provided (REGIF_RDATA) Register » No description provided (SSPLL_CTRL0_S1) Register » No description provided (SSPLL_CTRL1_S1) Register » No description provided (SSPLL_CTRL2_S1) Register » No description provided (SYSPLL_CTRL0_S1) Register » No description provided (SYSPLL_CTRL1_S1) Register » No description provided (SYSPLL_CTRL2_S1) Register » No description provided (ANA_TEST_MUX_S1) Register » No description provided (TS_CTRL_S1) Register » No description provided (TS_CTRL) Register » No description provided (TS_DATA) Register » No description provided (VLOWENABLE) Register » No description provided (VLOWREGCTRL0_S2) Register » No description provided (VLOWREGCTRL1_S2) Register » No description provided (VLOWREGCTRL2_S2) Register » No description provided (VLOWREGCTRL3_S2) Register » No description provided (VLOWREGCTRL4_S2) Register » No description provided (VLOWSHOCTRL1) Register » No description provided (VLOWSHOCTRL2) Register » No description provided (VLOWSHOCTRL3) Register » No description provided (VLOWSHODETECT) Register » No description provided (XOSC_CTRL) Register » No description provided (CHAIN1_LEN) Register » No description provided (CHAIN2_LEN) Register » No description provided (SSPLL_CTRL3_S1) Register » No description provided (PIXEL_BIAS) Register » No description provided (DLL_CONTROL) Register » No description provided (ANA_SPARE_0) Register » No description provided (ANA_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_0) Register » No description provided (ANA_SERIAL_SPARE_1) Register » No description provided (ANA_SERIAL_SPARE_2) Register » No description provided (DEBUG_MUX_CONTROL_REG) Register » No description provided (SCRATCHPAD_0_) Register » No description provided (CLKGEN_CK1) Register » No description provided (CLKGEN_CK2) Register » No description provided (CLKGEN_CK1REF) Register » No description provided (CLKGEN_CK2REF) Register » No description provided (CLKGEN_L1) Register » No description provided (CLKGEN_L2) Register » No description provided (CLKGEN_CKX) Register » No description provided (CLKGEN_CYCLE) Register » No description provided (CLKGEN_OFFSET) Register » No description provided (CLKGEN_LTOFFSET) Register » No description provided (CLKGEN_BURST_PERIOD) Register » Control Register 0 (CTRLR0) Register » Control Register 1 (CTRLR1) Register » SSI Enable Register (SSIENR) Register » Microwire Control Register (MWCR) Register » Slave Enable Register (SER) Register » Baud Rate Select (BAUDR) Register » Transmit FIFO Threshold Level (TXFTLR) Register » Receive FIFO Threshold Level (RXFTLR) Register » Transmit FIFO Level Register (TXFLR) Register » Receive FIFO Level Register (RXFLR) Register » Status Register (SR) Register » Interrupt Mask Register (IMR) Register » Interrupt Status Register (ISR) Register » Raw Interrupt Status Register (RISR) Register » Transmit FIFO Overflow Interrupt Clear Register Register (TXOICR) Register » Receive FIFO Overflow Interrupt Clear Register (RXOICR) Register » Receive FIFO Underflow Interrupt Clear Register (RXUICR) Register » Multi-Master Interrupt Clear Register (MSTICR) Register » Interrupt Clear Register (ICR) Register » Identification Register (IDR) Register » Core Kit version ID Register (SSI_VERSION_ID) Register » DW_apb_ssi Data Register (DR0) Register » No description provided (CSI2_TX_BASE_CFG_NUM_LANES) Register » No description provided (CSI2_TX_BASE_CFG_T_PRE) Register » No description provided (CSI2_TX_BASE_CFG_T_POST) Register » No description provided (CSI2_TX_BASE_CFG_TX_GAP) Register » No description provided (CSI2_TX_BASE_CFG_T_CLK_GAP) Register » No description provided (CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK) Register » No description provided (CSI2_TX_BASE_CFG_TWAKEUP) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_ENABLE) Register » No description provided (CSI2_TX_BASE_ULPS_CLK_ACTIVE) Register » No description provided (CSI2_TX_BASE_ULPS_ACTIVE) Register » No description provided (CSI2_TX_BASE_IRQ_STATUS) Register » No description provided (CSI2_TX_BASE_IRQ_ENABLE) Register » No description provided (CSI2_TX_BASE_CSI2TX_IRQ_CLR) Register » No description provided (CSI2_TX_BASE_CFG_CLK_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_DATA_LANE_EN) Register » No description provided (CSI2_TX_BASE_CFG_CPHY_EN) Register » No description provided (CSI2_TX_BASE_CFG_PPI_16_EN) Register » No description provided (CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN) Register » No description provided (CSI2_TX_BASE_CFG_VCX_EN) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I) Register » No description provided (CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0) Register » No description provided (CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1) Register » Power Control Register (PWR_CTRL) Register » Program status register (STATUS) Register » Error location (ERR_LOCATION) Register » Timing Configuration (TIMING) Register » Characterization Options (CHARACTERIZATION) Register » Blank Check Register (BLANK_CHECK) Register » No description provided (LPSCTRL) Register » No description provided (LPSWAVEFREQ) Register » No description provided (LPSWAVEGENACC) Register » No description provided (LPSRAMADDR) Register » No description provided (LPSRAMRDCMD) Register » No description provided (LPSWAVEGENADDR) Register » No description provided (LPSMARGIN) Register » No description provided (LPSDBG) Register » No description provided (LPSRAMDATA) Register » No description provided (LPSRAMDATA_ALIAS) Register » No description provided (SSWAVEFREQ) Register » No description provided (SSWAVEPERIOD) Register » No description provided (SSWAVEAMP) Register » No description provided (SSPINLO) Register » No description provided (SSPINHI) Register » No description provided (SSINTERVLO) Register » No description provided (SSINTERVHI) Register » No description provided (SSWAVEOFFSET) Register » No description provided (SSCTRL) Register » No description provided (SSMODFREQ) Register » No description provided (SSMODAMP) Register » No description provided (SSINTERV_10) Register » No description provided (SSINTERV_11) Register » No description provided (SSINTERV_20) Register » No description provided (SSINTERV_21) Register » No description provided (SSINTERV_30) Register » No description provided (SSINTERV_31) Register » No description provided (SSVALUE_00) Register » No description provided (SSVALUE_01) Register » No description provided (SSVALUE_10) Register » No description provided (SSVALUE_11) Register » No description provided (SSVALUE_20) Register » No description provided (SSVALUE_21) Register » No description provided (SSVALUE_30) Register » No description provided (SSVALUE_31) Register » No description provided (SSDBG) Register » No description provided (PCMCTRL_0) Register » No description provided (PCMCTRL_1) Register » No description provided (PCMOUT) Register » No description provided (OSC_PERIOD_CTRL) Register » No description provided (OSC_PERIOD_RD) Register » No description provided (CORRECTION_CONFIG) Register » No description provided (USE_CASE_FRAME_CONFIG) Register » No description provided (USE_CASE_MIPI_PACKET_CONTROL) Register » No description provided (GAIN0) Register » No description provided (GAIN1) Register » No description provided (GAIN2) Register » No description provided (GAIN3) Register » No description provided (PARITY_GAIN_MEM) Register » No description provided (PARITY_LINE_MEM) Register » No description provided (PP_LFSR) Register » No description provided (PP_DECODE_ST_1) Register » No description provided (PP_DECODE_ST_2) Register » No description provided (PP_ENCODE_ST) Register » No description provided (PP_ENCODE_GT) Register » No description provided (DBG_MUX) Register » No description provided (GAIN_MARGIN_CONTROL) Register » No description provided (LINE_MARGIN_CONTROL) Register » No description provided (ROI_ROW_START) Register » No description provided (ROI_HEIGHT) Register » No description provided (ROI_COLUMN_START) Register » No description provided (ROI_WIDTH) Register » No description provided (PP_USEQ_WRITE) Register » No description provided (PP_ADC_DELAY) Register » No description provided (MIPI_BUFF_MARGIN_CONTROL) Register » No description provided (MIPI_HEADER_WIDTH) Register » No description provided (FRAME_NUMBER) Register » No description provided (MICRO_SEQUENCER_FW_VERSION_LSB) Register » No description provided (MICRO_SEQUENCER_FW_VERSION_MSB) Register » No description provided (TS_CAL_VER) Register » No description provided (ADC_CAL_VER) Register » No description provided (REG_0) Register » No description provided (REG_1) Register » No description provided (REG_2) Register » No description provided (REG_3) Register » No description provided (REG_4) Register » No description provided (REG_5) Register » No description provided (REG_6) Register » No description provided (REG_7) Register » No description provided (PARITY_MIPI_BUFFER) Register » No description provided (PACKET_COUNT) Register » No description provided (PACKETS_PER_FRAME) Register » No description provided (ROW_VECTOR) Register » No description provided (ROWS_PER_PACKET_OUT) Register » No description provided (MIPI_RD_EN_MAX) Register » No description provided (ANALOG_SS) Register » No description provided (MIPI_BUFF_PARITY_ERR_CNT) Register » No description provided (LINE_MEM_PARITY_ERR_CNT) Register » No description provided (GAIN_MEM_PARITY_ERR_CNT) Register » No description provided (IA_SELECT) Register » No description provided (IA_ADDR_REG) Register » No description provided (IA_WRDATA_REG) Register » No description provided (IA_WRDATA_REG_ALIAS) Register » No description provided (IA_RDDATA_REG) Register » No description provided (IA_RDDATA_REG_ALIAS) Register » No description provided (IA_BANK_TYPE) Register » No description provided (PARITY_COUNT) Register » No description provided (INTERRUPT) Register » No description provided (MIPI_SKEW_CAL) Register » No description provided (MIPI_ESC_CLK_DIV) Register » No description provided (DE_CONTROL) Register » No description provided (BINNED1X2_REPEAT_COUNT) Register » No description provided (OVERRIDE_DATA_REG1) Register » No description provided (OVERRIDE_DATA_REG2) Register » No description provided (OVERRIDE_DATA_REG3) Register » No description provided (BINNED1X2_END) Register » No description provided (OVERRIDE_SEL_REG1) Register » No description provided (OVERRIDE_SEL_REG2) Register » No description provided (OVERRIDE_SEL_REG3) Register » No description provided (BINNED1X2_START) Register » No description provided (AMP_MUX_SEL_EE_LOW) Register » No description provided (AMP_MUX_SEL_EE_HIGH) Register » No description provided (AMP_MUX_SEL_EO_LOW) Register » No description provided (AMP_MUX_SEL_EO_HIGH) Register » No description provided (AMP_MUX_SEL_OE_LOW) Register » No description provided (AMP_MUX_SEL_OE_HIGH) Register » No description provided (AMP_MUX_SEL_OO_LOW) Register » No description provided (AMP_MUX_SEL_OO_HIGH) Register » No description provided (AMP_MUX_SEL_SELB_LOW) Register » No description provided (AMP_MUX_SEL_SELB_HIGH) Register » No description provided (NATIVE_RESOLUTION_START) Register » No description provided (NATIVE_RESOLUTION_END) Register » No description provided (NATIVE_RESOLUTION_REPEAT) Register » No description provided (SUB_SAMPLED_2X_START) Register » No description provided (SUB_SAMPLED_2X_END) Register » No description provided (SUB_SAMPLED_2X_REPEAT) Register » No description provided (SUB_SAMPLED_4X_START) Register » No description provided (SUB_SAMPLED_4X_END) Register » No description provided (SUB_SAMPLED_4X_REPEAT) Register » No description provided (BINNED_START) Register » No description provided (BINNED_END) Register » No description provided (BINNED_REPEAT) Register » No description provided (DARK_START) Register » No description provided (DARK_END) Register » No description provided (DARK_REPEAT) Register » No description provided (PREAMBLE_START) Register » No description provided (PREAMBLE_END) Register » No description provided (PREAMBLE_REPEAT) Register » No description provided (POSTAMBLE_START) Register » No description provided (POSTAMBLE_END) Register » No description provided (POSTAMBLE_REPEAT) Register » No description provided (ARRAY_INIT_VEC_DARK) Register » No description provided (ARRAY_INIT_VEC) Register » No description provided (TYPE_OVERRIDE) Register » No description provided (MEM_DFT) Register » No description provided (DBG_MUX_CONTROL_0) Register » No description provided (DBG_MUX_CONTROL_1) Register » No description provided (DBG_MUX_CONTROL_2) Register » No description provided (DBG_MUX_CONTROL_3) Register » No description provided (DBG_MUX_CONTROL_4) Register » No description provided (DE_IA_SELECT) Register » No description provided (DE_IA_ADDR_REG) Register » No description provided (DE_IA_WRDATA_REG) Register » No description provided (DE_IA_WRDATA_REG_ALIAS) Register » No description provided (DE_IA_RDDATA_REG) Register » No description provided (DE_IA_RDDATA_REG_ALIAS) Register » No description provided (USE_CASE_0_ROI_0_ROW_VEC_TOPBOT) Register » No description provided (USE_CASE_0_ROI_0_ROW_VEC_MAIN) Register » No description provided (USE_CASE_0_ROI_0_COLUMN_VEC) Register » No description provided (USE_CASE_0_ROI_0_ROI_TYPE) Register » No description provided (USE_CASE_0_ROI_1_ROW_VEC_TOPBOT) Register » No description provided (USE_CASE_0_ROI_1_ROW_VEC_MAIN) Register » No description provided (USE_CASE_0_ROI_1_COLUMN_VEC) Register » No description provided (USE_CASE_0_ROI_1_ROI_TYPE) Register » No description provided (USE_CASE_0_ROI_2_ROW_VEC_TOPBOT) Register » No description provided (USE_CASE_0_ROI_2_ROW_VEC_MAIN) Register » No description provided (USE_CASE_0_ROI_2_COLUMN_VEC) Register

No description provided (USE_CASE_0_ROI_2_ROI_TYPE) Register. More...

Classes

struct  _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s
 
struct  revisionID_t
 
struct  _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t
 
struct  ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s
 
struct  ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t
 

Macros

#define ERROR_CODE_BASE   0x0ad10000
 
#define BIT_RATE_COUNT   6
 

Typedefs

typedef struct _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s
 
typedef struct _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t
 

Enumerations

enum  adi_errorCodes_e {
  ADI_NO_ERROR = 0, ADI_JSON_FILE_NOT_FOUND = 0x0ad10001, ADI_JSON_FILE_OPEN_ERROR = 0x0ad10002, ADI_JSON_PARSE_ERROR = 0x0ad10003,
  ADI_JSON_UNEXPECTED_KEY = 0x0ad10004, ADI_UNEXPECTED_SPI_BYTE_COUNT = 0x0ad10005, ADI_FILE_NOT_FOUND = 0x0ad10006, ADI_SPI_DRIVER_ERROR = 0x0ad10007,
  ADI_SPI_XFER_ERROR = 0x0ad10008, ADI_SPI_BIT_RATE_ERROR = 0x0ad10009, ADI_ERROR_CODE_MISSING = 0x0ad1000a, ADI_UNEXPECTED_ARGS = 0x0ad1000b,
  ADI_H2S_VALID_TIMEOUT = 0x0ad1000c, ADI_S2H_NOT_VALID_TIMEOUT = 0x0ad1000d, ADI_H2S_ERROR = 0x0ad1000e, ADI_MISCOMPARE_ERROR = 0x0ad1000f,
  ADI_FILE_FORMAT_ERROR = 0x0ad10010, ADI_UNEXPECTED_PIN_MODE = 0x0ad10011, ADI_WIRINGPI_ERROR = 0x0ad10012
}
 Error code definitions. More...
 
enum  adi_data_type_codes_e { DTYPE_INT32 = 0, DTYPE_UINT32, DTYPE_FLOAT }
 Enums for specifying the data type codes. More...
 
enum  spiBitRates {
  SPI_BIT_RATE_1M = 1000, SPI_BIT_RATE_2M = 2000, SPI_BIT_RATE_4M = 4000, SPI_BIT_RATE_8M = 8000,
  SPI_BIT_RATE_12M = 12000, SPI_BIT_RATE_16M = 16000
}
 Enums for specifying valid SPI Clock Rates. More...
 

Functions

int adi_spi_write (int bytes_out, u08 *data_out, int bytes_in, u08 *data_in)
 Write a 32-bit word to the Newton over the SPI Interface. More...
 
int adi_spi_write_word_multiple (u16 address, int dataLength, u16 *dataWritePtr)
 Write multiple 16-bit words to the Newton over the SPI Interface. More...
 
int adi_spi_read_word_multiple (u16 address, int dataLength, u16 *dataReadPtr)
 Read multiple 16-bit words from the Newton over the SPI Interface. More...
 
int adi_spi_open (int bitRate)
 Open the SPI Device. More...
 
int adi_spi_close ()
 Close the SPI Device. More...
 
bool adi_is_spi_open ()
 Test if the SPI Device is open. More...
 
int adi_wait_for_hsp_ready ()
 Wait for HSP ready. More...
 
int adi_send_command (u16 command, u16 address, int word_count, adi_attribute_e attribute)
 Send command to HSP. More...
 
int adi_clear_h2s_valid ()
 Clear H2S valid. More...
 
int adi_wait_for_h2s_valid ()
 WWait for H2S Valid from HSP. More...
 
int adi_wait_for_s2h_not_valid ()
 Wait for S2H not valid from HSP. More...
 
int adi_send_data (int word_count, u16 *wr_data)
 Send data to HSP. More...
 
int adi_send_write_register_list (u16 *wr_addr, u16 *wr_data, int word_count)
 Send write register list Send data to HSP. More...
 
int adi_send_read_register_list (u16 *rd_addr, int word_count)
 Send read register list Send data to HSP. More...
 
int adi_get_data (int word_count, u16 *rd_data)
 Get data from HSP. More...
 
int adi_spi_read_word (u16 address, u16 *data)
 Read a 16-bit word from the Newton over the SPI Interface. More...
 
int adi_read_register (u16 addr, u16 *rd_data)
 Perform register read through HSP. More...
 
int adi_read_register_backdoor (u16 addr, u16 *data)
 Perform register write bypassing the HSP. More...
 
int adi_write_burst (u16 addr, u16 word_count, u16 *wr_data)
 Perform write burst through HSP with incrementing addresses. More...
 
int adi_write_register_list (u16 *wr_addr, int burst_size, u16 *wr_data)
 Write list of registers. More...
 
int adi_read_register_list (u16 *rd_addr, int burst_size, u16 *rd_data)
 Read register list. More...
 
int adi_read_burst (u16 addr, u16 word_count, u16 *rd_data)
 Perform read burst through HSP with incrementing addresses. More...
 
int adi_check_done_code ()
 Check the 1SP completion code. More...
 
u16 adi_spi_read_word_py (u16 address)
 Read a 16-bit word from the Newton over the SPI Interface. More...
 
int adi_spi_write_word (u16 address, u16 data)
 Write a 16-bit word to the Newton over the SPI Interface. More...
 
int adi_dump_error_log ()
 Dump Error Log. More...
 
int adi_write_register (u16 addr, u16 wr_data)
 Perform register write through HSP. More...
 
int adi_write_register_backdoor (u16 addr, u16 data)
 Perform register write bypassing HSP. More...
 
u16 adi_read_register_py (u16 addr)
 Perform register read through HSP. More...
 
u16 adi_check_register_py (u16 addr, u16 data)
 Perform register read through HSP. More...
 
u16 adi_read_register_backdoor_py (u16 addr)
 Perform register write bypassing the HSP. More...
 
int adi_load_command_file (const char *fileName)
 Load command file. More...
 
int adi_verify_command_file (const char *fileName)
 erifies that the RAMs match the memory images contained in the soecifide file. More...
 
int adi_verify_command_file_hsp (const char *fileName)
 
int adi_load_hsp (adi_loadTargets_e loadTarget, char *fileName)
 Load the memory image contained in the specified file into the specified HSP memory. More...
 
int adi_verify_hsp (adi_loadTargets_e verifyTarget, const char *fileName)
 Verify that the memory image contained in the specified file matches the containt of the specified HSP memory. More...
 
int adi_unload_hsp (adi_loadTargets_e unloadTarget, const char *fileName)
 Unload the memory image to the specified file from the specified HSP memory. More...
 
int adi_soft_reset ()
 Issue a soft reset to the newton. More...
 
int adi_reset_hsp ()
 Issue a soft reset to the HSP hardware. More...
 
int adi_reset_newton (adi_pin_modes_e pin_mode)
 Issue a hard reset to newton. More...
 
int adi_test_useq_ram ()
 Test the micro-sequencer sequence memory. More...
 
int adi_newton_config (int bitRateOverride)
 Configure the newton control program. More...
 
char * adi_error_msg (int returnCode)
 Return error message string for given error code. More...
 
int adi_configure_newton_gpio (int gpio, int direction)
 Configure (input or output) the specified Newton GPIO. More...
 
int adi_set_newton_gpio (int gpio, int value)
 Set Newton GPIO to the specified value. More...
 
int adi_get_newton_gpio (int gpio)
 Get Newton GPIO value. More...
 
int adi_toggle_newton_gpio (int gpio)
 Toggle (change state of) Newton GPIO. More...
 
int adi_pulse_newton_gpio (int gpio, int width)
 Pulse Newton GPIO for the specified pulse width. More...
 

Variables

u32   _adi_ErrorLog_s::::MSFTDebugData0 [4]
 
u32   _adi_ErrorLog_s::::errorStatus
 
u32   _adi_ErrorLog_s::::MSFTDebugData1 [3]
 
struct {
   u32   MSFTDebugData0 [4]
 
   u32   errorStatus
 
   u32   MSFTDebugData1 [3]
 
 
u16   _adi_ErrorLog_s::data16 [16]
 
union {
   struct {
      u32   MSFTDebugData0 [4]
 
      u32   errorStatus
 
      u32   MSFTDebugData1 [3]
 
   } 
 
   u16   data16 [16]
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::LD_RAM_SEL: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::LD_ADDR: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::RESERVED14: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::LD_RAM_SEL: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::LD_ADDR: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::RESERVED14: 2
 
 
u16   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::LD_RAM_SEL: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::LD_ADDR: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::RESERVED14: 2
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RD_RAM_SEL: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RD_ADDR: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RESERVED14: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RD_RAM_SEL: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RD_ADDR: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RESERVED14: 2
 
 
u16   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RD_RAM_SEL: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RD_ADDR: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RESERVED14: 2
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_s::LD_DATA: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_s::LD_DATA: 16
 
 
u16   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_s::LD_DATA: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_s::LD_DATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_s::LD_DATA_ALIAS: 16
 
 
u16   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_s::LD_DATA_ALIAS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_s::USEQ_RAM_RD_DATA: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_s::USEQ_RAM_RD_DATA: 16
 
 
u16   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_s::USEQ_RAM_RD_DATA: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_s::USEQ_RAM_RD_DATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_s::USEQ_RAM_RD_DATA_ALIAS: 16
 
 
u16   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_s::USEQ_RAM_RD_DATA_ALIAS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ENA: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED1: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_BUSY: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_START_EN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_RPT_EN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ON: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_OFF: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ON_IGNORE: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED9: 7
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ENA: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED1: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_BUSY: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_START_EN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_RPT_EN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ON: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_OFF: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ON_IGNORE: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED9: 7
 
 
u16   _ADI_LPS_REGS_YODA_LPSCTRL_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ENA: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED1: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_BUSY: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_START_EN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_RPT_EN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ON: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_OFF: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ON_IGNORE: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED9: 7
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::LPS_WAVE_FREQ: 8
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::LPS_WAVE_FREQ: 8
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::RESERVED8: 8
 
 
u16   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::LPS_WAVE_FREQ: 8
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENACC_s::LPS_WG_ACC: 16
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENACC_s::LPS_WG_ACC: 16
 
 
u16   _ADI_LPS_REGS_YODA_LPSWAVEGENACC_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENACC_s::LPS_WG_ACC: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_s::LPS_RAM_ADDR: 9
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_s::RESERVED9: 7
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_s::LPS_RAM_ADDR: 9
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_s::RESERVED9: 7
 
 
u16   _ADI_LPS_REGS_YODA_LPSRAMADDR_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_s::LPS_RAM_ADDR: 9
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_s::RESERVED9: 7
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::LPS_RAM_READ_EN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::LPS_RAM_READ_RDY: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::RESERVED2: 14
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::LPS_RAM_READ_EN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::LPS_RAM_READ_RDY: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::RESERVED2: 14
 
 
u16   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::LPS_RAM_READ_EN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::LPS_RAM_READ_RDY: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::RESERVED2: 14
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::LPS_RAM_START: 8
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::LPS_RAM_END: 8
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::LPS_RAM_START: 8
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::LPS_RAM_END: 8
 
 
u16   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::LPS_RAM_START: 8
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::LPS_RAM_END: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PORT0_MARGIN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PORT1_MARGIN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::RESERVED2: 13
 
unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PARITY_ERR: 1
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PORT0_MARGIN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PORT1_MARGIN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::RESERVED2: 13
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PARITY_ERR: 1
 
 
u16   _ADI_LPS_REGS_YODA_LPSMARGIN_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PORT0_MARGIN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PORT1_MARGIN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::RESERVED2: 13
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PARITY_ERR: 1
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGSEL: 3
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::RESERVED3: 5
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGCOM: 2
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::RESERVED10: 5
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGEN: 1
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGSEL: 3
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::RESERVED3: 5
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGCOM: 2
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::RESERVED10: 5
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGEN: 1
 
 
u16   _ADI_LPS_REGS_YODA_LPSDBG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGSEL: 3
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::RESERVED3: 5
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGCOM: 2
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::RESERVED10: 5
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGEN: 1
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_s::LPS_RAM_DATA: 16
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_s::LPS_RAM_DATA: 16
 
 
u16   _ADI_LPS_REGS_YODA_LPSRAMDATA_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_s::LPS_RAM_DATA: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_s::LPS_RAM_DATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_s::LPS_RAM_DATA_ALIAS: 16
 
 
u16   _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_s::LPS_RAM_DATA_ALIAS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_PC_GAIN: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_PC_OFFSET: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_SCALE: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_SATTAG: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BINNING_AVG_EN: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_PC_GAIN: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_PC_OFFSET: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_SCALE: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_SATTAG: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BINNING_AVG_EN: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::RESERVED5: 11
 
 
u16   _ADI_DATAPATH_CORRECTION_CONFIG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_PC_GAIN: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_PC_OFFSET: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_SCALE: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_SATTAG: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::BINNING_AVG_EN: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_s::RESERVED5: 11
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::ADC_9B: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::ALTERNATE_AMP_MUX_POL: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DIGITAL_BIN_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DELTA_COMP_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::FIX2FLT_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::RAW_MODE: 2
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::OUTPUT_WIDTH: 3
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DARK_ROW_VEC: 2
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::MIPI_OUT_8BIT: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::ADC_9B: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::ALTERNATE_AMP_MUX_POL: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DIGITAL_BIN_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DELTA_COMP_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::FIX2FLT_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::RAW_MODE: 2
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::OUTPUT_WIDTH: 3
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DARK_ROW_VEC: 2
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::MIPI_OUT_8BIT: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::RESERVED13: 3
 
 
u16   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::ADC_9B: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::ALTERNATE_AMP_MUX_POL: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DIGITAL_BIN_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DELTA_COMP_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::FIX2FLT_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::RAW_MODE: 2
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::OUTPUT_WIDTH: 3
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DARK_ROW_VEC: 2
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::MIPI_OUT_8BIT: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::RESERVED13: 3
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::ROWS_PER_PACKET: 7
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::AUTO_ROWS_PER_PACKET_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::MIPI_BUFF_RD_LIMIT: 2
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::MIPI_BUFF_RD_CTRL_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::RESERVED11: 5
 
struct {
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::ROWS_PER_PACKET: 7
 
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::AUTO_ROWS_PER_PACKET_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::MIPI_BUFF_RD_LIMIT: 2
 
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::MIPI_BUFF_RD_CTRL_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::RESERVED11: 5
 
 
u16   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::ROWS_PER_PACKET: 7
 
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::AUTO_ROWS_PER_PACKET_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::MIPI_BUFF_RD_LIMIT: 2
 
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::MIPI_BUFF_RD_CTRL_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::RESERVED11: 5
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN0_s::GLOBAL_GAIN_SCALE_P0: 10
 
unsigned int   _ADI_DATAPATH_GAIN0_s::GLOBAL_GAIN_SHIFT_P0: 3
 
unsigned int   _ADI_DATAPATH_GAIN0_s::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN0_s::GLOBAL_GAIN_SCALE_P0: 10
 
   unsigned int   _ADI_DATAPATH_GAIN0_s::GLOBAL_GAIN_SHIFT_P0: 3
 
   unsigned int   _ADI_DATAPATH_GAIN0_s::RESERVED13: 3
 
 
u16   _ADI_DATAPATH_GAIN0_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN0_s::GLOBAL_GAIN_SCALE_P0: 10
 
      unsigned int   _ADI_DATAPATH_GAIN0_s::GLOBAL_GAIN_SHIFT_P0: 3
 
      unsigned int   _ADI_DATAPATH_GAIN0_s::RESERVED13: 3
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN1_s::GLOBAL_GAIN_SCALE_P1: 10
 
unsigned int   _ADI_DATAPATH_GAIN1_s::GLOBAL_GAIN_SHIFT_P1: 3
 
unsigned int   _ADI_DATAPATH_GAIN1_s::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN1_s::GLOBAL_GAIN_SCALE_P1: 10
 
   unsigned int   _ADI_DATAPATH_GAIN1_s::GLOBAL_GAIN_SHIFT_P1: 3
 
   unsigned int   _ADI_DATAPATH_GAIN1_s::RESERVED13: 3
 
 
u16   _ADI_DATAPATH_GAIN1_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN1_s::GLOBAL_GAIN_SCALE_P1: 10
 
      unsigned int   _ADI_DATAPATH_GAIN1_s::GLOBAL_GAIN_SHIFT_P1: 3
 
      unsigned int   _ADI_DATAPATH_GAIN1_s::RESERVED13: 3
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN2_s::GLOBAL_GAIN_SCALE_P2: 10
 
unsigned int   _ADI_DATAPATH_GAIN2_s::GLOBAL_GAIN_SHIFT_P2: 3
 
unsigned int   _ADI_DATAPATH_GAIN2_s::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN2_s::GLOBAL_GAIN_SCALE_P2: 10
 
   unsigned int   _ADI_DATAPATH_GAIN2_s::GLOBAL_GAIN_SHIFT_P2: 3
 
   unsigned int   _ADI_DATAPATH_GAIN2_s::RESERVED13: 3
 
 
u16   _ADI_DATAPATH_GAIN2_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN2_s::GLOBAL_GAIN_SCALE_P2: 10
 
      unsigned int   _ADI_DATAPATH_GAIN2_s::GLOBAL_GAIN_SHIFT_P2: 3
 
      unsigned int   _ADI_DATAPATH_GAIN2_s::RESERVED13: 3
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN3_s::GLOBAL_GAIN_SCALE_P3: 10
 
unsigned int   _ADI_DATAPATH_GAIN3_s::GLOBAL_GAIN_SHIFT_P3: 3
 
unsigned int   _ADI_DATAPATH_GAIN3_s::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN3_s::GLOBAL_GAIN_SCALE_P3: 10
 
   unsigned int   _ADI_DATAPATH_GAIN3_s::GLOBAL_GAIN_SHIFT_P3: 3
 
   unsigned int   _ADI_DATAPATH_GAIN3_s::RESERVED13: 3
 
 
u16   _ADI_DATAPATH_GAIN3_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN3_s::GLOBAL_GAIN_SCALE_P3: 10
 
      unsigned int   _ADI_DATAPATH_GAIN3_s::GLOBAL_GAIN_SHIFT_P3: 3
 
      unsigned int   _ADI_DATAPATH_GAIN3_s::RESERVED13: 3
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PARITY_GAIN_MEM_s::GAIN_MEM_PARITY_ERR: 16
 
struct {
   unsigned int   _ADI_DATAPATH_PARITY_GAIN_MEM_s::GAIN_MEM_PARITY_ERR: 16
 
 
u16   _ADI_DATAPATH_PARITY_GAIN_MEM_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PARITY_GAIN_MEM_s::GAIN_MEM_PARITY_ERR: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PARITY_LINE_MEM_s::LINE_MEM_PARITY_ERR: 2
 
unsigned int   _ADI_DATAPATH_PARITY_LINE_MEM_s::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DATAPATH_PARITY_LINE_MEM_s::LINE_MEM_PARITY_ERR: 2
 
   unsigned int   _ADI_DATAPATH_PARITY_LINE_MEM_s::RESERVED2: 14
 
 
u16   _ADI_DATAPATH_PARITY_LINE_MEM_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PARITY_LINE_MEM_s::LINE_MEM_PARITY_ERR: 2
 
      unsigned int   _ADI_DATAPATH_PARITY_LINE_MEM_s::RESERVED2: 14
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_EN: 1
 
unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_MODE: 2
 
unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_SEED: 12
 
unsigned int   _ADI_DATAPATH_PP_LFSR_s::RESERVED15: 1
 
struct {
   unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_EN: 1
 
   unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_MODE: 2
 
   unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_SEED: 12
 
   unsigned int   _ADI_DATAPATH_PP_LFSR_s::RESERVED15: 1
 
 
u16   _ADI_DATAPATH_PP_LFSR_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_EN: 1
 
      unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_MODE: 2
 
      unsigned int   _ADI_DATAPATH_PP_LFSR_s::LFSR_SEED: 12
 
      unsigned int   _ADI_DATAPATH_PP_LFSR_s::RESERVED15: 1
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_000: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_001: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_010: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_011: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_100: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::RESERVED15: 1
 
struct {
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_000: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_001: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_010: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_011: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_100: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::RESERVED15: 1
 
 
u16   _ADI_DATAPATH_PP_DECODE_ST_1_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_000: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_001: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_010: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_011: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_100: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_s::RESERVED15: 1
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_101: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_110: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_111: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::RESERVED9: 7
 
struct {
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_101: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_110: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_111: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::RESERVED9: 7
 
 
u16   _ADI_DATAPATH_PP_DECODE_ST_2_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_101: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_110: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_111: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_s::RESERVED9: 7
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_EN_0: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_EN_1: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::OVERFLOW_ACTIVE: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::RESERVED3: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::BINNED_AND_OR: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_LATCH_ACTIVE_HI: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::RESERVED6: 10
 
struct {
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_EN_0: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_EN_1: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::OVERFLOW_ACTIVE: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::RESERVED3: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::BINNED_AND_OR: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_LATCH_ACTIVE_HI: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::RESERVED6: 10
 
 
u16   _ADI_DATAPATH_PP_ENCODE_ST_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_EN_0: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_EN_1: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::OVERFLOW_ACTIVE: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::RESERVED3: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::BINNED_AND_OR: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::ST_LATCH_ACTIVE_HI: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_s::RESERVED6: 10
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_00: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_01: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_10: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_11: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_LATCH_ACTIVE_HI: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::TAG_WAIT: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::TAG_SCALE: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_00: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_01: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_10: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_11: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_LATCH_ACTIVE_HI: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::TAG_WAIT: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::TAG_SCALE: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::RESERVED13: 3
 
 
u16   _ADI_DATAPATH_PP_ENCODE_GT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_00: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_01: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_10: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_11: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::GT_LATCH_ACTIVE_HI: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::TAG_WAIT: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::TAG_SCALE: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_s::RESERVED13: 3
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_DBG_MUX_s::DBG_SEL: 5
 
unsigned int   _ADI_DATAPATH_DBG_MUX_s::RESERVED5: 10
 
unsigned int   _ADI_DATAPATH_DBG_MUX_s::DBG_EN: 1
 
struct {
   unsigned int   _ADI_DATAPATH_DBG_MUX_s::DBG_SEL: 5
 
   unsigned int   _ADI_DATAPATH_DBG_MUX_s::RESERVED5: 10
 
   unsigned int   _ADI_DATAPATH_DBG_MUX_s::DBG_EN: 1
 
 
u16   _ADI_DATAPATH_DBG_MUX_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_DBG_MUX_s::DBG_SEL: 5
 
      unsigned int   _ADI_DATAPATH_DBG_MUX_s::RESERVED5: 10
 
      unsigned int   _ADI_DATAPATH_DBG_MUX_s::DBG_EN: 1
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN_MARGIN_CONTROL_s::GAIN_MEM_MARGIN: 16
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN_MARGIN_CONTROL_s::GAIN_MEM_MARGIN: 16
 
 
u16   _ADI_DATAPATH_GAIN_MARGIN_CONTROL_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN_MARGIN_CONTROL_s::GAIN_MEM_MARGIN: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::LINE_MEM_MARGIN: 2
 
unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::LINE_MEM_MARGIN: 2
 
   unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::RESERVED2: 14
 
 
u16   _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::LINE_MEM_MARGIN: 2
 
      unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::RESERVED2: 14
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROI_ROW_START_s::START_ROW: 10
 
unsigned int   _ADI_DATAPATH_ROI_ROW_START_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_ROI_ROW_START_s::START_ROW: 10
 
   unsigned int   _ADI_DATAPATH_ROI_ROW_START_s::RESERVED10: 6
 
 
u16   _ADI_DATAPATH_ROI_ROW_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROI_ROW_START_s::START_ROW: 10
 
      unsigned int   _ADI_DATAPATH_ROI_ROW_START_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROI_HEIGHT_s::ROI_HEIGHT: 10
 
unsigned int   _ADI_DATAPATH_ROI_HEIGHT_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_ROI_HEIGHT_s::ROI_HEIGHT: 10
 
   unsigned int   _ADI_DATAPATH_ROI_HEIGHT_s::RESERVED10: 6
 
 
u16   _ADI_DATAPATH_ROI_HEIGHT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROI_HEIGHT_s::ROI_HEIGHT: 10
 
      unsigned int   _ADI_DATAPATH_ROI_HEIGHT_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_s::START_COLUMN: 9
 
unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_s::RESERVED9: 7
 
struct {
   unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_s::START_COLUMN: 9
 
   unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_s::RESERVED9: 7
 
 
u16   _ADI_DATAPATH_ROI_COLUMN_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_s::START_COLUMN: 9
 
      unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_s::RESERVED9: 7
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROI_WIDTH_s::ROI_WIDTH: 10
 
unsigned int   _ADI_DATAPATH_ROI_WIDTH_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_ROI_WIDTH_s::ROI_WIDTH: 10
 
   unsigned int   _ADI_DATAPATH_ROI_WIDTH_s::RESERVED10: 6
 
 
u16   _ADI_DATAPATH_ROI_WIDTH_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROI_WIDTH_s::ROI_WIDTH: 10
 
      unsigned int   _ADI_DATAPATH_ROI_WIDTH_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_s::DUMP_START: 1
 
unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_s::RESERVED1: 15
 
struct {
   unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_s::DUMP_START: 1
 
   unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_s::RESERVED1: 15
 
 
u16   _ADI_DATAPATH_PP_USEQ_WRITE_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_s::DUMP_START: 1
 
      unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_s::RESERVED1: 15
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_s::ADC_DELAY: 6
 
unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_s::RESERVED6: 10
 
struct {
   unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_s::ADC_DELAY: 6
 
   unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_s::RESERVED6: 10
 
 
u16   _ADI_DATAPATH_PP_ADC_DELAY_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_s::ADC_DELAY: 6
 
      unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_s::RESERVED6: 10
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::MIPI_BUFF_MARGIN: 4
 
unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::MIPI_BUFF_MARGIN: 4
 
   unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::RESERVED4: 12
 
 
u16   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::MIPI_BUFF_MARGIN: 4
 
      unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::RESERVED4: 12
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::METADATA_BYTES: 8
 
unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::METADATA_BYTES: 8
 
   unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::RESERVED8: 8
 
 
u16   _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::METADATA_BYTES: 8
 
      unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_FRAME_NUMBER_s::FRAME_COUNT: 16
 
struct {
   unsigned int   _ADI_DATAPATH_FRAME_NUMBER_s::FRAME_COUNT: 16
 
 
u16   _ADI_DATAPATH_FRAME_NUMBER_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_FRAME_NUMBER_s::FRAME_COUNT: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_s::USEQ_FW_VERSION_LSB: 16
 
struct {
   unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_s::USEQ_FW_VERSION_LSB: 16
 
 
u16   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_s::USEQ_FW_VERSION_LSB: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_s::USEQ_FW_VERSION_MSB: 16
 
struct {
   unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_s::USEQ_FW_VERSION_MSB: 16
 
 
u16   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_s::USEQ_FW_VERSION_MSB: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_TS_CAL_VER_s::TS_CAL_VER: 16
 
struct {
   unsigned int   _ADI_DATAPATH_TS_CAL_VER_s::TS_CAL_VER: 16
 
 
u16   _ADI_DATAPATH_TS_CAL_VER_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_TS_CAL_VER_s::TS_CAL_VER: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ADC_CAL_VER_s::ADC_CAL_VER: 16
 
struct {
   unsigned int   _ADI_DATAPATH_ADC_CAL_VER_s::ADC_CAL_VER: 16
 
 
u16   _ADI_DATAPATH_ADC_CAL_VER_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ADC_CAL_VER_s::ADC_CAL_VER: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_0_s::REG_0: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_0_s::REG_0: 16
 
 
u16   _ADI_DATAPATH_REG_0_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_0_s::REG_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_1_s::REG_1: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_1_s::REG_1: 16
 
 
u16   _ADI_DATAPATH_REG_1_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_1_s::REG_1: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_2_s::REG_2: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_2_s::REG_2: 16
 
 
u16   _ADI_DATAPATH_REG_2_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_2_s::REG_2: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_3_s::REG_3: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_3_s::REG_3: 16
 
 
u16   _ADI_DATAPATH_REG_3_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_3_s::REG_3: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_4_s::REG_4: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_4_s::REG_4: 16
 
 
u16   _ADI_DATAPATH_REG_4_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_4_s::REG_4: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_5_s::REG_5: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_5_s::REG_5: 16
 
 
u16   _ADI_DATAPATH_REG_5_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_5_s::REG_5: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_6_s::REG_6: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_6_s::REG_6: 16
 
 
u16   _ADI_DATAPATH_REG_6_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_6_s::REG_6: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_7_s::REG_7: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_7_s::REG_7: 16
 
 
u16   _ADI_DATAPATH_REG_7_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_7_s::REG_7: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::MIPI_BUFFER_PARITY_ERROR: 4
 
unsigned int   _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::MIPI_BUFFER_PARITY_ERROR: 4
 
   unsigned int   _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::RESERVED4: 12
 
 
u16   _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::MIPI_BUFFER_PARITY_ERROR: 4
 
      unsigned int   _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::RESERVED4: 12
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PACKET_COUNT_s::PACKET_COUNT: 10
 
unsigned int   _ADI_DATAPATH_PACKET_COUNT_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_PACKET_COUNT_s::PACKET_COUNT: 10
 
   unsigned int   _ADI_DATAPATH_PACKET_COUNT_s::RESERVED10: 6
 
 
u16   _ADI_DATAPATH_PACKET_COUNT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PACKET_COUNT_s::PACKET_COUNT: 10
 
      unsigned int   _ADI_DATAPATH_PACKET_COUNT_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_s::TOTAL_PACKETS_PER_FRAME: 10
 
unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_s::TOTAL_PACKETS_PER_FRAME: 10
 
   unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_s::RESERVED10: 6
 
 
u16   _ADI_DATAPATH_PACKETS_PER_FRAME_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_s::TOTAL_PACKETS_PER_FRAME: 10
 
      unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROW_VECTOR_s::ROW_VECTOR: 10
 
unsigned int   _ADI_DATAPATH_ROW_VECTOR_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_ROW_VECTOR_s::ROW_VECTOR: 10
 
   unsigned int   _ADI_DATAPATH_ROW_VECTOR_s::RESERVED10: 6
 
 
u16   _ADI_DATAPATH_ROW_VECTOR_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROW_VECTOR_s::ROW_VECTOR: 10
 
      unsigned int   _ADI_DATAPATH_ROW_VECTOR_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::ROWS_PER_PACKET_OUT: 7
 
unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::RESERVED7: 9
 
struct {
   unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::ROWS_PER_PACKET_OUT: 7
 
   unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::RESERVED7: 9
 
 
u16   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::ROWS_PER_PACKET_OUT: 7
 
      unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::RESERVED7: 9
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_s::MIPI_BUFF_READ_ENABLE_COUNT_MAX: 8
 
unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_s::MIPI_BUFF_READ_ENABLE_COUNT_MAX: 8
 
   unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_s::RESERVED8: 8
 
 
u16   _ADI_DATAPATH_MIPI_RD_EN_MAX_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_s::MIPI_BUFF_READ_ENABLE_COUNT_MAX: 8
 
      unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ANALOG_SS_s::ANALOG_SS: 4
 
unsigned int   _ADI_DATAPATH_ANALOG_SS_s::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DATAPATH_ANALOG_SS_s::ANALOG_SS: 4
 
   unsigned int   _ADI_DATAPATH_ANALOG_SS_s::RESERVED4: 12
 
 
u16   _ADI_DATAPATH_ANALOG_SS_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ANALOG_SS_s::ANALOG_SS: 4
 
      unsigned int   _ADI_DATAPATH_ANALOG_SS_s::RESERVED4: 12
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_BUFF_PARITY_ERR_CNT_s::MIPI_BUFF_PARITY_ERR_COUNT: 16
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_BUFF_PARITY_ERR_CNT_s::MIPI_BUFF_PARITY_ERR_COUNT: 16
 
 
u16   _ADI_DATAPATH_MIPI_BUFF_PARITY_ERR_CNT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_BUFF_PARITY_ERR_CNT_s::MIPI_BUFF_PARITY_ERR_COUNT: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_LINE_MEM_PARITY_ERR_CNT_s::LINE_MEM_PARITY_ERR_COUNT: 16
 
struct {
   unsigned int   _ADI_DATAPATH_LINE_MEM_PARITY_ERR_CNT_s::LINE_MEM_PARITY_ERR_COUNT: 16
 
 
u16   _ADI_DATAPATH_LINE_MEM_PARITY_ERR_CNT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_LINE_MEM_PARITY_ERR_CNT_s::LINE_MEM_PARITY_ERR_COUNT: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN_MEM_PARITY_ERR_CNT_s::GAIN_MEM_PARITY_ERR_COUNT: 16
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN_MEM_PARITY_ERR_CNT_s::GAIN_MEM_PARITY_ERR_COUNT: 16
 
 
u16   _ADI_DATAPATH_GAIN_MEM_PARITY_ERR_CNT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN_MEM_PARITY_ERR_CNT_s::GAIN_MEM_PARITY_ERR_COUNT: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_SELECT_s::IA_ENA: 1
 
unsigned int   _ADI_DATAPATH_IA_SELECT_s::RESERVED1: 15
 
struct {
   unsigned int   _ADI_DATAPATH_IA_SELECT_s::IA_ENA: 1
 
   unsigned int   _ADI_DATAPATH_IA_SELECT_s::RESERVED1: 15
 
 
u16   _ADI_DATAPATH_IA_SELECT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_SELECT_s::IA_ENA: 1
 
      unsigned int   _ADI_DATAPATH_IA_SELECT_s::RESERVED1: 15
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_ADDR_REG_s::IA_START_ADDR: 12
 
unsigned int   _ADI_DATAPATH_IA_ADDR_REG_s::RESERVED12: 4
 
struct {
   unsigned int   _ADI_DATAPATH_IA_ADDR_REG_s::IA_START_ADDR: 12
 
   unsigned int   _ADI_DATAPATH_IA_ADDR_REG_s::RESERVED12: 4
 
 
u16   _ADI_DATAPATH_IA_ADDR_REG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_ADDR_REG_s::IA_START_ADDR: 12
 
      unsigned int   _ADI_DATAPATH_IA_ADDR_REG_s::RESERVED12: 4
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_s::IA_WRDATA: 16
 
struct {
   unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_s::IA_WRDATA: 16
 
 
u16   _ADI_DATAPATH_IA_WRDATA_REG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_s::IA_WRDATA: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_s::IA_WRDATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_s::IA_WRDATA_ALIAS: 16
 
 
u16   _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_s::IA_WRDATA_ALIAS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_s::IA_RDDATA: 16
 
struct {
   unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_s::IA_RDDATA: 16
 
 
u16   _ADI_DATAPATH_IA_RDDATA_REG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_s::IA_RDDATA: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_s::IA_RDDATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_s::IA_RDDATA_ALIAS: 16
 
 
u16   _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_s::IA_RDDATA_ALIAS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_s::IA_BANK_TYPE: 1
 
unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_s::RESERVED1: 15
 
struct {
   unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_s::IA_BANK_TYPE: 1
 
   unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_s::RESERVED1: 15
 
 
u16   _ADI_DATAPATH_IA_BANK_TYPE_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_s::IA_BANK_TYPE: 1
 
      unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_s::RESERVED1: 15
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::STATIC_CNTRL: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::OVERIDE_CNTRL: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::GO_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::BUSY_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::POSTAMBLE_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::PREAMBLE_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::MANUAL_MODE_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::INIT_VEC_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::DUMP_DIRECTION_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::RESERVED9: 7
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::STATIC_CNTRL: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::OVERIDE_CNTRL: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::GO_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::BUSY_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::POSTAMBLE_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::PREAMBLE_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::MANUAL_MODE_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::INIT_VEC_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::DUMP_DIRECTION_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::RESERVED9: 7
 
 
u16   _ADI_DE_REGS_YODA_DE_CONTROL_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::STATIC_CNTRL: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::OVERIDE_CNTRL: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::GO_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::BUSY_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::POSTAMBLE_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::PREAMBLE_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::MANUAL_MODE_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::INIT_VEC_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::DUMP_DIRECTION_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_s::RESERVED9: 7
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::REPEAT_COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::REPEAT_COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::RESERVED8: 8
 
 
u16   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::REPEAT_COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_s::OVR_VAL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_s::OVR_VAL: 16
 
 
u16   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_s::OVR_VAL: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_s::OVR_VAL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_s::OVR_VAL: 16
 
 
u16   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_s::OVR_VAL: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_s::OVR_VAL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_s::OVR_VAL: 16
 
 
u16   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_s::OVR_VAL: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_END_s::END_ADDRESS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_END_s::END_ADDRESS: 16
 
 
u16   _ADI_DE_REGS_YODA_BINNED1X2_END_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_END_s::END_ADDRESS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_s::OVR_VAL_SEL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_s::OVR_VAL_SEL: 16
 
 
u16   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_s::OVR_VAL_SEL: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_s::OVR_VAL_SEL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_s::OVR_VAL_SEL: 16
 
 
u16   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_s::OVR_VAL_SEL: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_s::OVR_VAL_SEL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_s::OVR_VAL_SEL: 16
 
 
u16   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_s::OVR_VAL_SEL: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_START_s::START_ADDRESS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_START_s::START_ADDRESS: 16
 
 
u16   _ADI_DE_REGS_YODA_BINNED1X2_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_START_s::START_ADDRESS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_s::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_s::BITS15_0: 16
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_s::BITS15_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::RESERVED5: 11
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::RESERVED5: 11
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_s::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_s::BITS15_0: 16
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_s::BITS15_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::RESERVED5: 11
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::RESERVED5: 11
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_s::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_s::BITS15_0: 16
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_s::BITS15_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::RESERVED5: 11
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::RESERVED5: 11
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_s::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_s::BITS15_0: 16
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_s::BITS15_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::RESERVED5: 11
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::RESERVED5: 11
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_s::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_s::BITS15_0: 16
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_s::BITS15_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::RESERVED5: 11
 
 
u16   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::RESERVED5: 11
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::RESERVED8: 8
 
 
u16   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::RESERVED8: 8
 
 
u16   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::RESERVED8: 8
 
 
u16   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_START_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_START_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED_START_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_BINNED_START_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_BINNED_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED_START_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_BINNED_START_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_END_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_END_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED_END_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_BINNED_END_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_BINNED_END_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED_END_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_BINNED_END_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_s::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_s::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_s::RESERVED8: 8
 
 
u16   _ADI_DE_REGS_YODA_BINNED_REPEAT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_s::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DARK_START_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_DARK_START_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DARK_START_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_DARK_START_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_DARK_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DARK_START_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_DARK_START_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DARK_END_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_DARK_END_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DARK_END_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_DARK_END_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_DARK_END_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DARK_END_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_DARK_END_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_s::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_s::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_s::RESERVED8: 8
 
 
u16   _ADI_DE_REGS_YODA_DARK_REPEAT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_s::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_PREAMBLE_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_PREAMBLE_END_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::RESERVED8: 8
 
 
u16   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_POSTAMBLE_START_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_s::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_s::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_POSTAMBLE_END_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_s::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::RESERVED8: 8
 
 
u16   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::RESERVED8: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::DARK_BITS: 2
 
unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::DARK_BITS: 2
 
   unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::RESERVED2: 14
 
 
u16   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::DARK_BITS: 2
 
      unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::RESERVED2: 14
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_s::ARRAY_BITS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_s::ARRAY_BITS: 16
 
 
u16   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_s::ARRAY_BITS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_0: 4
 
unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_1: 4
 
unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_2: 4
 
unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ANALOG: 4
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_0: 4
 
   unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_1: 4
 
   unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_2: 4
 
   unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ANALOG: 4
 
 
u16   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_0: 4
 
      unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_1: 4
 
      unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_2: 4
 
      unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ANALOG: 4
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::MARGIN: 1
 
unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::RESERVED1: 14
 
unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::PARITY_ERR: 1
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::MARGIN: 1
 
   unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::RESERVED1: 14
 
   unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::PARITY_ERR: 1
 
 
u16   _ADI_DE_REGS_YODA_MEM_DFT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::MARGIN: 1
 
      unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::RESERVED1: 14
 
      unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_s::PARITY_ERR: 1
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::CNTRL_0: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::CNTRL_1: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::CNTRL_0: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::CNTRL_1: 8
 
 
u16   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::CNTRL_0: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::CNTRL_1: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::CNTRL_2: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::CNTRL_3: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::CNTRL_2: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::CNTRL_3: 8
 
 
u16   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::CNTRL_2: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::CNTRL_3: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::CNTRL_4: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::CNTRL_5: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::CNTRL_4: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::CNTRL_5: 8
 
 
u16   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::CNTRL_4: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::CNTRL_5: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::CNTRL_6: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::CNTRL_7: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::CNTRL_6: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::CNTRL_7: 8
 
 
u16   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::CNTRL_6: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::CNTRL_7: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::CNTRL_8: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::CNTRL_9: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::CNTRL_8: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::CNTRL_9: 8
 
 
u16   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::CNTRL_8: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::CNTRL_9: 8
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_s::RAM: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_s::RESERVED1: 15
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_s::RAM: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_s::RESERVED1: 15
 
 
u16   _ADI_DE_REGS_YODA_DE_IA_SELECT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_s::RAM: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_s::RESERVED1: 15
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::RAM_ADDR: 10
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::RAM_ADDR: 10
 
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::RESERVED10: 6
 
 
u16   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::RAM_ADDR: 10
 
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::RESERVED10: 6
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_s::RAM_WRDATA: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_s::RAM_WRDATA: 16
 
 
u16   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_s::RAM_WRDATA: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_s::RAM_WRDATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_s::RAM_WRDATA_ALIAS: 16
 
 
u16   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_s::RAM_WRDATA_ALIAS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_s::RAM_RDDATA: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_s::RAM_RDDATA: 16
 
 
u16   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_s::RAM_RDDATA: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_s::RAM_RDDATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_s::RAM_RDDATA_ALIAS: 16
 
 
u16   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_s::RAM_RDDATA_ALIAS: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_s::BITS16_1: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_s::BITS16_1: 16
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_s::BITS16_1: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_s::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_s::BITS15_0: 16
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_s::BITS15_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::BINSS: 4
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::BINSS: 4
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::RESERVED4: 12
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::BINSS: 4
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::RESERVED4: 12
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_s::BITS16_1: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_s::BITS16_1: 16
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_s::BITS16_1: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_s::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_s::BITS15_0: 16
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_s::BITS15_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::BINSS: 4
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::BINSS: 4
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::RESERVED4: 12
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::BINSS: 4
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::RESERVED4: 12
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::BITS17_AND_0: 2
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::RESERVED2: 14
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_s::BITS16_1: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_s::BITS16_1: 16
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_s::BITS16_1: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_s::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_s::BITS15_0: 16
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_s::BITS15_0: 16
 
   } 
 
   u16   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::BINSS: 4
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::BINSS: 4
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::RESERVED4: 12
 
 
u16   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::BINSS: 4
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::RESERVED4: 12
 
   } 
 
   u16   VALUE16
 
}; 
 
enum spiBitRates spiBitRates_e
 
int   revisionID_t::::major:8
 
int   revisionID_t::::minor:8
 
int   revisionID_t::::patch:8
 
int   revisionID_t::::unused:8
 
struct {
   int   major:8
 
   int   minor:8
 
   int   patch:8
 
   int   unused:8
 
 
uint32_t   revisionID_t::value32
 
union {
   struct {
      int   major:8
 
      int   minor:8
 
      int   patch:8
 
      int   unused:8
 
   } 
 
   uint32_t   value32
 
}; 
 
struct spi_ioc_transfer global_tr
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::SEQUENCE_START_ADDR: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::SEQUENCE_START_ADDR: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::RESERVED12: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::SEQUENCE_START_ADDR: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::SEQUENCE_END_ADDR: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::SEQUENCE_END_ADDR: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::RESERVED12: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::SEQUENCE_END_ADDR: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::START_EXEC: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::STOP_EXEC: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_PAD: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_SEQRAM: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_WAVERAM: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_MAPRAM: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_LC: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_POKE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::START_EXEC: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::STOP_EXEC: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_PAD: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_SEQRAM: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_WAVERAM: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_MAPRAM: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_LC: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_POKE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::START_EXEC: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::STOP_EXEC: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_PAD: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_SEQRAM: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_WAVERAM: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_MAPRAM: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_LC: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_POKE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EN_EXT_SYNC: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EXT_SYNC_MODE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EXT_SYNC_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EN_EXT_SYNC: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EXT_SYNC_MODE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EXT_SYNC_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::RESERVED6: 10
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EN_EXT_SYNC: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EXT_SYNC_MODE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EXT_SYNC_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK_RES: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::SEQ_ENABLE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK_SEQ_RAM_ADDR: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK_RES: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::SEQ_ENABLE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK_SEQ_RAM_ADDR: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK_RES: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::SEQ_ENABLE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK_SEQ_RAM_ADDR: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::UPDATE_STAMP: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::UPDATE_STAMP: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::UPDATE_STAMP: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_DE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED1: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_CSI: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_DATAPATH: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED5: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_SPI_MASTER: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED9: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_PCM: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_LPS2: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_SS: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_LPS1: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_DE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED1: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_CSI: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_DATAPATH: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED5: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_SPI_MASTER: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED9: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_PCM: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_LPS2: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_SS: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_LPS1: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_DE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED1: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_CSI: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_DATAPATH: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED5: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_SPI_MASTER: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED9: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_PCM: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_LPS2: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_SS: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_LPS1: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_RISE_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_FALL_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_RISE_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_FALL_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::RESERVED13: 3
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_RISE_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_FALL_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::PIXGAINTAG1_READOUT_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::PIXGAINTAG1_READOUT_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::PIXGAINTAG1_READOUT_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::PIXGAINTAG1_READOUT_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::RESERVED6: 10
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::PIXGAINTAG1_READOUT_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::PIXGAINTAG1_READOUT_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_RISE_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_FALL_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_RISE_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_FALL_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::RESERVED13: 3
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_RISE_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_FALL_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::PIXSATURATE_READOUT_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::PIXSATURATE_READOUT_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::PIXSATURATE_READOUT_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::PIXSATURATE_READOUT_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::RESERVED6: 10
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::PIXSATURATE_READOUT_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::PIXSATURATE_READOUT_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_CNT_INCR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::NO_OF_ADC_CONVERT: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::NO_OF_POSEDGE_CLKCYCLE: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_INCR_STRIDE: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_INCR_DIR: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_CNT_INCR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::NO_OF_ADC_CONVERT: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::NO_OF_POSEDGE_CLKCYCLE: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_INCR_STRIDE: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_INCR_DIR: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::RESERVED14: 2
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_CNT_INCR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::NO_OF_ADC_CONVERT: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::NO_OF_POSEDGE_CLKCYCLE: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_INCR_STRIDE: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_INCR_DIR: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_RISE_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_FALL_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_RISE_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_FALL_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::RESERVED13: 3
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_RISE_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_FALL_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::PIXGAINTAG0_READOUT_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::PIXGAINTAG0_READOUT_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::PIXGAINTAG0_READOUT_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::PIXGAINTAG0_READOUT_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::RESERVED6: 10
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::PIXGAINTAG0_READOUT_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::PIXGAINTAG0_READOUT_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::I2CRDPREFETCHENABLE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::I2CBURSTMODE: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::I2CRDPREFETCHENABLE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::I2CBURSTMODE: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::RESERVED3: 13
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::I2CRDPREFETCHENABLE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::I2CBURSTMODE: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_I2CCTRL_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_STACK_NO_LSB: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_RPT_CNT_LSB: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::SEQ_STATE_MACHINE_STS: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::RESERVED12: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_STACK_NO_MSB: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_STACK_NO_LSB: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_RPT_CNT_LSB: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::SEQ_STATE_MACHINE_STS: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::RESERVED12: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_STACK_NO_MSB: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_STACK_NO_LSB: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_RPT_CNT_LSB: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::SEQ_STATE_MACHINE_STS: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::RESERVED12: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_STACK_NO_MSB: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_SYS_SEL: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED1: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_PROC_SEL: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED3: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_DE_SEL: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_SYS_SEL: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED1: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_PROC_SEL: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED3: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_DE_SEL: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED5: 11
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_SYS_SEL: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED1: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_PROC_SEL: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED3: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_DE_SEL: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::CALL_RPT_CNT: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::CALL_RPT_CNT: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::RESERVED12: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::CALL_RPT_CNT: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::GT01_SWAP: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::AMP_CLK_FINAL_INVERT: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::GT01_SWAP: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::AMP_CLK_FINAL_INVERT: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::RESERVED2: 14
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GTSWAP_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::GT01_SWAP: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::AMP_CLK_FINAL_INVERT: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GTSWAP_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_PSEUDO_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CAL_STACK_OVRFLOW_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CAL_STACK_UNDR_RUN_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_INVALID_OPCOD_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CSI_TX_PKT_CMD_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_FIRMWARE_PARITY_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_APB_TIMEOUT_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_COLCORRECT_PARITY_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_MIPI_CSI2_UNDERFLOW_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_COMPRESSION_PARITY_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_REG_WR_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_INVALID_OPERAND_ERR_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_USER_DEFINED_ERR_EN: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_PSEUDO_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CAL_STACK_OVRFLOW_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CAL_STACK_UNDR_RUN_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_INVALID_OPCOD_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CSI_TX_PKT_CMD_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_FIRMWARE_PARITY_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_APB_TIMEOUT_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_COLCORRECT_PARITY_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_MIPI_CSI2_UNDERFLOW_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_COMPRESSION_PARITY_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_REG_WR_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_INVALID_OPERAND_ERR_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_USER_DEFINED_ERR_EN: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_PSEUDO_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CAL_STACK_OVRFLOW_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CAL_STACK_UNDR_RUN_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_INVALID_OPCOD_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CSI_TX_PKT_CMD_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_FIRMWARE_PARITY_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_APB_TIMEOUT_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_COLCORRECT_PARITY_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_MIPI_CSI2_UNDERFLOW_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_COMPRESSION_PARITY_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_REG_WR_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_INVALID_OPERAND_ERR_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_USER_DEFINED_ERR_EN: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::SET_PSEUDO_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::RESERVED1: 11
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::SET_USER_DEFINED_ERROR: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::SET_PSEUDO_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::RESERVED1: 11
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::SET_USER_DEFINED_ERROR: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ERRORSET_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::SET_PSEUDO_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::RESERVED1: 11
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSET_t::SET_USER_DEFINED_ERROR: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::PSEUDO_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::CALL_STACK_OVERFLOW_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::CALL_STACK_UNDERRUN_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::INVALID_OPCODE_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::BUF_CSI_TX_PKT_CMD_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::FIRMWARE_PARITY_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::APB_TIMEOUT_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::COLCORRECT_PARITY_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::MIPI_CSI_2_UNDERFLOW_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::COMPRESSION_PARITY_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::REG_WR_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::INVALID_OPERAND_ERROR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::USER_DEFINED_ERROR: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::PSEUDO_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::CALL_STACK_OVERFLOW_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::CALL_STACK_UNDERRUN_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::INVALID_OPCODE_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::BUF_CSI_TX_PKT_CMD_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::FIRMWARE_PARITY_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::APB_TIMEOUT_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::COLCORRECT_PARITY_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::MIPI_CSI_2_UNDERFLOW_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::COMPRESSION_PARITY_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::REG_WR_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::INVALID_OPERAND_ERROR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::USER_DEFINED_ERROR: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::PSEUDO_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::CALL_STACK_OVERFLOW_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::CALL_STACK_UNDERRUN_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::INVALID_OPCODE_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::BUF_CSI_TX_PKT_CMD_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::FIRMWARE_PARITY_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::APB_TIMEOUT_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::COLCORRECT_PARITY_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::MIPI_CSI_2_UNDERFLOW_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::COMPRESSION_PARITY_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::REG_WR_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::INVALID_OPERAND_ERROR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::USER_DEFINED_ERROR: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOCTRL_t::GPIO_DIRECTION: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOCTRL_t::GPIO_DIRECTION: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPIOCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOCTRL_t::GPIO_DIRECTION: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOINPUT_t::GPIO_IN: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOINPUT_t::GPIO_IN: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPIOINPUT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOINPUT_t::GPIO_IN: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOOUTPUTSET_t::GPIO_OUT: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOOUTPUTSET_t::GPIO_OUT: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPIOOUTPUTSET_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOOUTPUTSET_t::GPIO_OUT: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOOUTPUTCLR_t::GPIO_OUT: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOOUTPUTCLR_t::GPIO_OUT: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPIOOUTPUTCLR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOOUTPUTCLR_t::GPIO_OUT: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::READ: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::GLOBAL_RESET: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::READ: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::GLOBAL_RESET: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::RESERVED2: 14
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::READ: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::GLOBAL_RESET: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::RESERVED0: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::AUTO_ROW_INCR_STRIDE_MSB: 5
 
unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::RESERVED0: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::AUTO_ROW_INCR_STRIDE_MSB: 5
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::RESERVED9: 7
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::RESERVED0: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::AUTO_ROW_INCR_STRIDE_MSB: 5
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOFSYNCSNAPSHOT_t::GPIO_FSYNC_SNAPSHOT: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOFSYNCSNAPSHOT_t::GPIO_FSYNC_SNAPSHOT: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPIOFSYNCSNAPSHOT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOFSYNCSNAPSHOT_t::GPIO_FSYNC_SNAPSHOT: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::DATAPATH_DONE_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SHIFT_CHAIN_DONE_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::MIPI_ULPS_END_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::DE_DONE_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SPIM_WRITE_DONE_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SPIM_READ_DONE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::ADCPLL_LOCK_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::TEMP_SENSOR_DONE_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO2_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO3_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO4_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO5_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO6_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO7_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO8_SOURCE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO9_SOURCE: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::DATAPATH_DONE_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SHIFT_CHAIN_DONE_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::MIPI_ULPS_END_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::DE_DONE_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SPIM_WRITE_DONE_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SPIM_READ_DONE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::ADCPLL_LOCK_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::TEMP_SENSOR_DONE_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO2_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO3_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO4_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO5_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO6_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO7_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO8_SOURCE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO9_SOURCE: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::DATAPATH_DONE_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SHIFT_CHAIN_DONE_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::MIPI_ULPS_END_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::DE_DONE_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SPIM_WRITE_DONE_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SPIM_READ_DONE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::ADCPLL_LOCK_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::TEMP_SENSOR_DONE_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO2_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO3_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO4_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO5_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO6_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO7_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO8_SOURCE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO9_SOURCE: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::CTIME_ENABLE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::CTIME_ENABLE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::RESERVED1: 15
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::CTIME_ENABLE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_0_t::CTIME_LO: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_0_t::CTIME_LO: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_CTIME_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_0_t::CTIME_LO: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_1_t::CTIME_HI: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_1_t::CTIME_HI: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_CTIME_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_1_t::CTIME_HI: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_2_t::CAPTURE_START_TIME_LO: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_2_t::CAPTURE_START_TIME_LO: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_CTIME_2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_2_t::CAPTURE_START_TIME_LO: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_3_t::CAPTURE_START_TIME_HI: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_3_t::CAPTURE_START_TIME_HI: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_CTIME_3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_3_t::CAPTURE_START_TIME_HI: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_4_t::CAPTURE_END_TIME_LO: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_4_t::CAPTURE_END_TIME_LO: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_CTIME_4_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_4_t::CAPTURE_END_TIME_LO: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_5_t::CAPTURE_END_TIME_HI: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_5_t::CAPTURE_END_TIME_HI: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_CTIME_5_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_CTIME_5_t::CAPTURE_END_TIME_HI: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_DE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED1: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_CSI: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_DATAPATH: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED5: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_SPI_MASTER: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_BOOT_MEM: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED10: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_PCM: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_LPS2: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_SS: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_LPS1: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_DE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED1: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_CSI: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_DATAPATH: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED5: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_SPI_MASTER: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_BOOT_MEM: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED10: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_PCM: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_LPS2: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_SS: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_LPS1: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_DE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED1: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_CSI: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_DATAPATH: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED5: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_SPI_MASTER: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_BOOT_MEM: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED10: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_PCM: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_LPS2: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_SS: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_LPS1: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCPOLARITY_t::WAIT_FOR_SYNC_POL: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCPOLARITY_t::WAIT_FOR_SYNC_POL: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_WAITFORSYNCPOLARITY_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_WAITFORSYNCPOLARITY_t::WAIT_FOR_SYNC_POL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::SEQRAM_MARGIN: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::SEQRAM_DST: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED3: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::WAVERAM_MARGIN: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::WAVERAM_DST: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED7: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::MAPRAM_MARGIN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::SEQRAM_MARGIN: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::SEQRAM_DST: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED3: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::WAVERAM_MARGIN: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::WAVERAM_DST: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED7: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::MAPRAM_MARGIN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED9: 7
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::SEQRAM_MARGIN: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::SEQRAM_DST: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED3: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::WAVERAM_MARGIN: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::WAVERAM_DST: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED7: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::MAPRAM_MARGIN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::SEQRAM_PARITY_ERR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::MAPRAM_PARITY_ERR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::WAVERAM_PARITY_ERR: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::SEQRAM_PARITY_ERR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::MAPRAM_PARITY_ERR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::WAVERAM_PARITY_ERR: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::RESERVED3: 13
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::SEQRAM_PARITY_ERR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::MAPRAM_PARITY_ERR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::WAVERAM_PARITY_ERR: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPRAM_MARGIN: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPRAM_DST: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::RESERVED3: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPROM_MARGIN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_1024X38_MARGIN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_256X76_MARGIN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_128X76_MARGIN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPRAM_MARGIN: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPRAM_DST: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::RESERVED3: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPROM_MARGIN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_1024X38_MARGIN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_256X76_MARGIN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_128X76_MARGIN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPRAM_MARGIN: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPRAM_DST: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::RESERVED3: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPROM_MARGIN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_1024X38_MARGIN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_256X76_MARGIN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_128X76_MARGIN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_HSP_DFT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::PC: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::RESERVED12: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::COND: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::PC: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::RESERVED12: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::COND: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PCCOND_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::PC: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::RESERVED12: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PCCOND_t::COND: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR0_t::GPR_R0: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR0_t::GPR_R0: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR0_t::GPR_R0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR1_t::GPR_R1: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR1_t::GPR_R1: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR1_t::GPR_R1: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR2_t::GPR_R2: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR2_t::GPR_R2: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR2_t::GPR_R2: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR3_t::GPR_R3: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR3_t::GPR_R3: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR3_t::GPR_R3: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR4_t::GPR_R4: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR4_t::GPR_R4: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR4_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR4_t::GPR_R4: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR5_t::GPR_R5: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR5_t::GPR_R5: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR5_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR5_t::GPR_R5: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR6_t::GPR_R6: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR6_t::GPR_R6: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR6_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR6_t::GPR_R6: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR7_t::GPR_R7: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR7_t::GPR_R7: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR7_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR7_t::GPR_R7: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR8_t::GPR_R8: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR8_t::GPR_R8: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR8_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR8_t::GPR_R8: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR9_t::GPR_R9: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR9_t::GPR_R9: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR9_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR9_t::GPR_R9: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR10_t::GPR_R10: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR10_t::GPR_R10: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR10_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR10_t::GPR_R10: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR11_t::GPR_R11: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR11_t::GPR_R11: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR11_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR11_t::GPR_R11: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR12_t::GPR_R12: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR12_t::GPR_R12: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR12_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR12_t::GPR_R12: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR13_t::GPR_R13: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR13_t::GPR_R13: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR13_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR13_t::GPR_R13: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR14_t::GPR_R14: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR14_t::GPR_R14: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR14_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR14_t::GPR_R14: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR15_t::GPR_R15: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR15_t::GPR_R15: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR15_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR15_t::GPR_R15: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_RISE_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_FALL_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_RISE_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_FALL_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::RESERVED12: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_RISE_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_FALL_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_RISE_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_FALL_CLK_CNT: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_RISE_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_FALL_CLK_CNT: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::RESERVED12: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_RISE_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_FALL_CLK_CNT: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::AMP_CLK3_RISE_CLK_CNT: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::AMP_CLK3_FALL_CLK_CNT: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::AMP_CLK3_RISE_CLK_CNT: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::AMP_CLK3_FALL_CLK_CNT: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::AMP_CLK3_RISE_CLK_CNT: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::AMP_CLK3_FALL_CLK_CNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::AMP_CLK3_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::RESERVED2: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::AMP_CLK3_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::AMP_CLK3_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::RESERVED2: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::AMP_CLK3_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::AMP_CLK3_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::RESERVED2: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::AMP_CLK3_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::NOISE_RESET_RISE_CLK_CNT: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::NOISE_RESET_FALL_CLK_CNT: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::NOISE_RESET_RISE_CLK_CNT: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::NOISE_RESET_FALL_CLK_CNT: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::NOISE_RESET_RISE_CLK_CNT: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::NOISE_RESET_FALL_CLK_CNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::NOISE_RESET_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::RESERVED2: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::NOISE_RESET_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::NOISE_RESET_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::RESERVED2: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::NOISE_RESET_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::NOISE_RESET_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::RESERVED2: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::NOISE_RESET_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::PIX_RESET_RISE_CLK_CNT: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::PIX_RESET_FALL_CLK_CNT: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::PIX_RESET_RISE_CLK_CNT: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::PIX_RESET_FALL_CLK_CNT: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::PIX_RESET_RISE_CLK_CNT: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::PIX_RESET_FALL_CLK_CNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::PIX_RESET_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::RESERVED2: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::PIX_RESET_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::PIX_RESET_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::RESERVED2: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::PIX_RESET_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::PIX_RESET_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::RESERVED2: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::PIX_RESET_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO0_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO1_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO2_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO3_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO4_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO5_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO6_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO7_PIN_FUNC: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO0_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO1_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO2_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO3_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO4_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO5_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO6_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO7_PIN_FUNC: 2
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO0_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO1_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO2_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO3_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO4_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO5_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO6_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO7_PIN_FUNC: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO8_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO9_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO10_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO11_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO12_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO13_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO14_PIN_FUNC: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO15_PIN_FUNC: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO8_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO9_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO10_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO11_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO12_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO13_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO14_PIN_FUNC: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO15_PIN_FUNC: 2
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO8_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO9_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO10_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO11_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO12_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO13_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO14_PIN_FUNC: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO15_PIN_FUNC: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::MUXGRP_SEL: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::RESERVED3: 5
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::CMN_SEL0: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::CMN_SEL1: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::RESERVED14: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::DBG_ENABLE: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::MUXGRP_SEL: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::RESERVED3: 5
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::CMN_SEL0: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::CMN_SEL1: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::RESERVED14: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::DBG_ENABLE: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::MUXGRP_SEL: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::RESERVED3: 5
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::CMN_SEL0: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::CMN_SEL1: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::RESERVED14: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::DBG_ENABLE: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::IPMUX_SEL: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::RESERVED4: 3
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::DBG_ENABLE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::MM_IPMUX_SEL: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::RESERVED10: 5
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::MM_ENABLE: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::IPMUX_SEL: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::RESERVED4: 3
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::DBG_ENABLE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::MM_IPMUX_SEL: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::RESERVED10: 5
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::MM_ENABLE: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::IPMUX_SEL: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::RESERVED4: 3
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::DBG_ENABLE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::MM_IPMUX_SEL: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::RESERVED10: 5
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::MM_ENABLE: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_MM_CTRL_t::MM_OUT_SEL: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_MM_CTRL_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_MM_CTRL_t::MM_OUT_SEL: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_MM_CTRL_t::RESERVED4: 12
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_MM_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_MM_CTRL_t::MM_OUT_SEL: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_MM_CTRL_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::USEQERRJUMPADDR: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::USEQERRJUMPADDR: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::RESERVED12: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::USEQERRJUMPADDR: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::PSEUDO_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::CALL_STACK_OVERFLOW_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::CALL_STACK_UNDERRUN_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::INVALID_OPCODE_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::BUF_MEMORYT_OVERFLOW_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::FIRMWARE_PARITY_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::FRAME_HEADERT_OVERFLOW_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::COLCORRECT_PARITY_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::MIPI_CSI_2T_UNDERFLOW_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::COMPRESSON_PARITY_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::REG_WR_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::INVALID_OPERAND_ERREN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::USER_DEFINED_ERREN: 4
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::PSEUDO_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::CALL_STACK_OVERFLOW_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::CALL_STACK_UNDERRUN_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::INVALID_OPCODE_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::BUF_MEMORYT_OVERFLOW_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::FIRMWARE_PARITY_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::FRAME_HEADERT_OVERFLOW_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::COLCORRECT_PARITY_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::MIPI_CSI_2T_UNDERFLOW_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::COMPRESSON_PARITY_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::REG_WR_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::INVALID_OPERAND_ERREN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::USER_DEFINED_ERREN: 4
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::PSEUDO_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::CALL_STACK_OVERFLOW_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::CALL_STACK_UNDERRUN_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::INVALID_OPCODE_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::BUF_MEMORYT_OVERFLOW_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::FIRMWARE_PARITY_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::FRAME_HEADERT_OVERFLOW_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::COLCORRECT_PARITY_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::MIPI_CSI_2T_UNDERFLOW_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::COMPRESSON_PARITY_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::REG_WR_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::INVALID_OPERAND_ERREN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_STOPERRENA_t::USER_DEFINED_ERREN: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::ASTART: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::REPEAT_COUNT: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::RESERVED13: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::POL: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::ABUSY: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::ASTART: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::REPEAT_COUNT: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::RESERVED13: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::POL: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::ABUSY: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::ASTART: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::REPEAT_COUNT: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::RESERVED13: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::POL: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::ABUSY: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::EXEC_LENGTH: 14
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::CDIV: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::EXEC_LENGTH: 14
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::CDIV: 2
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::EXEC_LENGTH: 14
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::CDIV: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::FALL_TIME: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::RISE_TIME: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::FALL_TIME: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::RISE_TIME: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::FALL_TIME: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::RISE_TIME: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::ADC_CNVT_DELAY: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::ADC_CNVT_DELAY: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::ADC_CNVT_DELAY: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::GAINTAG1_CLK_RISE_CLK_CNT: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::GAINTAG1_CLK_FALL_CLK_CNT: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::GAINTAG1_CLK_RISE_CLK_CNT: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::GAINTAG1_CLK_FALL_CLK_CNT: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::GAINTAG1_CLK_RISE_CLK_CNT: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::GAINTAG1_CLK_FALL_CLK_CNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::GAINTAG1_CLK_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::RESERVED2: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::GAINTAG1_CLK_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::GAINTAG1_CLK_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::RESERVED2: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::GAINTAG1_CLK_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::GAINTAG1_CLK_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::RESERVED2: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::GAINTAG1_CLK_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::GAINTAG_THRESH_RISE_CLK_CNT: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::GAINTAG_THRESH_FALL_CLK_CNT: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::GAINTAG_THRESH_RISE_CLK_CNT: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::GAINTAG_THRESH_FALL_CLK_CNT: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::GAINTAG_THRESH_RISE_CLK_CNT: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::GAINTAG_THRESH_FALL_CLK_CNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::GAINTAG_THRESH_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::RESERVED2: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::GAINTAG_THRESH_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::GAINTAG_THRESH_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::RESERVED2: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::GAINTAG_THRESH_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::GAINTAG_THRESH_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::RESERVED2: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::GAINTAG_THRESH_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::GAINTAG_THRESH_SEL: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::GAINTAG_THRESH_STATIC: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::GAINTAG_THRESH_SEL: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::GAINTAG_THRESH_STATIC: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::RESERVED2: 14
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::GAINTAG_THRESH_SEL: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::GAINTAG_THRESH_STATIC: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::GAINTAG0_CLK_RISE_CLK_CNT: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::GAINTAG0_CLK_FALL_CLK_CNT: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::GAINTAG0_CLK_RISE_CLK_CNT: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::GAINTAG0_CLK_FALL_CLK_CNT: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::GAINTAG0_CLK_RISE_CLK_CNT: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::GAINTAG0_CLK_FALL_CLK_CNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::GAINTAG0_CLK_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::RESERVED2: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::GAINTAG0_CLK_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::GAINTAG0_CLK_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::RESERVED2: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::GAINTAG0_CLK_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::GAINTAG0_CLK_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::RESERVED2: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::GAINTAG0_CLK_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::FORCE_SF_RISE_CLK_CNT: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::FORCE_SF_FALL_CLK_CNT: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::FORCE_SF_RISE_CLK_CNT: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::FORCE_SF_FALL_CLK_CNT: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::FORCE_SF_RISE_CLK_CNT: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::FORCE_SF_FALL_CLK_CNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::FORCE_SF_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::RESERVED2: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::FORCE_SF_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::FORCE_SF_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::RESERVED2: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::FORCE_SF_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::FORCE_SF_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::RESERVED2: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::FORCE_SF_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::FORCE_IPDA_RISE_CLK_CNT: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::FORCE_IPDA_FALL_CLK_CNT: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::FORCE_IPDA_RISE_CLK_CNT: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::FORCE_IPDA_FALL_CLK_CNT: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::FORCE_IPDA_RISE_CLK_CNT: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::FORCE_IPDA_FALL_CLK_CNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::FORCE_IPDA_RISE_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::RESERVED2: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::FORCE_IPDA_FALL_CNVT_CNT: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::FORCE_IPDA_RISE_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::RESERVED2: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::FORCE_IPDA_FALL_CNVT_CNT: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::RESERVED8: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::FORCE_IPDA_RISE_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::RESERVED2: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::FORCE_IPDA_FALL_CNVT_CNT: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::LD_RAM_SEL: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::LD_ADDR: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::LD_RAM_SEL: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::LD_ADDR: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::RESERVED14: 2
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::LD_RAM_SEL: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::LD_ADDR: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RD_RAM_SEL: 2
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RD_ADDR: 12
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RD_RAM_SEL: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RD_ADDR: 12
 
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RESERVED14: 2
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RD_RAM_SEL: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RD_ADDR: 12
 
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_t::LD_DATA: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_t::LD_DATA: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_t::LD_DATA: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_t::LD_DATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_t::LD_DATA_ALIAS: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_t::LD_DATA_ALIAS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_t::USEQ_RAM_RD_DATA: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_t::USEQ_RAM_RD_DATA: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_t::USEQ_RAM_RD_DATA: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_t::USEQ_RAM_RD_DATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_t::USEQ_RAM_RD_DATA_ALIAS: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_t::USEQ_RAM_RD_DATA_ALIAS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::PWM_PERIOD: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::PWM_STEP_SIZE: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::PWM_PERIOD: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::PWM_STEP_SIZE: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::PWM_PERIOD: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::PWM_STEP_SIZE: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::PWM_REPEAT_PER_STEP: 8
 
unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::RESERVED8: 6
 
unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::CURRENT_CG: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::PWM_BUSY: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::PWM_REPEAT_PER_STEP: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::RESERVED8: 6
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::CURRENT_CG: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::PWM_BUSY: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::PWM_REPEAT_PER_STEP: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::RESERVED8: 6
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::CURRENT_CG: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::PWM_BUSY: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::FSYNC_OUT_EN: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::FSYNC_OUT_MODE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::EXT_FSYNC_ESH: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::RESERVED3: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_ESH: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_AUTORESTART: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_FREEZE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_START: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_ESH: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_AUTORESTART: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_FREEZE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_START: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_ESH: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_AUTORESTART: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_FREEZE: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_START: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::FSYNC_OUT_EN: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::FSYNC_OUT_MODE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::EXT_FSYNC_ESH: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::RESERVED3: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_ESH: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_AUTORESTART: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_FREEZE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_START: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_ESH: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_AUTORESTART: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_FREEZE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_START: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_ESH: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_AUTORESTART: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_FREEZE: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_START: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::FSYNC_OUT_EN: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::FSYNC_OUT_MODE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::EXT_FSYNC_ESH: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::RESERVED3: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_ESH: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_AUTORESTART: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_FREEZE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_START: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_ESH: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_AUTORESTART: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_FREEZE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_START: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_ESH: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_AUTORESTART: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_FREEZE: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_START: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::FSYNC_FLAG: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::LSMODCTR_FLAG: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::INTCTR_FLAG: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::SYSCTR_FLAG: 1
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::FSYNC_FLAG: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::LSMODCTR_FLAG: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::INTCTR_FLAG: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::SYSCTR_FLAG: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::RESERVED4: 12
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::FSYNC_FLAG: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::LSMODCTR_FLAG: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::INTCTR_FLAG: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::SYSCTR_FLAG: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_0_t::FSYNC_LSMOD_COUNTER_0: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_0_t::FSYNC_LSMOD_COUNTER_0: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_0_t::FSYNC_LSMOD_COUNTER_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::FSYNC_LSMOD_COUNTER_1: 4
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::FSYNC_LSMOD_COUNTER_1: 4
 
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::RESERVED4: 12
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::FSYNC_LSMOD_COUNTER_1: 4
 
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_0_t::FSYNC_INT_COUNTER_0: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_0_t::FSYNC_INT_COUNTER_0: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_0_t::FSYNC_INT_COUNTER_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_1_t::FSYNC_INT_COUNTER_1: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_1_t::FSYNC_INT_COUNTER_1: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_1_t::FSYNC_INT_COUNTER_1: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_0_t::FSYNC_SYS_COUNTER_0: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_0_t::FSYNC_SYS_COUNTER_0: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_0_t::FSYNC_SYS_COUNTER_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_1_t::FSYNC_SYS_COUNTER_1: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_1_t::FSYNC_SYS_COUNTER_1: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_1_t::FSYNC_SYS_COUNTER_1: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR16_t::GPR_R16: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR16_t::GPR_R16: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR16_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR16_t::GPR_R16: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR17_t::GPR_R17: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR17_t::GPR_R17: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR17_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR17_t::GPR_R17: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR18_t::GPR_R18: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR18_t::GPR_R18: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR18_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR18_t::GPR_R18: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR19_t::GPR_R19: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR19_t::GPR_R19: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR19_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR19_t::GPR_R19: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR20_t::GPR_R20: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR20_t::GPR_R20: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR20_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR20_t::GPR_R20: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR21_t::GPR_R21: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR21_t::GPR_R21: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR21_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR21_t::GPR_R21: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR22_t::GPR_R22: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR22_t::GPR_R22: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR22_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR22_t::GPR_R22: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR23_t::GPR_R23: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR23_t::GPR_R23: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR23_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR23_t::GPR_R23: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR24_t::GPR_R24: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR24_t::GPR_R24: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR24_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR24_t::GPR_R24: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR25_t::GPR_R25: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR25_t::GPR_R25: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR25_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR25_t::GPR_R25: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR26_t::GPR_R26: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR26_t::GPR_R26: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR26_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR26_t::GPR_R26: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR27_t::GPR_R27: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR27_t::GPR_R27: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR27_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR27_t::GPR_R27: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR28_t::GPR_R28: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR28_t::GPR_R28: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR28_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR28_t::GPR_R28: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR29_t::GPR_R29: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR29_t::GPR_R29: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR29_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR29_t::GPR_R29: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR30_t::GPR_R30: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR30_t::GPR_R30: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR30_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR30_t::GPR_R30: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP1_GPRR31_t::GPR_R31: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP1_GPRR31_t::GPR_R31: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP1_GPRR31_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP1_GPRR31_t::GPR_R31: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::CLK_DE_MODE: 1
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_EXT_RESET_SEL: 1
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_EN_10B: 1
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::RESERVED3: 1
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_MUX: 3
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::RESERVED7: 9
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::CLK_DE_MODE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_EXT_RESET_SEL: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_EN_10B: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::RESERVED3: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_MUX: 3
 
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::RESERVED7: 9
 
 
uint16_t   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::CLK_DE_MODE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_EXT_RESET_SEL: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_EN_10B: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::RESERVED3: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_MUX: 3
 
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::RESERVED7: 9
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::ADC_DN_DELAY: 8
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::ADC_UP_DELAY: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::ADC_DN_DELAY: 8
 
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::ADC_UP_DELAY: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::ADC_DN_DELAY: 8
 
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::ADC_UP_DELAY: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::ADC_IRAMP: 9
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::ADC_REGRESET: 1
 
unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::ADC_IRAMP: 9
 
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::ADC_REGRESET: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::RESERVED10: 6
 
 
uint16_t   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::ADC_IRAMP: 9
 
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::ADC_REGRESET: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_PHASE_LOCK_DELAY: 8
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_QP: 5
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_RZ: 2
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_DLPF: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_PHASE_LOCK_DELAY: 8
 
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_QP: 5
 
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_RZ: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_DLPF: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_PHASE_LOCK_DELAY: 8
 
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_QP: 5
 
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_RZ: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_DLPF: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::ADCPLL_LOCK_ACC: 8
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::ADCPLL_UNLOCK_ACC: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::ADCPLL_LOCK_ACC: 8
 
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::ADCPLL_UNLOCK_ACC: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::ADCPLL_LOCK_ACC: 8
 
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::ADCPLL_UNLOCK_ACC: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_C: 5
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::RESERVED5: 3
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_END5: 4
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_TESTMUX: 2
 
unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_TEST_SEL: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_C: 5
 
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::RESERVED5: 3
 
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_END5: 4
 
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_TESTMUX: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_TEST_SEL: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_C: 5
 
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::RESERVED5: 3
 
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_END5: 4
 
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_TESTMUX: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_TEST_SEL: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBA: 4
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBB: 4
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBC: 4
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBD: 4
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBA: 4
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBB: 4
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBC: 4
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBD: 4
 
 
uint16_t   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBA: 4
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBB: 4
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBC: 4
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBD: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINA: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED2: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINB: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED6: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINC: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED10: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CIND: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINA: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED2: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINB: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED6: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINC: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED10: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CIND: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED14: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINA: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED2: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINB: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED6: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINC: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED10: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CIND: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_S: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_TESTSELP: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_TESTSELN: 2
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::GAINTAG_LATCH_INHIBIT: 3
 
unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_S: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_TESTSELP: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_TESTSELN: 2
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::GAINTAG_LATCH_INHIBIT: 3
 
   unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::RESERVED9: 7
 
 
uint16_t   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_S: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_TESTSELP: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_TESTSELN: 2
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::GAINTAG_LATCH_INHIBIT: 3
 
      unsigned int   _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CHIP_ID_t::CHIP_ID: 16
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CHIP_ID_t::CHIP_ID: 16
 
 
uint16_t   _ADI_AI_REGS_YODA_CHIP_ID_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CHIP_ID_t::CHIP_ID: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_STATE: 1
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_QBUF_STATE: 1
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_LIGHT_STATE: 1
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_RSTN: 1
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_XTAL_PRESCALE: 2
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_STATE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_QBUF_STATE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_LIGHT_STATE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_RSTN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_XTAL_PRESCALE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::RESERVED6: 10
 
 
uint16_t   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_STATE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_QBUF_STATE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_LIGHT_STATE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_RSTN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_XTAL_PRESCALE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_CTRL_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::CG_INVERT_CLK: 4
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::RESERVED4: 4
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::CLK_TEST_SEL: 6
 
unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::CG_INVERT_CLK: 4
 
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::RESERVED4: 4
 
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::CLK_TEST_SEL: 6
 
   unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::RESERVED14: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_CKGEN_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::CG_INVERT_CLK: 4
 
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::RESERVED4: 4
 
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::CLK_TEST_SEL: 6
 
      unsigned int   _ADI_AI_REGS_YODA_CKGEN_S1_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CLK_CTRL_t::CLKDE_RESET: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLK_CTRL_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CLK_CTRL_t::CLKDE_RESET: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_CTRL_t::RESERVED1: 15
 
 
uint16_t   _ADI_AI_REGS_YODA_CLK_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CLK_CTRL_t::CLKDE_RESET: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_CTRL_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::CLK_DE_C: 5
 
unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::RESERVED5: 3
 
unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::CLK_DE_END5: 4
 
unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::CLK_DE_C: 5
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::RESERVED5: 3
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::CLK_DE_END5: 4
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::RESERVED12: 4
 
 
uint16_t   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::CLK_DE_C: 5
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::RESERVED5: 3
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::CLK_DE_END5: 4
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::RESERVED0: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_I2X: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TE: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TEST: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TESTD: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::RESERVED0: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_I2X: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TEST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TESTD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::RESERVED5: 11
 
 
uint16_t   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::RESERVED0: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_I2X: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TEST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TESTD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKA_PARK: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKB_PARK: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKIN_EN: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_LPF_EN: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_REST_EN: 1
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKA_PARK: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKB_PARK: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKIN_EN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_LPF_EN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_REST_EN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::RESERVED5: 11
 
 
uint16_t   _ADI_AI_REGS_YODA_CLKTREE0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKA_PARK: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKB_PARK: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKIN_EN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_LPF_EN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_REST_EN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE0_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::DLL_LEAK: 5
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::DLL_CPLF: 7
 
unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::DLL_LEAK: 5
 
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::DLL_CPLF: 7
 
   unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::RESERVED12: 4
 
 
uint16_t   _ADI_AI_REGS_YODA_CLKTREE_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::DLL_LEAK: 5
 
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::DLL_CPLF: 7
 
      unsigned int   _ADI_AI_REGS_YODA_CLKTREE_S1_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_t::DAC_LATCH: 9
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_t::DAC_LATCH: 9
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_t::RESERVED9: 7
 
 
uint16_t   _ADI_AI_REGS_YODA_DAC_CTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_t::DAC_LATCH: 9
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_PD: 10
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_LOWLOAD: 4
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::RESERVED14: 1
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_GLOBAL_PD: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_PD: 10
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_LOWLOAD: 4
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::RESERVED14: 1
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_GLOBAL_PD: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_DAC_CTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_PD: 10
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_LOWLOAD: 4
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::RESERVED14: 1
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_GLOBAL_PD: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::DAC_SPARE1: 8
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::DAC_SHARE: 1
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::COMP_REF_DISABLE: 6
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::DAC_SPARE1: 8
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::DAC_SHARE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::COMP_REF_DISABLE: 6
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::RESERVED15: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::DAC_SPARE1: 8
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::DAC_SHARE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::COMP_REF_DISABLE: 6
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::DAC_SPARE2: 1
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::DAC_SPARE0: 2
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::DAC_SPARE2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::DAC_SPARE0: 2
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::RESERVED3: 13
 
 
uint16_t   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::DAC_SPARE2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::DAC_SPARE0: 2
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::COMP_REF_DAC1: 6
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::RESERVED6: 2
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::COMP_REF_DAC2: 6
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::COMP_REF_DAC1: 6
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::RESERVED6: 2
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::COMP_REF_DAC2: 6
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::RESERVED14: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::COMP_REF_DAC1: 6
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::RESERVED6: 2
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::COMP_REF_DAC2: 6
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::COMP_REF_DAC3: 6
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::RESERVED6: 2
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::COMP_REF_DAC4: 6
 
unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::COMP_REF_DAC3: 6
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::RESERVED6: 2
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::COMP_REF_DAC4: 6
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::RESERVED14: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::COMP_REF_DAC3: 6
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::RESERVED6: 2
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::COMP_REF_DAC4: 6
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DAC_DATA_t::DAC_IN: 8
 
unsigned int   _ADI_AI_REGS_YODA_DAC_DATA_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DAC_DATA_t::DAC_IN: 8
 
   unsigned int   _ADI_AI_REGS_YODA_DAC_DATA_t::RESERVED8: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_DAC_DATA_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DAC_DATA_t::DAC_IN: 8
 
      unsigned int   _ADI_AI_REGS_YODA_DAC_DATA_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IBOUT_ADJ: 4
 
unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IPDA_GAIN: 1
 
unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IPDA_SPARE0: 1
 
unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IBOUT_ADJ: 4
 
   unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IPDA_GAIN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IPDA_SPARE0: 1
 
   unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::RESERVED6: 10
 
 
uint16_t   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IBOUT_ADJ: 4
 
      unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IPDA_GAIN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IPDA_SPARE0: 1
 
      unsigned int   _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::RESERVED0: 1
 
unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_I2X: 1
 
unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TE: 1
 
unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TEST: 1
 
unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TESTD: 1
 
unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::RESERVED0: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_I2X: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TEST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TESTD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::RESERVED5: 11
 
 
uint16_t   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::RESERVED0: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_I2X: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TEST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TESTD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_LSCTRL0_S1_t::LIGHTMUX_SEL: 8
 
unsigned int   _ADI_AI_REGS_YODA_LSCTRL0_S1_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_LSCTRL0_S1_t::LIGHTMUX_SEL: 8
 
   unsigned int   _ADI_AI_REGS_YODA_LSCTRL0_S1_t::RESERVED8: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_LSCTRL0_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_LSCTRL0_S1_t::LIGHTMUX_SEL: 8
 
      unsigned int   _ADI_AI_REGS_YODA_LSCTRL0_S1_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDS_OE: 1
 
unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDSTX_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDS_OE: 1
 
unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDSTX_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDSTX_HZ: 1
 
unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDSTX_HZ: 1
 
unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDS_OE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDSTX_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDS_OE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDSTX_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDSTX_HZ: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDSTX_HZ: 1
 
   unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::RESERVED6: 10
 
 
uint16_t   _ADI_AI_REGS_YODA_LSMOD_EN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDS_OE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDSTX_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDS_OE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDSTX_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDSTX_HZ: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDSTX_HZ: 1
 
      unsigned int   _ADI_AI_REGS_YODA_LSMOD_EN_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::GLOBAL_RESET: 1
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_WRAPEN: 1
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::RESERVED2: 6
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_READ_DEF: 1
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_RESET_DEF: 1
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_CAPODD_DEF: 1
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_CAPEVEN_DEF: 1
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_TX_PD_DEF: 1
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_TX_DEF: 1
 
unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::GLOBAL_RESET: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_WRAPEN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::RESERVED2: 6
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_READ_DEF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_RESET_DEF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_CAPODD_DEF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_CAPEVEN_DEF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_TX_PD_DEF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_TX_DEF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::RESERVED14: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_ROW_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::GLOBAL_RESET: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_WRAPEN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::RESERVED2: 6
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_READ_DEF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_RESET_DEF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_CAPODD_DEF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_CAPEVEN_DEF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_TX_PD_DEF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_TX_DEF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ROW_CTRL_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_RST: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED2: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_RESET_LOCK_LOST: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_RST: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED6: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_RESET_LOCK_LOST: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SYSPLL_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED9: 2
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SYSPLL_RESET_LOCK_LOST: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_RST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_RESET_LOCK_LOST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_RST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED6: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_RESET_LOCK_LOST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SYSPLL_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED9: 2
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SYSPLL_RESET_LOCK_LOST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED12: 4
 
 
uint16_t   _ADI_AI_REGS_YODA_PLL_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_RST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_RESET_LOCK_LOST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_RST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED6: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_RESET_LOCK_LOST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SYSPLL_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED9: 2
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::SYSPLL_RESET_LOCK_LOST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SSPLL_PHASE_LOCK_REG: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SSPLL_LOCK_LOST: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED2: 2
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::ADCPLL_PHASE_LOCK_REG: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::ADCPLL_LOCK_LOST: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED6: 2
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_PHASE_LOCK_REG: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_LOCK_LOST: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_ACTIVE: 1
 
unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED11: 5
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SSPLL_PHASE_LOCK_REG: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SSPLL_LOCK_LOST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED2: 2
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::ADCPLL_PHASE_LOCK_REG: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::ADCPLL_LOCK_LOST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED6: 2
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_PHASE_LOCK_REG: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_LOCK_LOST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_ACTIVE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED11: 5
 
 
uint16_t   _ADI_AI_REGS_YODA_PLL_STATUS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SSPLL_PHASE_LOCK_REG: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SSPLL_LOCK_LOST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED2: 2
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::ADCPLL_PHASE_LOCK_REG: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::ADCPLL_LOCK_LOST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED6: 2
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_PHASE_LOCK_REG: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_LOCK_LOST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_ACTIVE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED11: 5
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::ROW_VECTOR_LD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::PUMP_BYPASS: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::DLL_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::ROW_VECTOR_LD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::PUMP_BYPASS: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::DLL_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::RESERVED3: 13
 
 
uint16_t   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::ROW_VECTOR_LD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::PUMP_BYPASS: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::DLL_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_0_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ADC_RAMP_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::COL_BIAS_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ROW_UP_DNB: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::SAT_DETECT_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::COL_COMPARATOR_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::AMP_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ADC_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::REFGEN_BGR_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ADC_RAMP_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::COL_BIAS_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ROW_UP_DNB: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::SAT_DETECT_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::COL_COMPARATOR_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::AMP_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ADC_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::REFGEN_BGR_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::RESERVED8: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ADC_RAMP_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::COL_BIAS_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ROW_UP_DNB: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::SAT_DETECT_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::COL_COMPARATOR_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::AMP_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ADC_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::REFGEN_BGR_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_READOUT_t::READOUT_PD: 16
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_READOUT_t::READOUT_PD: 16
 
 
uint16_t   _ADI_AI_REGS_YODA_POWER_DOWN_READOUT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_POWER_DOWN_READOUT_t::READOUT_PD: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::PUMP_ADJ: 2
 
unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::RESERVED2: 6
 
unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::QPD: 6
 
unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::PUMP_ADJ: 2
 
   unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::RESERVED2: 6
 
   unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::QPD: 6
 
   unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::RESERVED14: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_PUMP_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::PUMP_ADJ: 2
 
      unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::RESERVED2: 6
 
      unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::QPD: 6
 
      unsigned int   _ADI_AI_REGS_YODA_PUMP_S1_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::BITLINE_TURBO: 2
 
unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::RESERVED2: 1
 
unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::NCDS_MODE: 1
 
unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::SATDETECT_S: 1
 
unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::BITLINE_TURBO: 2
 
   unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::RESERVED2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::NCDS_MODE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::SATDETECT_S: 1
 
   unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::RESERVED5: 11
 
 
uint16_t   _ADI_AI_REGS_YODA_READOUT_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::BITLINE_TURBO: 2
 
      unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::RESERVED2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::NCDS_MODE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::SATDETECT_S: 1
 
      unsigned int   _ADI_AI_REGS_YODA_READOUT_S1_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RESETB1: 1
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RD_WRB: 1
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_START1: 1
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_BUSY1: 1
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED4: 4
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RESETB2: 1
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED9: 1
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_START2: 1
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_BUSY2: 1
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED12: 3
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_READ_SHIFT: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RESETB1: 1
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RD_WRB: 1
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_START1: 1
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_BUSY1: 1
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED4: 4
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RESETB2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED9: 1
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_START2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_BUSY2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED12: 3
 
   unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_READ_SHIFT: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_REGIF_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RESETB1: 1
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RD_WRB: 1
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_START1: 1
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_BUSY1: 1
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED4: 4
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RESETB2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED9: 1
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_START2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_BUSY2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED12: 3
 
      unsigned int   _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_READ_SHIFT: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_REGIF_RDATA_t::REGIF_READ_DATA: 16
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_REGIF_RDATA_t::REGIF_READ_DATA: 16
 
 
uint16_t   _ADI_AI_REGS_YODA_REGIF_RDATA_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_REGIF_RDATA_t::REGIF_READ_DATA: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_PHASE_LOCK_DELAY: 8
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_QP: 5
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_RZ: 2
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_DLPF: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_PHASE_LOCK_DELAY: 8
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_QP: 5
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_RZ: 2
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_DLPF: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_PHASE_LOCK_DELAY: 8
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_QP: 5
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_RZ: 2
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_DLPF: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::SSPLL_LOCK_ACC: 8
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::SSPLL_UNLOCK_ACC: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::SSPLL_LOCK_ACC: 8
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::SSPLL_UNLOCK_ACC: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::SSPLL_LOCK_ACC: 8
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::SSPLL_UNLOCK_ACC: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_C: 5
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::RESERVED5: 3
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_END5: 4
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_TESTMUX: 2
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_TEST_SEL: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_C: 5
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::RESERVED5: 3
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_END5: 4
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_TESTMUX: 2
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_TEST_SEL: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_C: 5
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::RESERVED5: 3
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_END5: 4
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_TESTMUX: 2
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_TEST_SEL: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_PHASE_LOCK_DELAY: 8
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_QP: 5
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_RZ: 2
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_DLPF: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_PHASE_LOCK_DELAY: 8
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_QP: 5
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_RZ: 2
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_DLPF: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_PHASE_LOCK_DELAY: 8
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_QP: 5
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_RZ: 2
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_DLPF: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::SYSPLL_LOCK_ACC: 8
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::SYSPLL_UNLOCK_ACC: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::SYSPLL_LOCK_ACC: 8
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::SYSPLL_UNLOCK_ACC: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::SYSPLL_LOCK_ACC: 8
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::SYSPLL_UNLOCK_ACC: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_M: 6
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::RESERVED6: 1
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_N: 1
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_P: 6
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::RESERVED14: 1
 
unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_LX: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_M: 6
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::RESERVED6: 1
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_N: 1
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_P: 6
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::RESERVED14: 1
 
   unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_LX: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_M: 6
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::RESERVED6: 1
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_N: 1
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_P: 6
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::RESERVED14: 1
 
      unsigned int   _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_LX: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::ANA_TEST_MUX: 5
 
unsigned int   _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::ANA_TEST_MUX: 5
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::RESERVED5: 11
 
 
uint16_t   _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::ANA_TEST_MUX: 5
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_CALIB_ENABLE: 1
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_CALIB_INPUTS: 1
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED2: 1
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_FREQ_SELECT: 1
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED4: 4
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_FSADJ: 7
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_CALIB_ENABLE: 1
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_CALIB_INPUTS: 1
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_FREQ_SELECT: 1
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED4: 4
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_FSADJ: 7
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED15: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_CALIB_ENABLE: 1
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_CALIB_INPUTS: 1
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_FREQ_SELECT: 1
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED4: 4
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_FSADJ: 7
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_INIT_LOGIC: 1
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_RST: 1
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_PD: 1
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::RESERVED3: 12
 
unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_EOC_REG: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_INIT_LOGIC: 1
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_RST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_PD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::RESERVED3: 12
 
   unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_EOC_REG: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_TS_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_INIT_LOGIC: 1
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_RST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_PD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::RESERVED3: 12
 
      unsigned int   _ADI_AI_REGS_YODA_TS_CTRL_t::TS_EOC_REG: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::TS_Q_REG: 12
 
unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::TS_OVRFL_REG: 1
 
unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::TS_Q_REG: 12
 
   unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::TS_OVRFL_REG: 1
 
   unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::RESERVED13: 3
 
 
uint16_t   _ADI_AI_REGS_YODA_TS_DATA_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::TS_Q_REG: 12
 
      unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::TS_OVRFL_REG: 1
 
      unsigned int   _ADI_AI_REGS_YODA_TS_DATA_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOWENABLECTRL: 3
 
unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::RESERVED3: 5
 
unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOW_LIN_EN: 1
 
unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::RESERVED9: 6
 
unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOW_LIN_PD: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOWENABLECTRL: 3
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::RESERVED3: 5
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOW_LIN_EN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::RESERVED9: 6
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOW_LIN_PD: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWENABLE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOWENABLECTRL: 3
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::RESERVED3: 5
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOW_LIN_EN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::RESERVED9: 6
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOW_LIN_PD: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOWSETPOINTCTRL: 7
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOW_GMPS2X: 1
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOW_SPARE: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOWSETPOINTCTRL: 7
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOW_GMPS2X: 1
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOW_SPARE: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOWSETPOINTCTRL: 7
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOW_GMPS2X: 1
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOW_SPARE: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL1_S2_t::VLOWMISCCTRL: 16
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL1_S2_t::VLOWMISCCTRL: 16
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWREGCTRL1_S2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL1_S2_t::VLOWMISCCTRL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VLOWCLKLOCNT: 8
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VLOWCLKHICNT: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VLOWCLKLOCNT: 8
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VLOWCLKHICNT: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VLOWCLKLOCNT: 8
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VLOWCLKHICNT: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL3_S2_t::VREGMISCCTRL: 16
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL3_S2_t::VREGMISCCTRL: 16
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWREGCTRL3_S2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL3_S2_t::VREGMISCCTRL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VLOW_SW_VADJ: 6
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::RESERVED6: 2
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VLOW_LIN_VADJ: 6
 
unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::RESERVED14: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VLOW_SW_VADJ: 6
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::RESERVED6: 2
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VLOW_LIN_VADJ: 6
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::RESERVED14: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VLOW_SW_VADJ: 6
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::RESERVED6: 2
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VLOW_LIN_VADJ: 6
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::RESERVED14: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VLOW_IC_START: 1
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VLOW_IGNORE_CNT: 15
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VLOW_IC_START: 1
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VLOW_IGNORE_CNT: 15
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VLOW_IC_START: 1
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VLOW_IGNORE_CNT: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VLOW_HITIME_CTR: 8
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VLOW_EVENT_CTR: 8
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VLOW_HITIME_CTR: 8
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VLOW_EVENT_CTR: 8
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VLOW_HITIME_CTR: 8
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VLOW_EVENT_CTR: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RD: 1
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RD_RDY: 1
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RESET: 1
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RD: 1
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RD_RDY: 1
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RESET: 1
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::RESERVED3: 13
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RD: 1
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RD_RDY: 1
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RESET: 1
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::SHO_VLOW: 1
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::VLOW_SHO_DETECT: 1
 
unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::SHO_VLOW: 1
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::VLOW_SHO_DETECT: 1
 
   unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::RESERVED2: 14
 
 
uint16_t   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::SHO_VLOW: 1
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::VLOW_SHO_DETECT: 1
 
      unsigned int   _ADI_AI_REGS_YODA_VLOWSHODETECT_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED0: 4
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST_SET: 1
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST_CLEAR: 1
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST: 1
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED7: 1
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS_SET: 1
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS_CLEAR: 1
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS: 1
 
unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED11: 5
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED0: 4
 
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST_SET: 1
 
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST_CLEAR: 1
 
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST: 1
 
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED7: 1
 
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS_SET: 1
 
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS_CLEAR: 1
 
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS: 1
 
   unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED11: 5
 
 
uint16_t   _ADI_AI_REGS_YODA_XOSC_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED0: 4
 
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST_SET: 1
 
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST_CLEAR: 1
 
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST: 1
 
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED7: 1
 
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS_SET: 1
 
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS_CLEAR: 1
 
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS: 1
 
      unsigned int   _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED11: 5
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CHAIN1_LEN_t::CHAIN1_LEN: 9
 
unsigned int   _ADI_AI_REGS_YODA_CHAIN1_LEN_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CHAIN1_LEN_t::CHAIN1_LEN: 9
 
   unsigned int   _ADI_AI_REGS_YODA_CHAIN1_LEN_t::RESERVED9: 7
 
 
uint16_t   _ADI_AI_REGS_YODA_CHAIN1_LEN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CHAIN1_LEN_t::CHAIN1_LEN: 9
 
      unsigned int   _ADI_AI_REGS_YODA_CHAIN1_LEN_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_CHAIN2_LEN_t::CHAIN2_LEN: 9
 
unsigned int   _ADI_AI_REGS_YODA_CHAIN2_LEN_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_CHAIN2_LEN_t::CHAIN2_LEN: 9
 
   unsigned int   _ADI_AI_REGS_YODA_CHAIN2_LEN_t::RESERVED9: 7
 
 
uint16_t   _ADI_AI_REGS_YODA_CHAIN2_LEN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_CHAIN2_LEN_t::CHAIN2_LEN: 9
 
      unsigned int   _ADI_AI_REGS_YODA_CHAIN2_LEN_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::SSPLL_ACOFF: 1
 
unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::SSPLL_ACOFF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::RESERVED1: 15
 
 
uint16_t   _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::SSPLL_ACOFF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_CDN: 1
 
unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_SDN: 1
 
unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_DIR: 1
 
unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_PD_DEF: 1
 
unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_CDN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_SDN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_DIR: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_PD_DEF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::RESERVED4: 12
 
 
uint16_t   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_CDN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_SDN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_DIR: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_PD_DEF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_PIXEL_BIAS_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::RESERVED0: 2
 
unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_SREG_DIR: 1
 
unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_EN_SDN: 1
 
unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_EN_CDN: 1
 
unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::RESERVED0: 2
 
   unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_SREG_DIR: 1
 
   unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_EN_SDN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_EN_CDN: 1
 
   unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::RESERVED5: 11
 
 
uint16_t   _ADI_AI_REGS_YODA_DLL_CONTROL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::RESERVED0: 2
 
      unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_SREG_DIR: 1
 
      unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_EN_SDN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_EN_CDN: 1
 
      unsigned int   _ADI_AI_REGS_YODA_DLL_CONTROL_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::AMP_CLK2_DUMMY: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::SEL_D2ORD3N_LOAD1: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::XA: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::XAGCOFF: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::AMP_CLK2_DUMMY: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::SEL_D2ORD3N_LOAD1: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::XA: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::XAGCOFF: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::RESERVED5: 11
 
 
uint16_t   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::AMP_CLK2_DUMMY: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::SEL_D2ORD3N_LOAD1: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::XA: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::XAGCOFF: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_0_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::TS_SOC_CAL: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::DLL_OPTION_1: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::SEL_D2ORD3N_LOAD2: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::DLL_OPTION_2: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::ADC_RAMP_CM_SEL: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::ANA_SPARE_I1: 9
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::TS_SOC_CAL: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::DLL_OPTION_1: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::SEL_D2ORD3N_LOAD2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::DLL_OPTION_2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::ADC_RAMP_CM_SEL: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::ANA_SPARE_I1: 9
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::RESERVED15: 1
 
 
uint16_t   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::TS_SOC_CAL: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::DLL_OPTION_1: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::SEL_D2ORD3N_LOAD2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::DLL_OPTION_2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::ADC_RAMP_CM_SEL: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::ANA_SPARE_I1: 9
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SPARE_1_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::ROW_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::PUMP_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::TS_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::SYSPLL_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::ADCPLL_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::SSPLL_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::DAC_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::DLL_SPARE: 2
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::ROW_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::PUMP_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::TS_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::SYSPLL_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::ADCPLL_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::SSPLL_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::DAC_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::DLL_SPARE: 2
 
 
uint16_t   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::ROW_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::PUMP_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::TS_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::SYSPLL_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::ADCPLL_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::SSPLL_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::DAC_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::DLL_SPARE: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LSMOD_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::CG_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE: 2
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE2: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE3: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::IPDA_SPARE1: 1
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LSMOD_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::CG_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE: 2
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE2: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE3: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::IPDA_SPARE1: 1
 
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::RESERVED9: 7
 
 
uint16_t   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LSMOD_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::CG_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE: 2
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE2: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE3: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::IPDA_SPARE1: 1
 
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_2_t::ARRAY_SPARE: 16
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_2_t::ARRAY_SPARE: 16
 
 
uint16_t   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_2_t::ARRAY_SPARE: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::DEBUG_MUX_CONTROL: 6
 
unsigned int   _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::DEBUG_MUX_CONTROL: 6
 
   unsigned int   _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::RESERVED6: 10
 
 
uint16_t   _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::DEBUG_MUX_CONTROL: 6
 
      unsigned int   _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_SCRATCHPAD_0__t::SCRATCHPAD: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_SCRATCHPAD_0__t::SCRATCHPAD: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_SCRATCHPAD_0__t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_SCRATCHPAD_0__t::SCRATCHPAD: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::CK1RISE: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::RESERVED7: 1
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::CK1FALL: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::CK1RISE: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::RESERVED7: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::CK1FALL: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::CK1RISE: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::RESERVED7: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::CK1FALL: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::CK2RISE: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::RESERVED7: 1
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::CK2FALL: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::CK2RISE: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::RESERVED7: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::CK2FALL: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::CK2RISE: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::RESERVED7: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::CK2FALL: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::CK1REFRISE: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::RESERVED7: 1
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::CK1REFFALL: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::CK1REFRISE: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::RESERVED7: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::CK1REFFALL: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::CK1REFRISE: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::RESERVED7: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::CK1REFFALL: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::CK2REFRISE: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::RESERVED7: 1
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::CK2REFFALL: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::CK2REFRISE: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::RESERVED7: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::CK2REFFALL: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::CK2REFRISE: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::RESERVED7: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::CK2REFFALL: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::L1RISE: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::RESERVED7: 1
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::L1FALL: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::L1RISE: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::RESERVED7: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::L1FALL: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::L1RISE: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::RESERVED7: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::L1FALL: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::L2RISE: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::RESERVED7: 1
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::L2FALL: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::L2RISE: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::RESERVED7: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::L2FALL: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::RESERVED15: 1
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::L2RISE: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::RESERVED7: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::L2FALL: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1RISE_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1FALL_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2RISE_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2FALL_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1REFRISE_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1REFFALL_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2REFRISE_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2REFFALL_MSB: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1RISE_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1FALL_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2RISE_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2FALL_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1REFRISE_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1REFFALL_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2REFRISE_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2REFFALL_MSB: 2
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1RISE_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1FALL_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2RISE_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2FALL_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1REFRISE_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1REFFALL_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2REFRISE_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2REFFALL_MSB: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::CYCLE_MST: 7
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::CGBM: 1
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L1RISE_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L1FALL_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L2RISE_MSB: 2
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L2FALL_MSB: 2
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::CYCLE_MST: 7
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::CGBM: 1
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L1RISE_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L1FALL_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L2RISE_MSB: 2
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L2FALL_MSB: 2
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::CYCLE_MST: 7
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::CGBM: 1
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L1RISE_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L1FALL_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L2RISE_MSB: 2
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L2FALL_MSB: 2
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::CLKOFFSET: 8
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::REFCLKOFFSET: 8
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::CLKOFFSET: 8
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::REFCLKOFFSET: 8
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::CLKOFFSET: 8
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::REFCLKOFFSET: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_LTOFFSET_t::LTOFFSET: 16
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_LTOFFSET_t::LTOFFSET: 16
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_LTOFFSET_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_LTOFFSET_t::LTOFFSET: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::BURSTPERIOD: 11
 
unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::RESERVED11: 5
 
struct {
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::BURSTPERIOD: 11
 
   unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::RESERVED11: 5
 
 
uint16_t   _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::BURSTPERIOD: 11
 
      unsigned int   _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::RESERVED11: 5
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_CTRLR0_t::DFS: 4
 
unsigned int   _ADI_SPIM_REGS_CTRLR0_t::FRF: 2
 
unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SCPH: 1
 
unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SCPOL: 1
 
unsigned int   _ADI_SPIM_REGS_CTRLR0_t::TMOD: 2
 
unsigned int   _ADI_SPIM_REGS_CTRLR0_t::NOT_USED: 1
 
unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SRL: 1
 
unsigned int   _ADI_SPIM_REGS_CTRLR0_t::CFS: 4
 
struct {
   unsigned int   _ADI_SPIM_REGS_CTRLR0_t::DFS: 4
 
   unsigned int   _ADI_SPIM_REGS_CTRLR0_t::FRF: 2
 
   unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SCPH: 1
 
   unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SCPOL: 1
 
   unsigned int   _ADI_SPIM_REGS_CTRLR0_t::TMOD: 2
 
   unsigned int   _ADI_SPIM_REGS_CTRLR0_t::NOT_USED: 1
 
   unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SRL: 1
 
   unsigned int   _ADI_SPIM_REGS_CTRLR0_t::CFS: 4
 
 
uint16_t   _ADI_SPIM_REGS_CTRLR0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_CTRLR0_t::DFS: 4
 
      unsigned int   _ADI_SPIM_REGS_CTRLR0_t::FRF: 2
 
      unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SCPH: 1
 
      unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SCPOL: 1
 
      unsigned int   _ADI_SPIM_REGS_CTRLR0_t::TMOD: 2
 
      unsigned int   _ADI_SPIM_REGS_CTRLR0_t::NOT_USED: 1
 
      unsigned int   _ADI_SPIM_REGS_CTRLR0_t::SRL: 1
 
      unsigned int   _ADI_SPIM_REGS_CTRLR0_t::CFS: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_CTRLR1_t::NDF: 16
 
struct {
   unsigned int   _ADI_SPIM_REGS_CTRLR1_t::NDF: 16
 
 
uint16_t   _ADI_SPIM_REGS_CTRLR1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_CTRLR1_t::NDF: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_SSIENR_t::SSI_EN: 1
 
unsigned int   _ADI_SPIM_REGS_SSIENR_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_SPIM_REGS_SSIENR_t::SSI_EN: 1
 
   unsigned int   _ADI_SPIM_REGS_SSIENR_t::RESERVED1: 15
 
 
uint16_t   _ADI_SPIM_REGS_SSIENR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_SSIENR_t::SSI_EN: 1
 
      unsigned int   _ADI_SPIM_REGS_SSIENR_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_MWCR_t::MWMOD: 1
 
unsigned int   _ADI_SPIM_REGS_MWCR_t::MDD: 1
 
unsigned int   _ADI_SPIM_REGS_MWCR_t::MHS: 1
 
unsigned int   _ADI_SPIM_REGS_MWCR_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_SPIM_REGS_MWCR_t::MWMOD: 1
 
   unsigned int   _ADI_SPIM_REGS_MWCR_t::MDD: 1
 
   unsigned int   _ADI_SPIM_REGS_MWCR_t::MHS: 1
 
   unsigned int   _ADI_SPIM_REGS_MWCR_t::RESERVED3: 13
 
 
uint16_t   _ADI_SPIM_REGS_MWCR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_MWCR_t::MWMOD: 1
 
      unsigned int   _ADI_SPIM_REGS_MWCR_t::MDD: 1
 
      unsigned int   _ADI_SPIM_REGS_MWCR_t::MHS: 1
 
      unsigned int   _ADI_SPIM_REGS_MWCR_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_SER_t::SER: 1
 
unsigned int   _ADI_SPIM_REGS_SER_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_SPIM_REGS_SER_t::SER: 1
 
   unsigned int   _ADI_SPIM_REGS_SER_t::RESERVED1: 15
 
 
uint16_t   _ADI_SPIM_REGS_SER_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_SER_t::SER: 1
 
      unsigned int   _ADI_SPIM_REGS_SER_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_BAUDR_t::SCKDV: 16
 
struct {
   unsigned int   _ADI_SPIM_REGS_BAUDR_t::SCKDV: 16
 
 
uint16_t   _ADI_SPIM_REGS_BAUDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_BAUDR_t::SCKDV: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_TXFTLR_t::TFT: 2
 
unsigned int   _ADI_SPIM_REGS_TXFTLR_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_SPIM_REGS_TXFTLR_t::TFT: 2
 
   unsigned int   _ADI_SPIM_REGS_TXFTLR_t::RESERVED2: 14
 
 
uint16_t   _ADI_SPIM_REGS_TXFTLR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_TXFTLR_t::TFT: 2
 
      unsigned int   _ADI_SPIM_REGS_TXFTLR_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_RXFTLR_t::RFT: 1
 
unsigned int   _ADI_SPIM_REGS_RXFTLR_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_SPIM_REGS_RXFTLR_t::RFT: 1
 
   unsigned int   _ADI_SPIM_REGS_RXFTLR_t::RESERVED1: 15
 
 
uint16_t   _ADI_SPIM_REGS_RXFTLR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_RXFTLR_t::RFT: 1
 
      unsigned int   _ADI_SPIM_REGS_RXFTLR_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_TXFLR_t::TXTFL: 3
 
unsigned int   _ADI_SPIM_REGS_TXFLR_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_SPIM_REGS_TXFLR_t::TXTFL: 3
 
   unsigned int   _ADI_SPIM_REGS_TXFLR_t::RESERVED3: 13
 
 
uint16_t   _ADI_SPIM_REGS_TXFLR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_TXFLR_t::TXTFL: 3
 
      unsigned int   _ADI_SPIM_REGS_TXFLR_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_RXFLR_t::RXTFL: 2
 
unsigned int   _ADI_SPIM_REGS_RXFLR_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_SPIM_REGS_RXFLR_t::RXTFL: 2
 
   unsigned int   _ADI_SPIM_REGS_RXFLR_t::RESERVED2: 14
 
 
uint16_t   _ADI_SPIM_REGS_RXFLR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_RXFLR_t::RXTFL: 2
 
      unsigned int   _ADI_SPIM_REGS_RXFLR_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_SR_t::BUSY: 1
 
unsigned int   _ADI_SPIM_REGS_SR_t::TFNF: 1
 
unsigned int   _ADI_SPIM_REGS_SR_t::TFE: 1
 
unsigned int   _ADI_SPIM_REGS_SR_t::RFNE: 1
 
unsigned int   _ADI_SPIM_REGS_SR_t::RFF: 1
 
unsigned int   _ADI_SPIM_REGS_SR_t::RESERVED5: 1
 
unsigned int   _ADI_SPIM_REGS_SR_t::DCOL: 1
 
unsigned int   _ADI_SPIM_REGS_SR_t::RESERVED7: 9
 
struct {
   unsigned int   _ADI_SPIM_REGS_SR_t::BUSY: 1
 
   unsigned int   _ADI_SPIM_REGS_SR_t::TFNF: 1
 
   unsigned int   _ADI_SPIM_REGS_SR_t::TFE: 1
 
   unsigned int   _ADI_SPIM_REGS_SR_t::RFNE: 1
 
   unsigned int   _ADI_SPIM_REGS_SR_t::RFF: 1
 
   unsigned int   _ADI_SPIM_REGS_SR_t::RESERVED5: 1
 
   unsigned int   _ADI_SPIM_REGS_SR_t::DCOL: 1
 
   unsigned int   _ADI_SPIM_REGS_SR_t::RESERVED7: 9
 
 
uint16_t   _ADI_SPIM_REGS_SR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_SR_t::BUSY: 1
 
      unsigned int   _ADI_SPIM_REGS_SR_t::TFNF: 1
 
      unsigned int   _ADI_SPIM_REGS_SR_t::TFE: 1
 
      unsigned int   _ADI_SPIM_REGS_SR_t::RFNE: 1
 
      unsigned int   _ADI_SPIM_REGS_SR_t::RFF: 1
 
      unsigned int   _ADI_SPIM_REGS_SR_t::RESERVED5: 1
 
      unsigned int   _ADI_SPIM_REGS_SR_t::DCOL: 1
 
      unsigned int   _ADI_SPIM_REGS_SR_t::RESERVED7: 9
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_IMR_t::TXEIM: 1
 
unsigned int   _ADI_SPIM_REGS_IMR_t::TXOIM: 1
 
unsigned int   _ADI_SPIM_REGS_IMR_t::RXUIM: 1
 
unsigned int   _ADI_SPIM_REGS_IMR_t::RXOIM: 1
 
unsigned int   _ADI_SPIM_REGS_IMR_t::RXFIM: 1
 
unsigned int   _ADI_SPIM_REGS_IMR_t::MSTIM: 1
 
unsigned int   _ADI_SPIM_REGS_IMR_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_SPIM_REGS_IMR_t::TXEIM: 1
 
   unsigned int   _ADI_SPIM_REGS_IMR_t::TXOIM: 1
 
   unsigned int   _ADI_SPIM_REGS_IMR_t::RXUIM: 1
 
   unsigned int   _ADI_SPIM_REGS_IMR_t::RXOIM: 1
 
   unsigned int   _ADI_SPIM_REGS_IMR_t::RXFIM: 1
 
   unsigned int   _ADI_SPIM_REGS_IMR_t::MSTIM: 1
 
   unsigned int   _ADI_SPIM_REGS_IMR_t::RESERVED6: 10
 
 
uint16_t   _ADI_SPIM_REGS_IMR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_IMR_t::TXEIM: 1
 
      unsigned int   _ADI_SPIM_REGS_IMR_t::TXOIM: 1
 
      unsigned int   _ADI_SPIM_REGS_IMR_t::RXUIM: 1
 
      unsigned int   _ADI_SPIM_REGS_IMR_t::RXOIM: 1
 
      unsigned int   _ADI_SPIM_REGS_IMR_t::RXFIM: 1
 
      unsigned int   _ADI_SPIM_REGS_IMR_t::MSTIM: 1
 
      unsigned int   _ADI_SPIM_REGS_IMR_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_ISR_t::TXEIS: 1
 
unsigned int   _ADI_SPIM_REGS_ISR_t::TXOIS: 1
 
unsigned int   _ADI_SPIM_REGS_ISR_t::RXUIS: 1
 
unsigned int   _ADI_SPIM_REGS_ISR_t::RXOIS: 1
 
unsigned int   _ADI_SPIM_REGS_ISR_t::RXFIS: 1
 
unsigned int   _ADI_SPIM_REGS_ISR_t::MSTIS: 1
 
unsigned int   _ADI_SPIM_REGS_ISR_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_SPIM_REGS_ISR_t::TXEIS: 1
 
   unsigned int   _ADI_SPIM_REGS_ISR_t::TXOIS: 1
 
   unsigned int   _ADI_SPIM_REGS_ISR_t::RXUIS: 1
 
   unsigned int   _ADI_SPIM_REGS_ISR_t::RXOIS: 1
 
   unsigned int   _ADI_SPIM_REGS_ISR_t::RXFIS: 1
 
   unsigned int   _ADI_SPIM_REGS_ISR_t::MSTIS: 1
 
   unsigned int   _ADI_SPIM_REGS_ISR_t::RESERVED6: 10
 
 
uint16_t   _ADI_SPIM_REGS_ISR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_ISR_t::TXEIS: 1
 
      unsigned int   _ADI_SPIM_REGS_ISR_t::TXOIS: 1
 
      unsigned int   _ADI_SPIM_REGS_ISR_t::RXUIS: 1
 
      unsigned int   _ADI_SPIM_REGS_ISR_t::RXOIS: 1
 
      unsigned int   _ADI_SPIM_REGS_ISR_t::RXFIS: 1
 
      unsigned int   _ADI_SPIM_REGS_ISR_t::MSTIS: 1
 
      unsigned int   _ADI_SPIM_REGS_ISR_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_RISR_t::TXEIR: 1
 
unsigned int   _ADI_SPIM_REGS_RISR_t::TXOIR: 1
 
unsigned int   _ADI_SPIM_REGS_RISR_t::RXUIR: 1
 
unsigned int   _ADI_SPIM_REGS_RISR_t::RXOIR: 1
 
unsigned int   _ADI_SPIM_REGS_RISR_t::RXFIR: 1
 
unsigned int   _ADI_SPIM_REGS_RISR_t::MSTIR: 1
 
unsigned int   _ADI_SPIM_REGS_RISR_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_SPIM_REGS_RISR_t::TXEIR: 1
 
   unsigned int   _ADI_SPIM_REGS_RISR_t::TXOIR: 1
 
   unsigned int   _ADI_SPIM_REGS_RISR_t::RXUIR: 1
 
   unsigned int   _ADI_SPIM_REGS_RISR_t::RXOIR: 1
 
   unsigned int   _ADI_SPIM_REGS_RISR_t::RXFIR: 1
 
   unsigned int   _ADI_SPIM_REGS_RISR_t::MSTIR: 1
 
   unsigned int   _ADI_SPIM_REGS_RISR_t::RESERVED6: 10
 
 
uint16_t   _ADI_SPIM_REGS_RISR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_RISR_t::TXEIR: 1
 
      unsigned int   _ADI_SPIM_REGS_RISR_t::TXOIR: 1
 
      unsigned int   _ADI_SPIM_REGS_RISR_t::RXUIR: 1
 
      unsigned int   _ADI_SPIM_REGS_RISR_t::RXOIR: 1
 
      unsigned int   _ADI_SPIM_REGS_RISR_t::RXFIR: 1
 
      unsigned int   _ADI_SPIM_REGS_RISR_t::MSTIR: 1
 
      unsigned int   _ADI_SPIM_REGS_RISR_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_TXOICR_t::TXOICR: 1
 
unsigned int   _ADI_SPIM_REGS_TXOICR_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_SPIM_REGS_TXOICR_t::TXOICR: 1
 
   unsigned int   _ADI_SPIM_REGS_TXOICR_t::RESERVED1: 15
 
 
uint16_t   _ADI_SPIM_REGS_TXOICR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_TXOICR_t::TXOICR: 1
 
      unsigned int   _ADI_SPIM_REGS_TXOICR_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_RXOICR_t::RXOICR: 1
 
unsigned int   _ADI_SPIM_REGS_RXOICR_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_SPIM_REGS_RXOICR_t::RXOICR: 1
 
   unsigned int   _ADI_SPIM_REGS_RXOICR_t::RESERVED1: 15
 
 
uint16_t   _ADI_SPIM_REGS_RXOICR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_RXOICR_t::RXOICR: 1
 
      unsigned int   _ADI_SPIM_REGS_RXOICR_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_RXUICR_t::RXUICR: 1
 
unsigned int   _ADI_SPIM_REGS_RXUICR_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_SPIM_REGS_RXUICR_t::RXUICR: 1
 
   unsigned int   _ADI_SPIM_REGS_RXUICR_t::RESERVED1: 15
 
 
uint16_t   _ADI_SPIM_REGS_RXUICR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_RXUICR_t::RXUICR: 1
 
      unsigned int   _ADI_SPIM_REGS_RXUICR_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_MSTICR_t::MSTICR: 1
 
unsigned int   _ADI_SPIM_REGS_MSTICR_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_SPIM_REGS_MSTICR_t::MSTICR: 1
 
   unsigned int   _ADI_SPIM_REGS_MSTICR_t::RESERVED1: 15
 
 
uint16_t   _ADI_SPIM_REGS_MSTICR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_MSTICR_t::MSTICR: 1
 
      unsigned int   _ADI_SPIM_REGS_MSTICR_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_ICR_t::ICR: 1
 
unsigned int   _ADI_SPIM_REGS_ICR_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_SPIM_REGS_ICR_t::ICR: 1
 
   unsigned int   _ADI_SPIM_REGS_ICR_t::RESERVED1: 15
 
 
uint16_t   _ADI_SPIM_REGS_ICR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_ICR_t::ICR: 1
 
      unsigned int   _ADI_SPIM_REGS_ICR_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_IDR_t::IDCODE: 16
 
struct {
   unsigned int   _ADI_SPIM_REGS_IDR_t::IDCODE: 16
 
 
uint16_t   _ADI_SPIM_REGS_IDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_IDR_t::IDCODE: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_SSI_VERSION_ID_t::SSI_COMP_VERSION: 16
 
struct {
   unsigned int   _ADI_SPIM_REGS_SSI_VERSION_ID_t::SSI_COMP_VERSION: 16
 
 
uint16_t   _ADI_SPIM_REGS_SSI_VERSION_ID_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_SSI_VERSION_ID_t::SSI_COMP_VERSION: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SPIM_REGS_DR0_t::DR0: 16
 
struct {
   unsigned int   _ADI_SPIM_REGS_DR0_t::DR0: 16
 
 
uint16_t   _ADI_SPIM_REGS_DR0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SPIM_REGS_DR0_t::DR0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::CFG_NUM_LANES: 4
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::CFG_NUM_LANES: 4
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::RESERVED4: 12
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::CFG_NUM_LANES: 4
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::CFG_T_PRE: 8
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::CFG_T_PRE: 8
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::RESERVED8: 8
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::CFG_T_PRE: 8
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::CFG_T_POST: 8
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::CFG_T_POST: 8
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::RESERVED8: 8
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::CFG_T_POST: 8
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::CFG_TX_GAP: 8
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::CFG_TX_GAP: 8
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::RESERVED8: 8
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::CFG_TX_GAP: 8
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::CFG_T_CLK_GAP: 8
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::CFG_T_CLK_GAP: 8
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::RESERVED8: 8
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::CFG_T_CLK_GAP: 8
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::CFG_CONTINUOUS_HS_CLK: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::CFG_CONTINUOUS_HS_CLK: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::CFG_CONTINUOUS_HS_CLK: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TWAKEUP_t::CFG_TWAKEUP: 16
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TWAKEUP_t::CFG_TWAKEUP: 16
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TWAKEUP_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TWAKEUP_t::CFG_TWAKEUP: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::ULPS_CLK_ENABLE: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::ULPS_CLK_ENABLE: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::ULPS_CLK_ENABLE: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::ULPS_ENABLE: 2
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::ULPS_ENABLE: 2
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::RESERVED2: 14
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::ULPS_ENABLE: 2
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::ULPS_CLK_ACTIVE: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::ULPS_CLK_ACTIVE: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::ULPS_CLK_ACTIVE: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::ULPS_ACTIVE: 2
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::ULPS_ACTIVE: 2
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::RESERVED2: 14
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::ULPS_ACTIVE: 2
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::IRQ_STATUS: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::IRQ_STATUS: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::IRQ_STATUS: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::IRQ_ENABLE: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::IRQ_ENABLE: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::IRQ_ENABLE: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::IRQ_CLR: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::IRQ_CLR: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::IRQ_CLR: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::CFG_CLK_LANE_EN: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::CFG_CLK_LANE_EN: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::CFG_CLK_LANE_EN: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::CFG_DATA_LANE_EN: 2
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::CFG_DATA_LANE_EN: 2
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::RESERVED2: 14
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::CFG_DATA_LANE_EN: 2
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::CFG_CPHY_EN: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::CFG_CPHY_EN: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::CFG_CPHY_EN: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::CFG_PPI_16_EN: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::CFG_PPI_16_EN: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::CFG_PPI_16_EN: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::CFG_PACKET_INTERFACE_EN: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::CFG_PACKET_INTERFACE_EN: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::CFG_PACKET_INTERFACE_EN: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::CFG_VCX_EN: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::CFG_VCX_EN: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::CFG_VCX_EN: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I_t::CFG_SKEWCAL_TIME_I: 16
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I_t::CFG_SKEWCAL_TIME_I: 16
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I_t::CFG_SKEWCAL_TIME_I: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P_t::CFG_SKEWCAL_TIME_P: 16
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P_t::CFG_SKEWCAL_TIME_P: 16
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P_t::CFG_SKEWCAL_TIME_P: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::CFG_MIXEL_PD_PHY: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::CFG_MIXEL_PD_PLL: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::CFG_MIXEL_PD_PHY: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::CFG_MIXEL_PD_PLL: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::RESERVED2: 14
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::CFG_MIXEL_PD_PHY: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::CFG_MIXEL_PD_PLL: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::CFG_MIXEL_ULPS_PLL_CTRL: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::CFG_MIXEL_ULPS_PLL_CTRL: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::CFG_MIXEL_ULPS_PLL_CTRL: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::CFG_MIXEL_ULPS_PHY_CTRL: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::CFG_MIXEL_ULPS_PHY_CTRL: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::CFG_MIXEL_ULPS_PHY_CTRL: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::CFG_MIXEL_TST_PLL: 4
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::CFG_MIXEL_TST_PLL: 4
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::RESERVED4: 12
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::CFG_MIXEL_TST_PLL: 4
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::CFG_MIXEL_CN: 5
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::CFG_MIXEL_CN: 5
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::RESERVED5: 11
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::CFG_MIXEL_CN: 5
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::CFG_MIXEL_CM: 8
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::CFG_MIXEL_CM: 8
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::RESERVED8: 8
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::CFG_MIXEL_CM: 8
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::CFG_MIXEL_CO: 3
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::CFG_MIXEL_CO: 3
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::RESERVED3: 13
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::CFG_MIXEL_CO: 3
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::CFG_MIXEL_LOCK_BYP: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::CFG_MIXEL_LOCK_BYP: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::CFG_MIXEL_LOCK_BYP: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::CFG_MIXEL_BYPASS_PLL: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::CFG_MIXEL_BYPASS_PLL: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::CFG_MIXEL_BYPASS_PLL: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::CFG_MIXEL_LOCK_LATCH: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::CFG_MIXEL_LOCK_LATCH: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::CFG_MIXEL_LOCK_LATCH: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::CFG_MIXEL_AUTO_PD_EN: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::CFG_MIXEL_AUTO_PD_EN: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::CFG_MIXEL_AUTO_PD_EN: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::CFG_MIXEL_TEST_ENBL: 6
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::CFG_MIXEL_TEST_ENBL: 6
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::RESERVED6: 10
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::CFG_MIXEL_TEST_ENBL: 6
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::CFG_MIXEL_LOCK: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::CFG_MIXEL_LOCK: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::CFG_MIXEL_LOCK: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::CFG_MIXEL_M_PRG_HS_ZERO: 6
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::CFG_MIXEL_M_PRG_HS_ZERO: 6
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::RESERVED6: 10
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::CFG_MIXEL_M_PRG_HS_ZERO: 6
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::CFG_MIXEL_MC_PRG_HS_ZERO: 7
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::RESERVED7: 9
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::CFG_MIXEL_MC_PRG_HS_ZERO: 7
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::RESERVED7: 9
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::CFG_MIXEL_MC_PRG_HS_ZERO: 7
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::RESERVED7: 9
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::CFG_MIXEL_M_PRG_HS_TRAIL: 5
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::CFG_MIXEL_M_PRG_HS_TRAIL: 5
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::RESERVED5: 11
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::CFG_MIXEL_M_PRG_HS_TRAIL: 5
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::CFG_MIXEL_MC_PRG_HS_TRAIL: 5
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::CFG_MIXEL_MC_PRG_HS_TRAIL: 5
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::RESERVED5: 11
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::CFG_MIXEL_MC_PRG_HS_TRAIL: 5
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::CFG_MIXEL_M_PRG_HS_PREPARE: 2
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::CFG_MIXEL_M_PRG_HS_PREPARE: 2
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::RESERVED2: 14
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::CFG_MIXEL_M_PRG_HS_PREPARE: 2
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::CFG_MIXEL_MC_PRG_HS_PREPARE: 1
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::CFG_MIXEL_MC_PRG_HS_PREPARE: 1
 
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::RESERVED1: 15
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::CFG_MIXEL_MC_PRG_HS_PREPARE: 1
 
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0_t::CFG_MIXEL_TEST_PATTERN: 16
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0_t::CFG_MIXEL_TEST_PATTERN: 16
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0_t::CFG_MIXEL_TEST_PATTERN: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1_t::CFG_MIXEL_TEST_PATTERN: 16
 
struct {
   unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1_t::CFG_MIXEL_TEST_PATTERN: 16
 
 
uint16_t   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1_t::CFG_MIXEL_TEST_PATTERN: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_EFUSE_PWR_CTRL_t::POWER_CONTROL: 1
 
unsigned int   _ADI_EFUSE_PWR_CTRL_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_EFUSE_PWR_CTRL_t::POWER_CONTROL: 1
 
   unsigned int   _ADI_EFUSE_PWR_CTRL_t::RESERVED1: 15
 
 
uint16_t   _ADI_EFUSE_PWR_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_EFUSE_PWR_CTRL_t::POWER_CONTROL: 1
 
      unsigned int   _ADI_EFUSE_PWR_CTRL_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_EFUSE_STATUS_t::FUSE_NOT_BURNED: 1
 
unsigned int   _ADI_EFUSE_STATUS_t::FUSE_ACCIDENTAL_BURN: 1
 
unsigned int   _ADI_EFUSE_STATUS_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_EFUSE_STATUS_t::FUSE_NOT_BURNED: 1
 
   unsigned int   _ADI_EFUSE_STATUS_t::FUSE_ACCIDENTAL_BURN: 1
 
   unsigned int   _ADI_EFUSE_STATUS_t::RESERVED2: 14
 
 
uint16_t   _ADI_EFUSE_STATUS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_EFUSE_STATUS_t::FUSE_NOT_BURNED: 1
 
      unsigned int   _ADI_EFUSE_STATUS_t::FUSE_ACCIDENTAL_BURN: 1
 
      unsigned int   _ADI_EFUSE_STATUS_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_EFUSE_ERR_LOCATION_t::PGM_ERR_BIT_ADDR: 12
 
unsigned int   _ADI_EFUSE_ERR_LOCATION_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_EFUSE_ERR_LOCATION_t::PGM_ERR_BIT_ADDR: 12
 
   unsigned int   _ADI_EFUSE_ERR_LOCATION_t::RESERVED12: 4
 
 
uint16_t   _ADI_EFUSE_ERR_LOCATION_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_EFUSE_ERR_LOCATION_t::PGM_ERR_BIT_ADDR: 12
 
      unsigned int   _ADI_EFUSE_ERR_LOCATION_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_EFUSE_TIMING_t::TPGM_PULSE: 8
 
unsigned int   _ADI_EFUSE_TIMING_t::TREAD_PULSE: 2
 
unsigned int   _ADI_EFUSE_TIMING_t::TUNIT: 2
 
unsigned int   _ADI_EFUSE_TIMING_t::TPDPS: 4
 
struct {
   unsigned int   _ADI_EFUSE_TIMING_t::TPGM_PULSE: 8
 
   unsigned int   _ADI_EFUSE_TIMING_t::TREAD_PULSE: 2
 
   unsigned int   _ADI_EFUSE_TIMING_t::TUNIT: 2
 
   unsigned int   _ADI_EFUSE_TIMING_t::TPDPS: 4
 
 
uint16_t   _ADI_EFUSE_TIMING_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_EFUSE_TIMING_t::TPGM_PULSE: 8
 
      unsigned int   _ADI_EFUSE_TIMING_t::TREAD_PULSE: 2
 
      unsigned int   _ADI_EFUSE_TIMING_t::TUNIT: 2
 
      unsigned int   _ADI_EFUSE_TIMING_t::TPDPS: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RM_ENABLE: 1
 
unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED1: 3
 
unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::PGM_MODE: 1
 
unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED5: 3
 
unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::MARGIN: 2
 
unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED10: 2
 
unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::FIXED_ROW_READ: 1
 
unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RM_ENABLE: 1
 
   unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED1: 3
 
   unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::PGM_MODE: 1
 
   unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED5: 3
 
   unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::MARGIN: 2
 
   unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED10: 2
 
   unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::FIXED_ROW_READ: 1
 
   unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED13: 3
 
 
uint16_t   _ADI_EFUSE_CHARACTERIZATION_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RM_ENABLE: 1
 
      unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED1: 3
 
      unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::PGM_MODE: 1
 
      unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED5: 3
 
      unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::MARGIN: 2
 
      unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED10: 2
 
      unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::FIXED_ROW_READ: 1
 
      unsigned int   _ADI_EFUSE_CHARACTERIZATION_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_EFUSE_BLANK_CHECK_t::BLANK_CHECK: 1
 
unsigned int   _ADI_EFUSE_BLANK_CHECK_t::BLANK_CHECK_FAIL: 1
 
unsigned int   _ADI_EFUSE_BLANK_CHECK_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_EFUSE_BLANK_CHECK_t::BLANK_CHECK: 1
 
   unsigned int   _ADI_EFUSE_BLANK_CHECK_t::BLANK_CHECK_FAIL: 1
 
   unsigned int   _ADI_EFUSE_BLANK_CHECK_t::RESERVED2: 14
 
 
uint16_t   _ADI_EFUSE_BLANK_CHECK_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_EFUSE_BLANK_CHECK_t::BLANK_CHECK: 1
 
      unsigned int   _ADI_EFUSE_BLANK_CHECK_t::BLANK_CHECK_FAIL: 1
 
      unsigned int   _ADI_EFUSE_BLANK_CHECK_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ENA: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED1: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_BUSY: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_START_EN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_RPT_EN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ON: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_OFF: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ON_IGNORE: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ENA: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED1: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_BUSY: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_START_EN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_RPT_EN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ON: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_OFF: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ON_IGNORE: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED9: 7
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ENA: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED1: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_BUSY: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_START_EN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_RPT_EN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ON: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_OFF: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ON_IGNORE: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::LPS_WAVE_FREQ: 8
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::LPS_WAVE_FREQ: 8
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::RESERVED8: 8
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::LPS_WAVE_FREQ: 8
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENACC_t::LPS_WG_ACC: 16
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENACC_t::LPS_WG_ACC: 16
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSWAVEGENACC_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENACC_t::LPS_WG_ACC: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_t::LPS_RAM_ADDR: 9
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_t::LPS_RAM_ADDR: 9
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_t::RESERVED9: 7
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSRAMADDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_t::LPS_RAM_ADDR: 9
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMADDR_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::LPS_RAM_READ_EN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::LPS_RAM_READ_RDY: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::LPS_RAM_READ_EN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::LPS_RAM_READ_RDY: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::RESERVED2: 14
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::LPS_RAM_READ_EN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::LPS_RAM_READ_RDY: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::LPS_RAM_START: 8
 
unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::LPS_RAM_END: 8
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::LPS_RAM_START: 8
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::LPS_RAM_END: 8
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::LPS_RAM_START: 8
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::LPS_RAM_END: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PORT0_MARGIN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PORT1_MARGIN: 1
 
unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::RESERVED2: 13
 
unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PARITY_ERR: 1
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PORT0_MARGIN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PORT1_MARGIN: 1
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::RESERVED2: 13
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PARITY_ERR: 1
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSMARGIN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PORT0_MARGIN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PORT1_MARGIN: 1
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::RESERVED2: 13
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PARITY_ERR: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGSEL: 3
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::RESERVED3: 5
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGCOM: 2
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::RESERVED10: 5
 
unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGEN: 1
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGSEL: 3
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::RESERVED3: 5
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGCOM: 2
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::RESERVED10: 5
 
   unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGEN: 1
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSDBG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGSEL: 3
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::RESERVED3: 5
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGCOM: 2
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::RESERVED10: 5
 
      unsigned int   _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGEN: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_t::LPS_RAM_DATA: 16
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_t::LPS_RAM_DATA: 16
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSRAMDATA_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_t::LPS_RAM_DATA: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_t::LPS_RAM_DATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_t::LPS_RAM_DATA_ALIAS: 16
 
 
uint16_t   _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_t::LPS_RAM_DATA_ALIAS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSWAVEFREQ_t::WAVE_FREQ: 8
 
unsigned int   _ADI_SS_REGS_SSWAVEFREQ_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_SS_REGS_SSWAVEFREQ_t::WAVE_FREQ: 8
 
   unsigned int   _ADI_SS_REGS_SSWAVEFREQ_t::RESERVED8: 8
 
 
uint16_t   _ADI_SS_REGS_SSWAVEFREQ_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSWAVEFREQ_t::WAVE_FREQ: 8
 
      unsigned int   _ADI_SS_REGS_SSWAVEFREQ_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSWAVEPERIOD_t::WAVE_PERIOD: 10
 
unsigned int   _ADI_SS_REGS_SSWAVEPERIOD_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSWAVEPERIOD_t::WAVE_PERIOD: 10
 
   unsigned int   _ADI_SS_REGS_SSWAVEPERIOD_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSWAVEPERIOD_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSWAVEPERIOD_t::WAVE_PERIOD: 10
 
      unsigned int   _ADI_SS_REGS_SSWAVEPERIOD_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSWAVEAMP_t::WAVE_AMPLITUDE: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSWAVEAMP_t::WAVE_AMPLITUDE: 16
 
 
uint16_t   _ADI_SS_REGS_SSWAVEAMP_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSWAVEAMP_t::WAVE_AMPLITUDE: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSPINLO_t::PI_N_LSBS: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSPINLO_t::PI_N_LSBS: 16
 
 
uint16_t   _ADI_SS_REGS_SSPINLO_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSPINLO_t::PI_N_LSBS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSPINHI_t::PI_N_MSBS: 8
 
unsigned int   _ADI_SS_REGS_SSPINHI_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_SS_REGS_SSPINHI_t::PI_N_MSBS: 8
 
   unsigned int   _ADI_SS_REGS_SSPINHI_t::RESERVED8: 8
 
 
uint16_t   _ADI_SS_REGS_SSPINHI_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSPINHI_t::PI_N_MSBS: 8
 
      unsigned int   _ADI_SS_REGS_SSPINHI_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSINTERVLO_t::INTERVAL_LSBS: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSINTERVLO_t::INTERVAL_LSBS: 16
 
 
uint16_t   _ADI_SS_REGS_SSINTERVLO_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSINTERVLO_t::INTERVAL_LSBS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSINTERVHI_t::INTERVAL_MSBS: 8
 
unsigned int   _ADI_SS_REGS_SSINTERVHI_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_SS_REGS_SSINTERVHI_t::INTERVAL_MSBS: 8
 
   unsigned int   _ADI_SS_REGS_SSINTERVHI_t::RESERVED8: 8
 
 
uint16_t   _ADI_SS_REGS_SSINTERVHI_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSINTERVHI_t::INTERVAL_MSBS: 8
 
      unsigned int   _ADI_SS_REGS_SSINTERVHI_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSWAVEOFFSET_t::WAVE_OFFSET: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSWAVEOFFSET_t::WAVE_OFFSET: 16
 
 
uint16_t   _ADI_SS_REGS_SSWAVEOFFSET_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSWAVEOFFSET_t::WAVE_OFFSET: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSCTRL_t::SS_ENA: 1
 
unsigned int   _ADI_SS_REGS_SSCTRL_t::WTYPE: 2
 
unsigned int   _ADI_SS_REGS_SSCTRL_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_SS_REGS_SSCTRL_t::SS_ENA: 1
 
   unsigned int   _ADI_SS_REGS_SSCTRL_t::WTYPE: 2
 
   unsigned int   _ADI_SS_REGS_SSCTRL_t::RESERVED3: 13
 
 
uint16_t   _ADI_SS_REGS_SSCTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSCTRL_t::SS_ENA: 1
 
      unsigned int   _ADI_SS_REGS_SSCTRL_t::WTYPE: 2
 
      unsigned int   _ADI_SS_REGS_SSCTRL_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSMODFREQ_t::MOD_FREQ: 10
 
unsigned int   _ADI_SS_REGS_SSMODFREQ_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSMODFREQ_t::MOD_FREQ: 10
 
   unsigned int   _ADI_SS_REGS_SSMODFREQ_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSMODFREQ_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSMODFREQ_t::MOD_FREQ: 10
 
      unsigned int   _ADI_SS_REGS_SSMODFREQ_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSMODAMP_t::MOD_AMP: 8
 
unsigned int   _ADI_SS_REGS_SSMODAMP_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_SS_REGS_SSMODAMP_t::MOD_AMP: 8
 
   unsigned int   _ADI_SS_REGS_SSMODAMP_t::RESERVED8: 8
 
 
uint16_t   _ADI_SS_REGS_SSMODAMP_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSMODAMP_t::MOD_AMP: 8
 
      unsigned int   _ADI_SS_REGS_SSMODAMP_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSINTERV_10_t::INTERV_1_0: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSINTERV_10_t::INTERV_1_0: 16
 
 
uint16_t   _ADI_SS_REGS_SSINTERV_10_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSINTERV_10_t::INTERV_1_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSINTERV_11_t::INTERV_1_1: 10
 
unsigned int   _ADI_SS_REGS_SSINTERV_11_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSINTERV_11_t::INTERV_1_1: 10
 
   unsigned int   _ADI_SS_REGS_SSINTERV_11_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSINTERV_11_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSINTERV_11_t::INTERV_1_1: 10
 
      unsigned int   _ADI_SS_REGS_SSINTERV_11_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSINTERV_20_t::INTERV_2_0: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSINTERV_20_t::INTERV_2_0: 16
 
 
uint16_t   _ADI_SS_REGS_SSINTERV_20_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSINTERV_20_t::INTERV_2_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSINTERV_21_t::INTERV_2_1: 10
 
unsigned int   _ADI_SS_REGS_SSINTERV_21_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSINTERV_21_t::INTERV_2_1: 10
 
   unsigned int   _ADI_SS_REGS_SSINTERV_21_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSINTERV_21_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSINTERV_21_t::INTERV_2_1: 10
 
      unsigned int   _ADI_SS_REGS_SSINTERV_21_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSINTERV_30_t::INTERV_3_0: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSINTERV_30_t::INTERV_3_0: 16
 
 
uint16_t   _ADI_SS_REGS_SSINTERV_30_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSINTERV_30_t::INTERV_3_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSINTERV_31_t::INTERV_3_1: 10
 
unsigned int   _ADI_SS_REGS_SSINTERV_31_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSINTERV_31_t::INTERV_3_1: 10
 
   unsigned int   _ADI_SS_REGS_SSINTERV_31_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSINTERV_31_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSINTERV_31_t::INTERV_3_1: 10
 
      unsigned int   _ADI_SS_REGS_SSINTERV_31_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSVALUE_00_t::VALUE_0_0: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSVALUE_00_t::VALUE_0_0: 16
 
 
uint16_t   _ADI_SS_REGS_SSVALUE_00_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSVALUE_00_t::VALUE_0_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSVALUE_01_t::VALUE_0_1: 10
 
unsigned int   _ADI_SS_REGS_SSVALUE_01_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSVALUE_01_t::VALUE_0_1: 10
 
   unsigned int   _ADI_SS_REGS_SSVALUE_01_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSVALUE_01_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSVALUE_01_t::VALUE_0_1: 10
 
      unsigned int   _ADI_SS_REGS_SSVALUE_01_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSVALUE_10_t::VALUE_1_0: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSVALUE_10_t::VALUE_1_0: 16
 
 
uint16_t   _ADI_SS_REGS_SSVALUE_10_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSVALUE_10_t::VALUE_1_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSVALUE_11_t::VALUE_1_1: 10
 
unsigned int   _ADI_SS_REGS_SSVALUE_11_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSVALUE_11_t::VALUE_1_1: 10
 
   unsigned int   _ADI_SS_REGS_SSVALUE_11_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSVALUE_11_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSVALUE_11_t::VALUE_1_1: 10
 
      unsigned int   _ADI_SS_REGS_SSVALUE_11_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSVALUE_20_t::VALUE_2_0: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSVALUE_20_t::VALUE_2_0: 16
 
 
uint16_t   _ADI_SS_REGS_SSVALUE_20_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSVALUE_20_t::VALUE_2_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSVALUE_21_t::VALUE_2_1: 10
 
unsigned int   _ADI_SS_REGS_SSVALUE_21_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSVALUE_21_t::VALUE_2_1: 10
 
   unsigned int   _ADI_SS_REGS_SSVALUE_21_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSVALUE_21_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSVALUE_21_t::VALUE_2_1: 10
 
      unsigned int   _ADI_SS_REGS_SSVALUE_21_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSVALUE_30_t::VALUE_3_0: 16
 
struct {
   unsigned int   _ADI_SS_REGS_SSVALUE_30_t::VALUE_3_0: 16
 
 
uint16_t   _ADI_SS_REGS_SSVALUE_30_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSVALUE_30_t::VALUE_3_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSVALUE_31_t::VALUE_3_1: 10
 
unsigned int   _ADI_SS_REGS_SSVALUE_31_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_SS_REGS_SSVALUE_31_t::VALUE_3_1: 10
 
   unsigned int   _ADI_SS_REGS_SSVALUE_31_t::RESERVED10: 6
 
 
uint16_t   _ADI_SS_REGS_SSVALUE_31_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSVALUE_31_t::VALUE_3_1: 10
 
      unsigned int   _ADI_SS_REGS_SSVALUE_31_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGSEL: 2
 
unsigned int   _ADI_SS_REGS_SSDBG_t::RESERVED2: 6
 
unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGCOM: 2
 
unsigned int   _ADI_SS_REGS_SSDBG_t::RESERVED10: 5
 
unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGEN: 1
 
struct {
   unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGSEL: 2
 
   unsigned int   _ADI_SS_REGS_SSDBG_t::RESERVED2: 6
 
   unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGCOM: 2
 
   unsigned int   _ADI_SS_REGS_SSDBG_t::RESERVED10: 5
 
   unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGEN: 1
 
 
uint16_t   _ADI_SS_REGS_SSDBG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGSEL: 2
 
      unsigned int   _ADI_SS_REGS_SSDBG_t::RESERVED2: 6
 
      unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGCOM: 2
 
      unsigned int   _ADI_SS_REGS_SSDBG_t::RESERVED10: 5
 
      unsigned int   _ADI_SS_REGS_SSDBG_t::SSDBGEN: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_START: 1
 
unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_SELECT: 5
 
unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_ENABLE_ALL: 1
 
unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::RESERVED7: 9
 
struct {
   unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_START: 1
 
   unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_SELECT: 5
 
   unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_ENABLE_ALL: 1
 
   unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::RESERVED7: 9
 
 
uint16_t   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_START: 1
 
      unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_SELECT: 5
 
      unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_ENABLE_ALL: 1
 
      unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_0_t::RESERVED7: 9
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_1_t::PCM_CLK_COUNT: 16
 
struct {
   unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_1_t::PCM_CLK_COUNT: 16
 
 
uint16_t   _ADI_PCM_REGS_YODA_PCMCTRL_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_PCM_REGS_YODA_PCMCTRL_1_t::PCM_CLK_COUNT: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_PCM_REGS_YODA_PCMOUT_t::PCM_OUT: 16
 
struct {
   unsigned int   _ADI_PCM_REGS_YODA_PCMOUT_t::PCM_OUT: 16
 
 
uint16_t   _ADI_PCM_REGS_YODA_PCMOUT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_PCM_REGS_YODA_PCMOUT_t::PCM_OUT: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::OSC_PERIOD_ENABLE: 1
 
unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::RESERVED1: 3
 
unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::OSC_PERIOD_DIVCLK_DIVIDE: 4
 
unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::SMPL_CLK_SEL: 3
 
unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::RESERVED11: 5
 
struct {
   unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::OSC_PERIOD_ENABLE: 1
 
   unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::RESERVED1: 3
 
   unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::OSC_PERIOD_DIVCLK_DIVIDE: 4
 
   unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::SMPL_CLK_SEL: 3
 
   unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::RESERVED11: 5
 
 
uint16_t   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::OSC_PERIOD_ENABLE: 1
 
      unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::RESERVED1: 3
 
      unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::OSC_PERIOD_DIVCLK_DIVIDE: 4
 
      unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::SMPL_CLK_SEL: 3
 
      unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::RESERVED11: 5
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_RD_t::SMPL_PERIOD: 16
 
struct {
   unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_RD_t::SMPL_PERIOD: 16
 
 
uint16_t   _ADI_PCM_REGS_YODA_OSC_PERIOD_RD_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_PCM_REGS_YODA_OSC_PERIOD_RD_t::SMPL_PERIOD: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_PC_GAIN: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_PC_OFFSET: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_SCALE: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_SATTAG: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BINNING_AVG_EN: 1
 
unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_PC_GAIN: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_PC_OFFSET: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_SCALE: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_SATTAG: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BINNING_AVG_EN: 1
 
   unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::RESERVED5: 11
 
 
uint16_t   _ADI_DATAPATH_CORRECTION_CONFIG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_PC_GAIN: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_PC_OFFSET: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_SCALE: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_SATTAG: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::BINNING_AVG_EN: 1
 
      unsigned int   _ADI_DATAPATH_CORRECTION_CONFIG_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::ADC_9B: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::ALTERNATE_AMP_MUX_POL: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DIGITAL_BIN_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DELTA_COMP_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::FIX2FLT_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::RAW_MODE: 2
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::OUTPUT_WIDTH: 3
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DARK_ROW_VEC: 2
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::MIPI_OUT_8BIT: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::ADC_9B: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::ALTERNATE_AMP_MUX_POL: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DIGITAL_BIN_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DELTA_COMP_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::FIX2FLT_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::RAW_MODE: 2
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::OUTPUT_WIDTH: 3
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DARK_ROW_VEC: 2
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::MIPI_OUT_8BIT: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::RESERVED13: 3
 
 
uint16_t   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::ADC_9B: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::ALTERNATE_AMP_MUX_POL: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DIGITAL_BIN_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DELTA_COMP_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::FIX2FLT_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::RAW_MODE: 2
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::OUTPUT_WIDTH: 3
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DARK_ROW_VEC: 2
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::MIPI_OUT_8BIT: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::ROWS_PER_PACKET: 7
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::AUTO_ROWS_PER_PACKET_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::MIPI_BUFF_RD_LIMIT: 2
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::MIPI_BUFF_RD_CTRL_EN: 1
 
unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::RESERVED11: 5
 
struct {
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::ROWS_PER_PACKET: 7
 
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::AUTO_ROWS_PER_PACKET_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::MIPI_BUFF_RD_LIMIT: 2
 
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::MIPI_BUFF_RD_CTRL_EN: 1
 
   unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::RESERVED11: 5
 
 
uint16_t   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::ROWS_PER_PACKET: 7
 
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::AUTO_ROWS_PER_PACKET_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::MIPI_BUFF_RD_LIMIT: 2
 
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::MIPI_BUFF_RD_CTRL_EN: 1
 
      unsigned int   _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::RESERVED11: 5
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN0_t::GLOBAL_GAIN_SCALE_P0: 10
 
unsigned int   _ADI_DATAPATH_GAIN0_t::GLOBAL_GAIN_SHIFT_P0: 3
 
unsigned int   _ADI_DATAPATH_GAIN0_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN0_t::GLOBAL_GAIN_SCALE_P0: 10
 
   unsigned int   _ADI_DATAPATH_GAIN0_t::GLOBAL_GAIN_SHIFT_P0: 3
 
   unsigned int   _ADI_DATAPATH_GAIN0_t::RESERVED13: 3
 
 
uint16_t   _ADI_DATAPATH_GAIN0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN0_t::GLOBAL_GAIN_SCALE_P0: 10
 
      unsigned int   _ADI_DATAPATH_GAIN0_t::GLOBAL_GAIN_SHIFT_P0: 3
 
      unsigned int   _ADI_DATAPATH_GAIN0_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN1_t::GLOBAL_GAIN_SCALE_P1: 10
 
unsigned int   _ADI_DATAPATH_GAIN1_t::GLOBAL_GAIN_SHIFT_P1: 3
 
unsigned int   _ADI_DATAPATH_GAIN1_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN1_t::GLOBAL_GAIN_SCALE_P1: 10
 
   unsigned int   _ADI_DATAPATH_GAIN1_t::GLOBAL_GAIN_SHIFT_P1: 3
 
   unsigned int   _ADI_DATAPATH_GAIN1_t::RESERVED13: 3
 
 
uint16_t   _ADI_DATAPATH_GAIN1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN1_t::GLOBAL_GAIN_SCALE_P1: 10
 
      unsigned int   _ADI_DATAPATH_GAIN1_t::GLOBAL_GAIN_SHIFT_P1: 3
 
      unsigned int   _ADI_DATAPATH_GAIN1_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN2_t::GLOBAL_GAIN_SCALE_P2: 10
 
unsigned int   _ADI_DATAPATH_GAIN2_t::GLOBAL_GAIN_SHIFT_P2: 3
 
unsigned int   _ADI_DATAPATH_GAIN2_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN2_t::GLOBAL_GAIN_SCALE_P2: 10
 
   unsigned int   _ADI_DATAPATH_GAIN2_t::GLOBAL_GAIN_SHIFT_P2: 3
 
   unsigned int   _ADI_DATAPATH_GAIN2_t::RESERVED13: 3
 
 
uint16_t   _ADI_DATAPATH_GAIN2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN2_t::GLOBAL_GAIN_SCALE_P2: 10
 
      unsigned int   _ADI_DATAPATH_GAIN2_t::GLOBAL_GAIN_SHIFT_P2: 3
 
      unsigned int   _ADI_DATAPATH_GAIN2_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN3_t::GLOBAL_GAIN_SCALE_P3: 10
 
unsigned int   _ADI_DATAPATH_GAIN3_t::GLOBAL_GAIN_SHIFT_P3: 3
 
unsigned int   _ADI_DATAPATH_GAIN3_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN3_t::GLOBAL_GAIN_SCALE_P3: 10
 
   unsigned int   _ADI_DATAPATH_GAIN3_t::GLOBAL_GAIN_SHIFT_P3: 3
 
   unsigned int   _ADI_DATAPATH_GAIN3_t::RESERVED13: 3
 
 
uint16_t   _ADI_DATAPATH_GAIN3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN3_t::GLOBAL_GAIN_SCALE_P3: 10
 
      unsigned int   _ADI_DATAPATH_GAIN3_t::GLOBAL_GAIN_SHIFT_P3: 3
 
      unsigned int   _ADI_DATAPATH_GAIN3_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_EN: 1
 
unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_MODE: 2
 
unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_SEED: 12
 
unsigned int   _ADI_DATAPATH_PP_LFSR_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_EN: 1
 
   unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_MODE: 2
 
   unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_SEED: 12
 
   unsigned int   _ADI_DATAPATH_PP_LFSR_t::RESERVED15: 1
 
 
uint16_t   _ADI_DATAPATH_PP_LFSR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_EN: 1
 
      unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_MODE: 2
 
      unsigned int   _ADI_DATAPATH_PP_LFSR_t::LFSR_SEED: 12
 
      unsigned int   _ADI_DATAPATH_PP_LFSR_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_000: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_001: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_010: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_011: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_100: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::RESERVED15: 1
 
struct {
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_000: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_001: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_010: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_011: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_100: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::RESERVED15: 1
 
 
uint16_t   _ADI_DATAPATH_PP_DECODE_ST_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_000: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_001: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_010: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_011: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_100: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_1_t::RESERVED15: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_101: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_110: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_111: 3
 
unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_101: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_110: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_111: 3
 
   unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::RESERVED9: 7
 
 
uint16_t   _ADI_DATAPATH_PP_DECODE_ST_2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_101: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_110: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_111: 3
 
      unsigned int   _ADI_DATAPATH_PP_DECODE_ST_2_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_EN_0: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_EN_1: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::OVERFLOW_ACTIVE: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::RESERVED3: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::BINNED_AND_OR: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_LATCH_ACTIVE_HI: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_EN_0: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_EN_1: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::OVERFLOW_ACTIVE: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::RESERVED3: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::BINNED_AND_OR: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_LATCH_ACTIVE_HI: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::RESERVED6: 10
 
 
uint16_t   _ADI_DATAPATH_PP_ENCODE_ST_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_EN_0: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_EN_1: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::OVERFLOW_ACTIVE: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::RESERVED3: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::BINNED_AND_OR: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::ST_LATCH_ACTIVE_HI: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_ST_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_00: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_01: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_10: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_11: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_LATCH_ACTIVE_HI: 1
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::TAG_WAIT: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::TAG_SCALE: 2
 
unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::RESERVED13: 3
 
struct {
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_00: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_01: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_10: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_11: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_LATCH_ACTIVE_HI: 1
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::TAG_WAIT: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::TAG_SCALE: 2
 
   unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::RESERVED13: 3
 
 
uint16_t   _ADI_DATAPATH_PP_ENCODE_GT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_00: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_01: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_10: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_11: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::GT_LATCH_ACTIVE_HI: 1
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::TAG_WAIT: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::TAG_SCALE: 2
 
      unsigned int   _ADI_DATAPATH_PP_ENCODE_GT_t::RESERVED13: 3
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_DBG_MUX_t::DBG_SEL: 5
 
unsigned int   _ADI_DATAPATH_DBG_MUX_t::RESERVED5: 10
 
unsigned int   _ADI_DATAPATH_DBG_MUX_t::DBG_EN: 1
 
struct {
   unsigned int   _ADI_DATAPATH_DBG_MUX_t::DBG_SEL: 5
 
   unsigned int   _ADI_DATAPATH_DBG_MUX_t::RESERVED5: 10
 
   unsigned int   _ADI_DATAPATH_DBG_MUX_t::DBG_EN: 1
 
 
uint16_t   _ADI_DATAPATH_DBG_MUX_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_DBG_MUX_t::DBG_SEL: 5
 
      unsigned int   _ADI_DATAPATH_DBG_MUX_t::RESERVED5: 10
 
      unsigned int   _ADI_DATAPATH_DBG_MUX_t::DBG_EN: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_GAIN_MARGIN_CONTROL_t::GAIN_MEM_MARGIN: 16
 
struct {
   unsigned int   _ADI_DATAPATH_GAIN_MARGIN_CONTROL_t::GAIN_MEM_MARGIN: 16
 
 
uint16_t   _ADI_DATAPATH_GAIN_MARGIN_CONTROL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_GAIN_MARGIN_CONTROL_t::GAIN_MEM_MARGIN: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::LINE_MEM_MARGIN: 2
 
unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::LINE_MEM_MARGIN: 2
 
   unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::RESERVED2: 14
 
 
uint16_t   _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::LINE_MEM_MARGIN: 2
 
      unsigned int   _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROI_ROW_START_t::START_ROW: 10
 
unsigned int   _ADI_DATAPATH_ROI_ROW_START_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_ROI_ROW_START_t::START_ROW: 10
 
   unsigned int   _ADI_DATAPATH_ROI_ROW_START_t::RESERVED10: 6
 
 
uint16_t   _ADI_DATAPATH_ROI_ROW_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROI_ROW_START_t::START_ROW: 10
 
      unsigned int   _ADI_DATAPATH_ROI_ROW_START_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROI_HEIGHT_t::ROI_HEIGHT: 10
 
unsigned int   _ADI_DATAPATH_ROI_HEIGHT_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_ROI_HEIGHT_t::ROI_HEIGHT: 10
 
   unsigned int   _ADI_DATAPATH_ROI_HEIGHT_t::RESERVED10: 6
 
 
uint16_t   _ADI_DATAPATH_ROI_HEIGHT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROI_HEIGHT_t::ROI_HEIGHT: 10
 
      unsigned int   _ADI_DATAPATH_ROI_HEIGHT_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_t::START_COLUMN: 9
 
unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_t::START_COLUMN: 9
 
   unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_t::RESERVED9: 7
 
 
uint16_t   _ADI_DATAPATH_ROI_COLUMN_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_t::START_COLUMN: 9
 
      unsigned int   _ADI_DATAPATH_ROI_COLUMN_START_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROI_WIDTH_t::ROI_WIDTH: 10
 
unsigned int   _ADI_DATAPATH_ROI_WIDTH_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_ROI_WIDTH_t::ROI_WIDTH: 10
 
   unsigned int   _ADI_DATAPATH_ROI_WIDTH_t::RESERVED10: 6
 
 
uint16_t   _ADI_DATAPATH_ROI_WIDTH_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROI_WIDTH_t::ROI_WIDTH: 10
 
      unsigned int   _ADI_DATAPATH_ROI_WIDTH_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_t::DUMP_START: 1
 
unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_t::DUMP_START: 1
 
   unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_t::RESERVED1: 15
 
 
uint16_t   _ADI_DATAPATH_PP_USEQ_WRITE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_t::DUMP_START: 1
 
      unsigned int   _ADI_DATAPATH_PP_USEQ_WRITE_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_t::ADC_DELAY: 6
 
unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_t::RESERVED6: 10
 
struct {
   unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_t::ADC_DELAY: 6
 
   unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_t::RESERVED6: 10
 
 
uint16_t   _ADI_DATAPATH_PP_ADC_DELAY_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_t::ADC_DELAY: 6
 
      unsigned int   _ADI_DATAPATH_PP_ADC_DELAY_t::RESERVED6: 10
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::MIPI_BUFF_MARGIN: 4
 
unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::MIPI_BUFF_MARGIN: 4
 
   unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::RESERVED4: 12
 
 
uint16_t   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::MIPI_BUFF_MARGIN: 4
 
      unsigned int   _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::METADATA_BYTES: 8
 
unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::METADATA_BYTES: 8
 
   unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::RESERVED8: 8
 
 
uint16_t   _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::METADATA_BYTES: 8
 
      unsigned int   _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_FRAME_NUMBER_t::FRAME_COUNT: 16
 
struct {
   unsigned int   _ADI_DATAPATH_FRAME_NUMBER_t::FRAME_COUNT: 16
 
 
uint16_t   _ADI_DATAPATH_FRAME_NUMBER_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_FRAME_NUMBER_t::FRAME_COUNT: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_t::USEQ_FW_VERSION_LSB: 16
 
struct {
   unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_t::USEQ_FW_VERSION_LSB: 16
 
 
uint16_t   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_t::USEQ_FW_VERSION_LSB: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_t::USEQ_FW_VERSION_MSB: 16
 
struct {
   unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_t::USEQ_FW_VERSION_MSB: 16
 
 
uint16_t   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_t::USEQ_FW_VERSION_MSB: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_TS_CAL_VER_t::TS_CAL_VER: 16
 
struct {
   unsigned int   _ADI_DATAPATH_TS_CAL_VER_t::TS_CAL_VER: 16
 
 
uint16_t   _ADI_DATAPATH_TS_CAL_VER_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_TS_CAL_VER_t::TS_CAL_VER: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ADC_CAL_VER_t::ADC_CAL_VER: 16
 
struct {
   unsigned int   _ADI_DATAPATH_ADC_CAL_VER_t::ADC_CAL_VER: 16
 
 
uint16_t   _ADI_DATAPATH_ADC_CAL_VER_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ADC_CAL_VER_t::ADC_CAL_VER: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_0_t::REG_0: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_0_t::REG_0: 16
 
 
uint16_t   _ADI_DATAPATH_REG_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_0_t::REG_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_1_t::REG_1: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_1_t::REG_1: 16
 
 
uint16_t   _ADI_DATAPATH_REG_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_1_t::REG_1: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_2_t::REG_2: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_2_t::REG_2: 16
 
 
uint16_t   _ADI_DATAPATH_REG_2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_2_t::REG_2: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_3_t::REG_3: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_3_t::REG_3: 16
 
 
uint16_t   _ADI_DATAPATH_REG_3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_3_t::REG_3: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_4_t::REG_4: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_4_t::REG_4: 16
 
 
uint16_t   _ADI_DATAPATH_REG_4_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_4_t::REG_4: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_5_t::REG_5: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_5_t::REG_5: 16
 
 
uint16_t   _ADI_DATAPATH_REG_5_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_5_t::REG_5: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_6_t::REG_6: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_6_t::REG_6: 16
 
 
uint16_t   _ADI_DATAPATH_REG_6_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_6_t::REG_6: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_REG_7_t::REG_7: 16
 
struct {
   unsigned int   _ADI_DATAPATH_REG_7_t::REG_7: 16
 
 
uint16_t   _ADI_DATAPATH_REG_7_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_REG_7_t::REG_7: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PACKET_COUNT_t::PACKET_COUNT: 10
 
unsigned int   _ADI_DATAPATH_PACKET_COUNT_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_PACKET_COUNT_t::PACKET_COUNT: 10
 
   unsigned int   _ADI_DATAPATH_PACKET_COUNT_t::RESERVED10: 6
 
 
uint16_t   _ADI_DATAPATH_PACKET_COUNT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PACKET_COUNT_t::PACKET_COUNT: 10
 
      unsigned int   _ADI_DATAPATH_PACKET_COUNT_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_t::TOTAL_PACKETS_PER_FRAME: 10
 
unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_t::TOTAL_PACKETS_PER_FRAME: 10
 
   unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_t::RESERVED10: 6
 
 
uint16_t   _ADI_DATAPATH_PACKETS_PER_FRAME_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_t::TOTAL_PACKETS_PER_FRAME: 10
 
      unsigned int   _ADI_DATAPATH_PACKETS_PER_FRAME_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROW_VECTOR_t::ROW_VECTOR: 10
 
unsigned int   _ADI_DATAPATH_ROW_VECTOR_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DATAPATH_ROW_VECTOR_t::ROW_VECTOR: 10
 
   unsigned int   _ADI_DATAPATH_ROW_VECTOR_t::RESERVED10: 6
 
 
uint16_t   _ADI_DATAPATH_ROW_VECTOR_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROW_VECTOR_t::ROW_VECTOR: 10
 
      unsigned int   _ADI_DATAPATH_ROW_VECTOR_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::ROWS_PER_PACKET_OUT: 7
 
unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::RESERVED7: 9
 
struct {
   unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::ROWS_PER_PACKET_OUT: 7
 
   unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::RESERVED7: 9
 
 
uint16_t   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::ROWS_PER_PACKET_OUT: 7
 
      unsigned int   _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::RESERVED7: 9
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_t::MIPI_BUFF_READ_ENABLE_COUNT_MAX: 9
 
unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_t::MIPI_BUFF_READ_ENABLE_COUNT_MAX: 9
 
   unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_t::RESERVED9: 7
 
 
uint16_t   _ADI_DATAPATH_MIPI_RD_EN_MAX_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_t::MIPI_BUFF_READ_ENABLE_COUNT_MAX: 9
 
      unsigned int   _ADI_DATAPATH_MIPI_RD_EN_MAX_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_ANALOG_SS_t::ANALOG_SS: 4
 
unsigned int   _ADI_DATAPATH_ANALOG_SS_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DATAPATH_ANALOG_SS_t::ANALOG_SS: 4
 
   unsigned int   _ADI_DATAPATH_ANALOG_SS_t::RESERVED4: 12
 
 
uint16_t   _ADI_DATAPATH_ANALOG_SS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_ANALOG_SS_t::ANALOG_SS: 4
 
      unsigned int   _ADI_DATAPATH_ANALOG_SS_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_SELECT_t::IA_ENA: 1
 
unsigned int   _ADI_DATAPATH_IA_SELECT_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_DATAPATH_IA_SELECT_t::IA_ENA: 1
 
   unsigned int   _ADI_DATAPATH_IA_SELECT_t::RESERVED1: 15
 
 
uint16_t   _ADI_DATAPATH_IA_SELECT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_SELECT_t::IA_ENA: 1
 
      unsigned int   _ADI_DATAPATH_IA_SELECT_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_ADDR_REG_t::IA_START_ADDR: 12
 
unsigned int   _ADI_DATAPATH_IA_ADDR_REG_t::RESERVED12: 4
 
struct {
   unsigned int   _ADI_DATAPATH_IA_ADDR_REG_t::IA_START_ADDR: 12
 
   unsigned int   _ADI_DATAPATH_IA_ADDR_REG_t::RESERVED12: 4
 
 
uint16_t   _ADI_DATAPATH_IA_ADDR_REG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_ADDR_REG_t::IA_START_ADDR: 12
 
      unsigned int   _ADI_DATAPATH_IA_ADDR_REG_t::RESERVED12: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_t::IA_WRDATA: 16
 
struct {
   unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_t::IA_WRDATA: 16
 
 
uint16_t   _ADI_DATAPATH_IA_WRDATA_REG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_t::IA_WRDATA: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_t::IA_WRDATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_t::IA_WRDATA_ALIAS: 16
 
 
uint16_t   _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_t::IA_WRDATA_ALIAS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_t::IA_RDDATA: 16
 
struct {
   unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_t::IA_RDDATA: 16
 
 
uint16_t   _ADI_DATAPATH_IA_RDDATA_REG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_t::IA_RDDATA: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_t::IA_RDDATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_t::IA_RDDATA_ALIAS: 16
 
 
uint16_t   _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_t::IA_RDDATA_ALIAS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_t::IA_BANK_TYPE: 1
 
unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_t::IA_BANK_TYPE: 1
 
   unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_t::RESERVED1: 15
 
 
uint16_t   _ADI_DATAPATH_IA_BANK_TYPE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_t::IA_BANK_TYPE: 1
 
      unsigned int   _ADI_DATAPATH_IA_BANK_TYPE_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::GAIN_MEM_PARITY_ERR_COUNT: 6
 
unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::LINE_MEM_PARITY_ERR_COUNT: 5
 
unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::MIPI_BUFF_PARITY_ERR_COUNT: 5
 
struct {
   unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::GAIN_MEM_PARITY_ERR_COUNT: 6
 
   unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::LINE_MEM_PARITY_ERR_COUNT: 5
 
   unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::MIPI_BUFF_PARITY_ERR_COUNT: 5
 
 
uint16_t   _ADI_DATAPATH_PARITY_COUNT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::GAIN_MEM_PARITY_ERR_COUNT: 6
 
      unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::LINE_MEM_PARITY_ERR_COUNT: 5
 
      unsigned int   _ADI_DATAPATH_PARITY_COUNT_t::MIPI_BUFF_PARITY_ERR_COUNT: 5
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_INTERRUPT_t::MIPI_CMD_ERR_INTR: 1
 
unsigned int   _ADI_DATAPATH_INTERRUPT_t::TIMING_ISSUE_INTR_PP: 1
 
unsigned int   _ADI_DATAPATH_INTERRUPT_t::TIMING_ISSUE_INTR_DP: 1
 
unsigned int   _ADI_DATAPATH_INTERRUPT_t::RESERVED3: 13
 
struct {
   unsigned int   _ADI_DATAPATH_INTERRUPT_t::MIPI_CMD_ERR_INTR: 1
 
   unsigned int   _ADI_DATAPATH_INTERRUPT_t::TIMING_ISSUE_INTR_PP: 1
 
   unsigned int   _ADI_DATAPATH_INTERRUPT_t::TIMING_ISSUE_INTR_DP: 1
 
   unsigned int   _ADI_DATAPATH_INTERRUPT_t::RESERVED3: 13
 
 
uint16_t   _ADI_DATAPATH_INTERRUPT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_INTERRUPT_t::MIPI_CMD_ERR_INTR: 1
 
      unsigned int   _ADI_DATAPATH_INTERRUPT_t::TIMING_ISSUE_INTR_PP: 1
 
      unsigned int   _ADI_DATAPATH_INTERRUPT_t::TIMING_ISSUE_INTR_DP: 1
 
      unsigned int   _ADI_DATAPATH_INTERRUPT_t::RESERVED3: 13
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::L_SKEW_CAL_I: 1
 
unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::L_SKEW_CAL_P: 1
 
unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::L_SKEW_CAL_I: 1
 
   unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::L_SKEW_CAL_P: 1
 
   unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::RESERVED2: 14
 
 
uint16_t   _ADI_DATAPATH_MIPI_SKEW_CAL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::L_SKEW_CAL_I: 1
 
      unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::L_SKEW_CAL_P: 1
 
      unsigned int   _ADI_DATAPATH_MIPI_SKEW_CAL_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::ESC_CLK_BYTE_HALF_PERIOD: 4
 
unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::ESC_CLK_SYS_HALF_PERIOD: 4
 
unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::ESC_CLK_BYTE_HALF_PERIOD: 4
 
   unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::ESC_CLK_SYS_HALF_PERIOD: 4
 
   unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::RESERVED8: 8
 
 
uint16_t   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::ESC_CLK_BYTE_HALF_PERIOD: 4
 
      unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::ESC_CLK_SYS_HALF_PERIOD: 4
 
      unsigned int   _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::STATIC_CNTRL: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::OVERIDE_CNTRL: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::GO_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::BUSY_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::POSTAMBLE_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::PREAMBLE_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::MANUAL_MODE_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::INIT_VEC_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::DUMP_DIRECTION_BIT: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::RESERVED9: 7
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::STATIC_CNTRL: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::OVERIDE_CNTRL: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::GO_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::BUSY_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::POSTAMBLE_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::PREAMBLE_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::MANUAL_MODE_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::INIT_VEC_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::DUMP_DIRECTION_BIT: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::RESERVED9: 7
 
 
uint16_t   _ADI_DE_REGS_YODA_DE_CONTROL_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::STATIC_CNTRL: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::OVERIDE_CNTRL: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::GO_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::BUSY_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::POSTAMBLE_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::PREAMBLE_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::MANUAL_MODE_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::INIT_VEC_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::DUMP_DIRECTION_BIT: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_CONTROL_t::RESERVED9: 7
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::REPEAT_COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::REPEAT_COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::RESERVED8: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::REPEAT_COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_t::OVR_VAL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_t::OVR_VAL: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_t::OVR_VAL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_t::OVR_VAL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_t::OVR_VAL: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_t::OVR_VAL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_t::OVR_VAL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_t::OVR_VAL: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_t::OVR_VAL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_END_t::END_ADDRESS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_END_t::END_ADDRESS: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_BINNED1X2_END_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_END_t::END_ADDRESS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_t::OVR_VAL_SEL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_t::OVR_VAL_SEL: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_t::OVR_VAL_SEL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_t::OVR_VAL_SEL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_t::OVR_VAL_SEL: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_t::OVR_VAL_SEL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_t::OVR_VAL_SEL: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_t::OVR_VAL_SEL: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_t::OVR_VAL_SEL: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_START_t::START_ADDRESS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_START_t::START_ADDRESS: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_BINNED1X2_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED1X2_START_t::START_ADDRESS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_t::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_t::BITS15_0: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_t::BITS15_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::RESERVED5: 11
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_t::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_t::BITS15_0: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_t::BITS15_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::RESERVED5: 11
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_t::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_t::BITS15_0: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_t::BITS15_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::RESERVED5: 11
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_t::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_t::BITS15_0: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_t::BITS15_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::RESERVED5: 11
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_t::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_t::BITS15_0: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_t::BITS15_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::BITS20_16: 5
 
unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::RESERVED5: 11
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::BITS20_16: 5
 
   unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::RESERVED5: 11
 
 
uint16_t   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::BITS20_16: 5
 
      unsigned int   _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::RESERVED5: 11
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::RESERVED8: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::RESERVED8: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::RESERVED8: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_START_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_START_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED_START_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_BINNED_START_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_BINNED_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED_START_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_BINNED_START_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_END_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_END_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED_END_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_BINNED_END_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_BINNED_END_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED_END_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_BINNED_END_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_t::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_t::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_t::RESERVED8: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_BINNED_REPEAT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_t::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_BINNED_REPEAT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DARK_START_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_DARK_START_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DARK_START_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_DARK_START_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_DARK_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DARK_START_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_DARK_START_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DARK_END_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_DARK_END_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DARK_END_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_DARK_END_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_DARK_END_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DARK_END_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_DARK_END_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_t::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_t::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_t::RESERVED8: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_DARK_REPEAT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_t::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DARK_REPEAT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_PREAMBLE_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_START_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_PREAMBLE_END_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_END_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::RESERVED8: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_POSTAMBLE_START_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_START_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_t::ADDRESS: 10
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_t::ADDRESS: 10
 
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_POSTAMBLE_END_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_t::ADDRESS: 10
 
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_END_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::COUNT: 8
 
unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::RESERVED8: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::COUNT: 8
 
   unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::RESERVED8: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::COUNT: 8
 
      unsigned int   _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::RESERVED8: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::DARK_BITS: 2
 
unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::DARK_BITS: 2
 
   unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::RESERVED2: 14
 
 
uint16_t   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::DARK_BITS: 2
 
      unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_t::ARRAY_BITS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_t::ARRAY_BITS: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_t::ARRAY_BITS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_0: 4
 
unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_1: 4
 
unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_2: 4
 
unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ANALOG: 4
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_0: 4
 
   unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_1: 4
 
   unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_2: 4
 
   unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ANALOG: 4
 
 
uint16_t   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_0: 4
 
      unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_1: 4
 
      unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_2: 4
 
      unsigned int   _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ANALOG: 4
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::MARGIN: 1
 
unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::RESERVED1: 14
 
unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::PARITY_ERR: 1
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::MARGIN: 1
 
   unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::RESERVED1: 14
 
   unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::PARITY_ERR: 1
 
 
uint16_t   _ADI_DE_REGS_YODA_MEM_DFT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::MARGIN: 1
 
      unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::RESERVED1: 14
 
      unsigned int   _ADI_DE_REGS_YODA_MEM_DFT_t::PARITY_ERR: 1
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::CNTRL_0: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::CNTRL_1: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::CNTRL_0: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::CNTRL_1: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::CNTRL_0: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::CNTRL_1: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::CNTRL_2: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::CNTRL_3: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::CNTRL_2: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::CNTRL_3: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::CNTRL_2: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::CNTRL_3: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::CNTRL_4: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::CNTRL_5: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::CNTRL_4: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::CNTRL_5: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::CNTRL_4: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::CNTRL_5: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::CNTRL_6: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::CNTRL_7: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::CNTRL_6: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::CNTRL_7: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::CNTRL_6: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::CNTRL_7: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::CNTRL_8: 8
 
unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::CNTRL_9: 8
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::CNTRL_8: 8
 
   unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::CNTRL_9: 8
 
 
uint16_t   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::CNTRL_8: 8
 
      unsigned int   _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::CNTRL_9: 8
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_t::RAM: 1
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_t::RESERVED1: 15
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_t::RAM: 1
 
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_t::RESERVED1: 15
 
 
uint16_t   _ADI_DE_REGS_YODA_DE_IA_SELECT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_t::RAM: 1
 
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_SELECT_t::RESERVED1: 15
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::RAM_ADDR: 10
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::RESERVED10: 6
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::RAM_ADDR: 10
 
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::RESERVED10: 6
 
 
uint16_t   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::RAM_ADDR: 10
 
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::RESERVED10: 6
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_t::RAM_WRDATA: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_t::RAM_WRDATA: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_t::RAM_WRDATA: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_t::RAM_WRDATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_t::RAM_WRDATA_ALIAS: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_t::RAM_WRDATA_ALIAS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_t::RAM_RDDATA: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_t::RAM_RDDATA: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_t::RAM_RDDATA: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_t::RAM_RDDATA_ALIAS: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_t::RAM_RDDATA_ALIAS: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_t::RAM_RDDATA_ALIAS: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_t::BITS16_1: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_t::BITS16_1: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_t::BITS16_1: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_t::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_t::BITS15_0: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_t::BITS15_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::BINSS: 4
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::BINSS: 4
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::RESERVED4: 12
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::BINSS: 4
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_t::BITS16_1: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_t::BITS16_1: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_t::BITS16_1: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_t::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_t::BITS15_0: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_t::BITS15_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::BINSS: 4
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::BINSS: 4
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::RESERVED4: 12
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::BINSS: 4
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::BITS17_AND_0: 2
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::RESERVED2: 14
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_t::BITS16_1: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_t::BITS16_1: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_t::BITS16_1: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_t::BITS15_0: 16
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_t::BITS15_0: 16
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_t::BITS15_0: 16
 
   } 
 
   uint16_t   VALUE16
 
}; 
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::BINSS: 4
 
unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::RESERVED4: 12
 
struct {
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::BINSS: 4
 
   unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::RESERVED4: 12
 
 
uint16_t   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::VALUE16
 
union {
   struct {
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::BINSS: 4
 
      unsigned int   _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::RESERVED4: 12
 
   } 
 
   uint16_t   VALUE16
 
}; 
 

Detailed Description

No description provided (USE_CASE_0_ROI_2_ROI_TYPE) Register.

Enumeration Type Documentation

◆ adi_data_type_codes_e

Enums for specifying the data type codes.

Set / Get Parameter data type codes.

◆ adi_errorCodes_e

Error code definitions.

These error codes are used in function return values.

Enumerator
ADI_NO_ERROR 

No error.

ADI_JSON_FILE_NOT_FOUND 

JSON file not found error.

ADI_JSON_FILE_OPEN_ERROR 

JSON file open error.

ADI_JSON_PARSE_ERROR 

JSON parsing error.

ADI_JSON_UNEXPECTED_KEY 

Unexpected JSON Key.

ADI_UNEXPECTED_SPI_BYTE_COUNT 

Unexpected SPI count.

ADI_FILE_NOT_FOUND 

File not found.

ADI_SPI_DRIVER_ERROR 

SPI Driver Error.

ADI_SPI_XFER_ERROR 

SPI Transfer Error.

ADI_SPI_BIT_RATE_ERROR 

Unexpected SPI Bit Rate.

ADI_ERROR_CODE_MISSING 

Missing error code.

ADI_UNEXPECTED_ARGS 

Unexpected arguments.

ADI_H2S_VALID_TIMEOUT 

H2s valid timeout.

ADI_S2H_NOT_VALID_TIMEOUT 

S2H not valid timeout.

ADI_H2S_ERROR 

H2S_MBX_INSTS.H2S_ERR_BIT.

ADI_MISCOMPARE_ERROR 

Data miscompare.

ADI_FILE_FORMAT_ERROR 

File format error.

ADI_UNEXPECTED_PIN_MODE 

Unexpected pin_mode specified in call to adi_reset_newton.

ADI_WIRINGPI_ERROR 

Error return from .

◆ spiBitRates

Enums for specifying valid SPI Clock Rates.

Valid SPI Clock Rates.

Function Documentation

◆ adi_check_done_code()

int adi_check_done_code ( )

Check the 1SP completion code.

This task checks the 1SP completion code.

Returns
status value. Indicates success or failure of the function.

◆ adi_check_register_py()

u16 adi_check_register_py ( u16  addr,
u16  data 
)

Perform register read through HSP.

This task performs register read through HSP.

Parameters
addrRead address.
dataExpected Data.
Returns
read data

◆ adi_clear_h2s_valid()

int adi_clear_h2s_valid ( )

Clear H2S valid.

This task clears H2S Valid.

Returns
status value. Indicates success or failure of the function.

◆ adi_configure_newton_gpio()

int adi_configure_newton_gpio ( int  gpio,
int  direction 
)

Configure (input or output) the specified Newton GPIO.

Parameters
gpiothe number of the Newton GPIO to be set
directionthe direction (0 = input, 1 = output) that the Newton GPIO is to be configured for.
Returns
status value. Indicates success or failure of the function.

◆ adi_dump_error_log()

int adi_dump_error_log ( )

Dump Error Log.

This task reads and displays the HSP error log..

Returns
status value. Indicates success or failure of the function.

◆ adi_error_msg()

char* adi_error_msg ( int  returnCode)

Return error message string for given error code.

Parameters
errorCodeerror code value.
Returns
error message string.

◆ adi_get_data()

int adi_get_data ( int  word_count,
u16 *  rd_data 
)

Get data from HSP.

This task gets read data from HSP.

Parameters
word_countWord Count.
rd_dataRead Data Array.
Returns
status value. Indicates success or failure of the function.

◆ adi_get_newton_gpio()

int adi_get_newton_gpio ( int  gpio)

Get Newton GPIO value.

Parameters
gpiothe number of the Newton GPIO to be set
Returns
value. Value of the selected GPIO pin.

◆ adi_is_spi_open()

bool adi_is_spi_open ( )

Test if the SPI Device is open.

Returns
status value. Indicates success or failure of the function.

◆ adi_load_command_file()

int adi_load_command_file ( const char *  fileName)

Load command file.

This function performs the following:

Parameters
fileNamename of the file containing the Newton RAM to be loaded.
Returns
status value. Indicates success or failure of the function.

◆ adi_load_hsp()

int adi_load_hsp ( adi_loadTargets_e  loadTarget,
char *  fileName 
)

Load the memory image contained in the specified file into the specified HSP memory.

This function performs the following:

  • Loads the memory image contained in the specified file into specified HSP memory. This function is only valid for the newton FPGA.
Parameters
loadTargetHSP memory to load.
fileNamename of the file containing the HSP ROM to be loaded.
Returns
status value. Indicates success or failure of the function.

◆ adi_newton_config()

int adi_newton_config ( int  bitRateOverride)

Configure the newton control program.

Parameters
bitRateOverrideuse this SPI bit rate instead of the default.
Returns
status value. Indicates success or failure of the function.

◆ adi_pulse_newton_gpio()

int adi_pulse_newton_gpio ( int  gpio,
int  width 
)

Pulse Newton GPIO for the specified pulse width.

Parameters
gpiothe number of the Newton GPIO to be set
widththe pulse width in microseconds.
Returns
status value. Indicates success or failure of the function.

◆ adi_read_burst()

int adi_read_burst ( u16  addr,
u16  word_count,
u16 *  rd_data 
)

Perform read burst through HSP with incrementing addresses.

This task performs read burst through HSP with incrementing addresses.

Parameters
addrRead address.
word_countWord Count.
rd_dataRead Data Array.
Returns
status value. Indicates success or failure of the function.

◆ adi_read_register()

int adi_read_register ( u16  addr,
u16 *  rd_data 
)

Perform register read through HSP.

This task performs register read through HSP.

Parameters
addrRead address.
rd_dataRead Data.
Returns
status value. Indicates success or failure of the function.

◆ adi_read_register_backdoor()

int adi_read_register_backdoor ( u16  addr,
u16 *  data 
)

Perform register write bypassing the HSP.

This task performs register write bypassing HSP.

Parameters
addrWrite address.
wr_dataWrite Data.
Returns
status value. Indicates success or failure of the function.

◆ adi_read_register_backdoor_py()

u16 adi_read_register_backdoor_py ( u16  addr)

Perform register write bypassing the HSP.

This task performs register write bypassing HSP.

Parameters
addrWrite address.
Returns
read data

◆ adi_read_register_list()

int adi_read_register_list ( u16 *  rd_addr,
int  burst_size,
u16 *  rd_data 
)

Read register list.

Parameters
rd_addrList of read addresses.
burst_sizeNumber of words to transfer.
rd_dataWrite Data.
slave_idSlave ID. This argument may be omitted and defaults to zero.
Returns
status value. Indicates success or failure of the function.

◆ adi_read_register_py()

u16 adi_read_register_py ( u16  addr)

Perform register read through HSP.

This task performs register read through HSP.

Parameters
addrRead address.
Returns
read data

◆ adi_reset_hsp()

int adi_reset_hsp ( )

Issue a soft reset to the HSP hardware.

Returns
status value. Indicates success or failure of the function.

◆ adi_reset_newton()

int adi_reset_newton ( adi_pin_modes_e  pin_mode)

Issue a hard reset to newton.

Parameters
pin_modeNewton Pin Mode.
Returns
status value. Indicates success or failure of the function.

◆ adi_send_command()

int adi_send_command ( u16  command,
u16  address,
int  word_count,
adi_attribute_e  attribute 
)

Send command to HSP.

This task sends the command to the HSP.

Parameters
commandCommand Code.
addressAddress.
word_countWord Count.
attributeAttributes.
Returns
status value. Indicates success or failure of the function.

◆ adi_send_data()

int adi_send_data ( int  word_count,
u16 *  wr_data 
)

Send data to HSP.

This task sends the data to the HSP.

Parameters
wr_dataWrite Data Array.
word_countWord Count.
Returns
status value. Indicates success or failure of the function.

◆ adi_send_read_register_list()

int adi_send_read_register_list ( u16 *  rd_addr,
int  word_count 
)

Send read register list Send data to HSP.

This task sends the register read list to the HSP.

Parameters
rd_addrAddress Array.
word_countWord Count.
Returns
status value. Indicates success or failure of the function.

◆ adi_send_write_register_list()

int adi_send_write_register_list ( u16 *  wr_addr,
u16 *  wr_data,
int  word_count 
)

Send write register list Send data to HSP.

This function sends the register write list to the HSP.

Parameters
wr_addrAddress Array.
wr_dataData Array.
word_countWord Count.
Returns
status value. Indicates success or failure of the function.

◆ adi_set_newton_gpio()

int adi_set_newton_gpio ( int  gpio,
int  value 
)

Set Newton GPIO to the specified value.

Parameters
gpiothe number of the Newton GPIO to be set
valuethe value that the Newton GPIO is to be set to.
Returns
status value. Indicates success or failure of the function.

◆ adi_soft_reset()

int adi_soft_reset ( )

Issue a soft reset to the newton.

Parameters
channel_idthe channel ID of the to be written.
Returns
status value. Indicates success or failure of the function.

◆ adi_spi_close()

int adi_spi_close ( )

Close the SPI Device.

Returns
status value. Indicates success or failure of the function.

◆ adi_spi_open()

int adi_spi_open ( int  bitRate)

Open the SPI Device.

Parameters
bitRatethe bit rate that the SPI interface should operate at.
Returns
status value. Indicates success or failure of the function.

◆ adi_spi_read_word()

int adi_spi_read_word ( u16  address,
u16 *  data 
)

Read a 16-bit word from the Newton over the SPI Interface.

Parameters
addressthe address of the 32-bit word.
data32a pointer to the data read from the Newton.
Returns
status value. Indicates success or failure of the function.

◆ adi_spi_read_word_multiple()

int adi_spi_read_word_multiple ( u16  address,
int  dataLength,
u16 *  dataReadPtr 
)

Read multiple 16-bit words from the Newton over the SPI Interface.

Parameters
addressthe address of the data to be read.
dataLengththe number of words to be read.
dataPtra pointer to the data read from the Newton.
Returns
status value. Indicates success or failure of the function.

◆ adi_spi_read_word_py()

u16 adi_spi_read_word_py ( u16  address)

Read a 16-bit word from the Newton over the SPI Interface.

Parameters
addressthe address of the 32-bit word.
Returns
read data.

◆ adi_spi_write()

int adi_spi_write ( int  bytes_out,
u08 *  data_out,
int  bytes_in,
u08 *  data_in 
)

Write a 32-bit word to the Newton over the SPI Interface.

Parameters
bytes_outthe number of bytes to be sent over the SPI interface to the Newton.
data_outthe data to be sent over the SPI interface to the Newton.
bytes_inthe number of bytes to be recevied from the Newton over the SPI interface.
data_inthe data to be recevied from the Newton over the SPI interface.
Returns
status value. Indicates success or failure of the function.

◆ adi_spi_write_word()

int adi_spi_write_word ( u16  address,
u16  data 
)

Write a 16-bit word to the Newton over the SPI Interface.

Parameters
bytes_outthe number of bytes to be sent over the SPI interface to the Newton.
data_outthe data to be sent over the SPI interface to the Newton.
bytes_inthe number of bytes to be recevied from the Newton over the SPI interface.
data_inthe data to be recevied from the Newton over the SPI interface.
Returns
status value. Indicates success or failure of the function.

◆ adi_spi_write_word_multiple()

int adi_spi_write_word_multiple ( u16  address,
int  dataLength,
u16 *  dataWritePtr 
)

Write multiple 16-bit words to the Newton over the SPI Interface.

Parameters
addressthe address of the data to be written.
dataLengththe number of words to be written.
dataPtra pointer to the data written to the Newton.
Returns
status value. Indicates success or failure of the function.

◆ adi_test_useq_ram()

int adi_test_useq_ram ( )

Test the micro-sequencer sequence memory.

Returns
status value. Indicates success or failure of the function.

◆ adi_toggle_newton_gpio()

int adi_toggle_newton_gpio ( int  gpio)

Toggle (change state of) Newton GPIO.

Parameters
gpiothe number of the Newton GPIO to be toggled
Returns
status value. Indicates success or failure of the function.

◆ adi_unload_hsp()

int adi_unload_hsp ( adi_loadTargets_e  unloadTarget,
const char *  fileName 
)

Unload the memory image to the specified file from the specified HSP memory.

This function performs the following:

  • Unloads the memory to the specified file from specified HSP memory. This function is only valid for the newton FPGA.
Parameters
unloadTargetHSP memory to unload.
fileNamename of the file containing the HSP ROM to be loaded.
Returns
status value. Indicates success or failure of the function.

◆ adi_verify_command_file()

int adi_verify_command_file ( const char *  fileName)

erifies that the RAMs match the memory images contained in the soecifide file.

This function performs the following:

  • Verifies that the RAMs match the memory images contained in the soecifide file.

Operation:

  • Read the file into an array.
  • Backdoor reads the contents of the specified RAM.
Parameters
fileNamename of the file containing the mail box command.
Returns
status value. Indicates success or failure of the function.

◆ adi_verify_hsp()

int adi_verify_hsp ( adi_loadTargets_e  verifyTarget,
const char *  fileName 
)

Verify that the memory image contained in the specified file matches the containt of the specified HSP memory.

This function performs the following:

  • Verifies that the memory image contained in the specified file matches the contents of the specified HSP memory. This function is only valid for the newton FPGA.
Parameters
verifyTargetHSP memory to verify.
fileNamename of the file containing the HSP ROM to be verified.
Returns
status value. Indicates success or failure of the function.

◆ adi_wait_for_h2s_valid()

int adi_wait_for_h2s_valid ( )

WWait for H2S Valid from HSP.

This task polls the h2s valid bit until it is set.

Returns
status value. Indicates success or failure of the function.

◆ adi_wait_for_hsp_ready()

int adi_wait_for_hsp_ready ( )

Wait for HSP ready.

This task waits for the HSP to be ready.

Returns
status value. Indicates success or failure of the function.

◆ adi_wait_for_s2h_not_valid()

int adi_wait_for_s2h_not_valid ( )

Wait for S2H not valid from HSP.

This task polls the S2h valid bit until it is cleared.

Returns
status value. Indicates success or failure of the function.

◆ adi_write_burst()

int adi_write_burst ( u16  addr,
u16  word_count,
u16 *  wr_data 
)

Perform write burst through HSP with incrementing addresses.

This task performs write burst through HSP with incrementing addresses.

Parameters
addrWrite address.
word_countWord Count.
wr_dataWrite Data Array.
Returns
status value. Indicates success or failure of the function.

◆ adi_write_register()

int adi_write_register ( u16  addr,
u16  wr_data 
)

Perform register write through HSP.

This task performs register write through HSP.

Parameters
addrWrite address.
wr_dataWrite Data.
Returns
status value. Indicates success or failure of the function.

◆ adi_write_register_backdoor()

int adi_write_register_backdoor ( u16  addr,
u16  data 
)

Perform register write bypassing HSP.

This task performs register write bypassing HSP.

Parameters
addrWrite address.
wr_dataWrite Data.
Returns
status value. Indicates success or failure of the function.

◆ adi_write_register_list()

int adi_write_register_list ( u16 *  wr_addr,
int  burst_size,
u16 *  wr_data 
)

Write list of registers.

Parameters
wr_addrWrite Address.
burst_sizeNumber of words to transfer.
wr_dataWrite Data.
Returns
status value. Indicates success or failure of the function.

Variable Documentation

◆ ABUSY [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::ABUSY

No description provided

◆ ABUSY [2/2]

unsigned { ... } ::ABUSY

No description provided

◆ ADC_9B [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::ADC_9B

When 1, ADC valid data width is 9 bits

◆ ADC_9B [2/4]

unsigned { ... } ::ADC_9B

When 1, ADC valid data width is 9 bits

◆ ADC_9B [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::ADC_9B

When 1, ADC valid data width is 9 bits; when 0, ADC width is 10 bits

◆ ADC_9B [4/4]

unsigned { ... } ::ADC_9B

When 1, ADC valid data width is 9 bits; when 0, ADC width is 10 bits

◆ ADC_CAL_VER [1/4]

unsigned int _ADI_DATAPATH_ADC_CAL_VER_s::ADC_CAL_VER

ADC and gain calibration version

◆ ADC_CAL_VER [2/4]

unsigned { ... } ::ADC_CAL_VER

ADC and gain calibration version

◆ ADC_CAL_VER [3/4]

unsigned int _ADI_DATAPATH_ADC_CAL_VER_t::ADC_CAL_VER

ADC and gain calibration version

◆ ADC_CAL_VER [4/4]

unsigned { ... } ::ADC_CAL_VER

ADC and gain calibration version

◆ ADC_CNVT_DELAY [1/2]

unsigned { ... } ::ADC_CNVT_DELAY

No description provided

◆ ADC_CNVT_DELAY [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::ADC_CNVT_DELAY

No description provided

◆ ADC_DELAY [1/4]

unsigned int _ADI_DATAPATH_PP_ADC_DELAY_s::ADC_DELAY

Specifies the number of clock cycles after which the data from adc_bus can read and used on adc_convert positive transition

◆ ADC_DELAY [2/4]

unsigned { ... } ::ADC_DELAY

Specifies the number of clock cycles after which the data from adc_bus can read and used on adc_convert positive transition

◆ ADC_DELAY [3/4]

unsigned int _ADI_DATAPATH_PP_ADC_DELAY_t::ADC_DELAY

Specifies the number of clock cycles after which the data from adc_bus can read and used on adc_convert positive transition

◆ ADC_DELAY [4/4]

unsigned { ... } ::ADC_DELAY

Specifies the number of clock cycles after which the data from adc_bus can read and used on adc_convert positive transition

◆ ADC_DN_DELAY [1/2]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::ADC_DN_DELAY

No description provided

◆ ADC_DN_DELAY [2/2]

unsigned { ... } ::ADC_DN_DELAY

No description provided

◆ ADC_EN_10B [1/2]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_EN_10B

No description provided

◆ ADC_EN_10B [2/2]

unsigned { ... } ::ADC_EN_10B

No description provided

◆ ADC_EXT_RESET_SEL [1/2]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_EXT_RESET_SEL

No description provided

◆ ADC_EXT_RESET_SEL [2/2]

unsigned { ... } ::ADC_EXT_RESET_SEL

No description provided

◆ ADC_IRAMP [1/2]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::ADC_IRAMP

No description provided

◆ ADC_IRAMP [2/2]

unsigned { ... } ::ADC_IRAMP

No description provided

◆ ADC_MUX [1/2]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::ADC_MUX

No description provided

◆ ADC_MUX [2/2]

unsigned { ... } ::ADC_MUX

No description provided

◆ ADC_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ADC_PD

No description provided

◆ ADC_PD [2/2]

unsigned { ... } ::ADC_PD

No description provided

◆ ADC_RAMP_CM_SEL [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_1_t::ADC_RAMP_CM_SEL

No description provided

◆ ADC_RAMP_CM_SEL [2/2]

unsigned { ... } ::ADC_RAMP_CM_SEL

No description provided

◆ ADC_RAMP_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ADC_RAMP_PD

No description provided

◆ ADC_RAMP_PD [2/2]

unsigned { ... } ::ADC_RAMP_PD

No description provided

◆ ADC_REGRESET [1/2]

unsigned { ... } ::ADC_REGRESET

No description provided

◆ ADC_REGRESET [2/2]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::ADC_REGRESET

No description provided

◆ ADC_UP_DELAY [1/2]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL1_S1_t::ADC_UP_DELAY

No description provided

◆ ADC_UP_DELAY [2/2]

unsigned { ... } ::ADC_UP_DELAY

No description provided

◆ ADCPLL_C [1/2]

unsigned { ... } ::ADCPLL_C

No description provided

◆ ADCPLL_C [2/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_C

No description provided

◆ ADCPLL_DLPF [1/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_DLPF

No description provided

◆ ADCPLL_DLPF [2/2]

unsigned { ... } ::ADCPLL_DLPF

No description provided

◆ ADCPLL_END5 [1/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_END5

No description provided

◆ ADCPLL_END5 [2/2]

unsigned { ... } ::ADCPLL_END5

No description provided

◆ ADCPLL_LOCK_ACC [1/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::ADCPLL_LOCK_ACC

No description provided

◆ ADCPLL_LOCK_ACC [2/2]

unsigned { ... } ::ADCPLL_LOCK_ACC

No description provided

◆ ADCPLL_LOCK_LOST [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::ADCPLL_LOCK_LOST

No description provided

◆ ADCPLL_LOCK_LOST [2/2]

unsigned { ... } ::ADCPLL_LOCK_LOST

No description provided

◆ ADCPLL_LOCK_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::ADCPLL_LOCK_SOURCE

No description provided

◆ ADCPLL_LOCK_SOURCE [2/2]

unsigned { ... } ::ADCPLL_LOCK_SOURCE

No description provided

◆ ADCPLL_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_PD

No description provided

◆ ADCPLL_PD [2/2]

unsigned { ... } ::ADCPLL_PD

No description provided

◆ ADCPLL_PHASE_LOCK_DELAY [1/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_PHASE_LOCK_DELAY

No description provided

◆ ADCPLL_PHASE_LOCK_DELAY [2/2]

unsigned { ... } ::ADCPLL_PHASE_LOCK_DELAY

No description provided

◆ ADCPLL_PHASE_LOCK_REG [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::ADCPLL_PHASE_LOCK_REG

No description provided

◆ ADCPLL_PHASE_LOCK_REG [2/2]

unsigned { ... } ::ADCPLL_PHASE_LOCK_REG

No description provided

◆ ADCPLL_QP [1/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_QP

No description provided

◆ ADCPLL_QP [2/2]

unsigned { ... } ::ADCPLL_QP

No description provided

◆ ADCPLL_RESET_LOCK_LOST [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_RESET_LOCK_LOST

No description provided

◆ ADCPLL_RESET_LOCK_LOST [2/2]

unsigned { ... } ::ADCPLL_RESET_LOCK_LOST

No description provided

◆ ADCPLL_RST [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::ADCPLL_RST

No description provided

◆ ADCPLL_RST [2/2]

unsigned { ... } ::ADCPLL_RST

No description provided

◆ ADCPLL_RZ [1/2]

unsigned { ... } ::ADCPLL_RZ

No description provided

◆ ADCPLL_RZ [2/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL0_S1_t::ADCPLL_RZ

No description provided

◆ ADCPLL_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::ADCPLL_SPARE

No description provided

◆ ADCPLL_SPARE [2/2]

unsigned { ... } ::ADCPLL_SPARE

No description provided

◆ ADCPLL_TEST_SEL [1/2]

unsigned { ... } ::ADCPLL_TEST_SEL

No description provided

◆ ADCPLL_TEST_SEL [2/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_TEST_SEL

No description provided

◆ ADCPLL_TESTMUX [1/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::ADCPLL_TESTMUX

No description provided

◆ ADCPLL_TESTMUX [2/2]

unsigned { ... } ::ADCPLL_TESTMUX

No description provided

◆ ADCPLL_UNLOCK_ACC [1/2]

unsigned { ... } ::ADCPLL_UNLOCK_ACC

No description provided

◆ ADCPLL_UNLOCK_ACC [2/2]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL1_S1_t::ADCPLL_UNLOCK_ACC

No description provided

◆ ADDRESS [1/56]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::ADDRESS

No description provided

◆ ADDRESS [2/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [3/56]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::ADDRESS

No description provided

◆ ADDRESS [4/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [5/56]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::ADDRESS

No description provided

◆ ADDRESS [6/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [7/56]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::ADDRESS

No description provided

◆ ADDRESS [8/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [9/56]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::ADDRESS

No description provided

◆ ADDRESS [10/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [11/56]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::ADDRESS

No description provided

◆ ADDRESS [12/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [13/56]

unsigned int _ADI_DE_REGS_YODA_BINNED_START_s::ADDRESS

No description provided

◆ ADDRESS [14/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [15/56]

unsigned int _ADI_DE_REGS_YODA_BINNED_END_s::ADDRESS

No description provided

◆ ADDRESS [16/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [17/56]

unsigned int _ADI_DE_REGS_YODA_DARK_START_s::ADDRESS

No description provided

◆ ADDRESS [18/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [19/56]

unsigned int _ADI_DE_REGS_YODA_DARK_END_s::ADDRESS

No description provided

◆ ADDRESS [20/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [21/56]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_START_s::ADDRESS

No description provided

◆ ADDRESS [22/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [23/56]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_END_s::ADDRESS

No description provided

◆ ADDRESS [24/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [25/56]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_START_s::ADDRESS

No description provided

◆ ADDRESS [26/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [27/56]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_END_s::ADDRESS

No description provided

◆ ADDRESS [28/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [29/56]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::ADDRESS

No description provided

◆ ADDRESS [30/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [31/56]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::ADDRESS

No description provided

◆ ADDRESS [32/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [33/56]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::ADDRESS

No description provided

◆ ADDRESS [34/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [35/56]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::ADDRESS

No description provided

◆ ADDRESS [36/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [37/56]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::ADDRESS

No description provided

◆ ADDRESS [38/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [39/56]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::ADDRESS

No description provided

◆ ADDRESS [40/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [41/56]

unsigned int _ADI_DE_REGS_YODA_BINNED_START_t::ADDRESS

No description provided

◆ ADDRESS [42/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [43/56]

unsigned int _ADI_DE_REGS_YODA_BINNED_END_t::ADDRESS

No description provided

◆ ADDRESS [44/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [45/56]

unsigned int _ADI_DE_REGS_YODA_DARK_START_t::ADDRESS

No description provided

◆ ADDRESS [46/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [47/56]

unsigned int _ADI_DE_REGS_YODA_DARK_END_t::ADDRESS

No description provided

◆ ADDRESS [48/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [49/56]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_START_t::ADDRESS

No description provided

◆ ADDRESS [50/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [51/56]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_END_t::ADDRESS

No description provided

◆ ADDRESS [52/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [53/56]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_START_t::ADDRESS

No description provided

◆ ADDRESS [54/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ADDRESS [55/56]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_END_t::ADDRESS

No description provided

◆ ADDRESS [56/56]

unsigned { ... } ::ADDRESS

No description provided

◆ ALTERNATE_AMP_MUX_POL [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::ALTERNATE_AMP_MUX_POL

1'b1 = Inverted gain scaling for even ADCs (needed for supply rejection work-around); 1'b0 = No inversion

◆ ALTERNATE_AMP_MUX_POL [2/4]

unsigned { ... } ::ALTERNATE_AMP_MUX_POL

1'b1 = Inverted gain scaling for even ADCs (needed for supply rejection work-around); 1'b0 = No inversion

◆ ALTERNATE_AMP_MUX_POL [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::ALTERNATE_AMP_MUX_POL

1'b1 = Inverted gain scaling for even ADCs (needed for supply rejection work-around); 1'b0 = No inversion

◆ ALTERNATE_AMP_MUX_POL [4/4]

unsigned { ... } ::ALTERNATE_AMP_MUX_POL

1'b1 = Inverted gain scaling for even ADCs (needed for supply rejection work-around); 1'b0 = No inversion

◆ AMP_CFBA [1/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBA

No description provided

◆ AMP_CFBA [2/2]

unsigned { ... } ::AMP_CFBA

No description provided

◆ AMP_CFBB [1/2]

unsigned { ... } ::AMP_CFBB

No description provided

◆ AMP_CFBB [2/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBB

No description provided

◆ AMP_CFBC [1/2]

unsigned { ... } ::AMP_CFBC

No description provided

◆ AMP_CFBC [2/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBC

No description provided

◆ AMP_CFBD [1/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL0_S1_t::AMP_CFBD

No description provided

◆ AMP_CFBD [2/2]

unsigned { ... } ::AMP_CFBD

No description provided

◆ AMP_CINA [1/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINA

No description provided

◆ AMP_CINA [2/2]

unsigned { ... } ::AMP_CINA

No description provided

◆ AMP_CINB [1/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINB

No description provided

◆ AMP_CINB [2/2]

unsigned { ... } ::AMP_CINB

No description provided

◆ AMP_CINC [1/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CINC

No description provided

◆ AMP_CINC [2/2]

unsigned { ... } ::AMP_CINC

No description provided

◆ AMP_CIND [1/2]

unsigned { ... } ::AMP_CIND

No description provided

◆ AMP_CIND [2/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::AMP_CIND

No description provided

◆ AMP_CLK2_DUMMY [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_0_t::AMP_CLK2_DUMMY

No description provided

◆ AMP_CLK2_DUMMY [2/2]

unsigned { ... } ::AMP_CLK2_DUMMY

No description provided

◆ AMP_CLK2_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_FALL_CLK_CNT

No description provided

◆ AMP_CLK2_FALL_CLK_CNT [2/2]

unsigned { ... } ::AMP_CLK2_FALL_CLK_CNT

No description provided

◆ AMP_CLK2_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_FALL_CNVT_CNT

No description provided

◆ AMP_CLK2_FALL_CNVT_CNT [2/2]

unsigned { ... } ::AMP_CLK2_FALL_CNVT_CNT

No description provided

◆ AMP_CLK2_RISE_CLK_CNT [1/2]

unsigned { ... } ::AMP_CLK2_RISE_CLK_CNT

No description provided

◆ AMP_CLK2_RISE_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_RISE_CLK_CNT

No description provided

◆ AMP_CLK2_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::AMP_CLK2_RISE_CNVT_CNT

No description provided

◆ AMP_CLK2_RISE_CNVT_CNT [2/2]

unsigned { ... } ::AMP_CLK2_RISE_CNVT_CNT

No description provided

◆ AMP_CLK3_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::AMP_CLK3_FALL_CLK_CNT

No description provided

◆ AMP_CLK3_FALL_CLK_CNT [2/2]

unsigned { ... } ::AMP_CLK3_FALL_CLK_CNT

No description provided

◆ AMP_CLK3_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::AMP_CLK3_FALL_CNVT_CNT

No description provided

◆ AMP_CLK3_FALL_CNVT_CNT [2/2]

unsigned { ... } ::AMP_CLK3_FALL_CNVT_CNT

No description provided

◆ AMP_CLK3_RISE_CLK_CNT [1/2]

unsigned { ... } ::AMP_CLK3_RISE_CLK_CNT

No description provided

◆ AMP_CLK3_RISE_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL1_t::AMP_CLK3_RISE_CLK_CNT

No description provided

◆ AMP_CLK3_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::AMP_CLK3_RISE_CNVT_CNT

No description provided

◆ AMP_CLK3_RISE_CNVT_CNT [2/2]

unsigned { ... } ::AMP_CLK3_RISE_CNVT_CNT

No description provided

◆ AMP_CLK_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_FALL_CLK_CNT

No description provided

◆ AMP_CLK_FALL_CLK_CNT [2/2]

unsigned { ... } ::AMP_CLK_FALL_CLK_CNT

No description provided

◆ AMP_CLK_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_FALL_CNVT_CNT

No description provided

◆ AMP_CLK_FALL_CNVT_CNT [2/2]

unsigned { ... } ::AMP_CLK_FALL_CNVT_CNT

No description provided

◆ AMP_CLK_FINAL_INVERT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GTSWAP_t::AMP_CLK_FINAL_INVERT

No description provided

◆ AMP_CLK_FINAL_INVERT [2/2]

unsigned { ... } ::AMP_CLK_FINAL_INVERT

No description provided

◆ AMP_CLK_RISE_CLK_CNT [1/2]

unsigned { ... } ::AMP_CLK_RISE_CLK_CNT

No description provided

◆ AMP_CLK_RISE_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_RISE_CLK_CNT

No description provided

◆ AMP_CLK_RISE_CNVT_CNT [1/2]

unsigned { ... } ::AMP_CLK_RISE_CNVT_CNT

No description provided

◆ AMP_CLK_RISE_CNVT_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::AMP_CLK_RISE_CNVT_CNT

No description provided

◆ AMP_PD [1/2]

unsigned { ... } ::AMP_PD

No description provided

◆ AMP_PD [2/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::AMP_PD

No description provided

◆ AMP_S [1/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_S

No description provided

◆ AMP_S [2/2]

unsigned { ... } ::AMP_S

No description provided

◆ AMP_TESTSELN [1/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_TESTSELN

No description provided

◆ AMP_TESTSELN [2/2]

unsigned { ... } ::AMP_TESTSELN

No description provided

◆ AMP_TESTSELP [1/2]

unsigned { ... } ::AMP_TESTSELP

No description provided

◆ AMP_TESTSELP [2/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::AMP_TESTSELP

No description provided

◆ ANA_SPARE_I1 [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_1_t::ANA_SPARE_I1

No description provided

◆ ANA_SPARE_I1 [2/2]

unsigned { ... } ::ANA_SPARE_I1

No description provided

◆ ANA_TEST_MUX [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::ANA_TEST_MUX

No description provided

◆ ANA_TEST_MUX [2/2]

unsigned { ... } ::ANA_TEST_MUX

No description provided

◆ ANALOG [1/4]

unsigned int _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ANALOG

No description provided

◆ ANALOG [2/4]

unsigned { ... } ::ANALOG

No description provided

◆ ANALOG [3/4]

unsigned { ... } ::ANALOG

No description provided

◆ ANALOG [4/4]

unsigned int _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ANALOG

No description provided

◆ ANALOG_SS [1/4]

unsigned int _ADI_DATAPATH_ANALOG_SS_s::ANALOG_SS

Indicates the sub-sampling factor. Input from DE

◆ ANALOG_SS [2/4]

unsigned { ... } ::ANALOG_SS

Indicates the sub-sampling factor. Input from DE

◆ ANALOG_SS [3/4]

unsigned int _ADI_DATAPATH_ANALOG_SS_t::ANALOG_SS

Indicates the sub-sampling factor. Input from DE

◆ ANALOG_SS [4/4]

unsigned { ... } ::ANALOG_SS

Indicates the sub-sampling factor. Input from DE

◆ APB_TIMEOUT_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::APB_TIMEOUT_ERROR

No description provided

◆ APB_TIMEOUT_ERROR [2/2]

unsigned { ... } ::APB_TIMEOUT_ERROR

No description provided

◆ ARRAY_BITS [1/4]

unsigned int _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_s::ARRAY_BITS

No description provided

◆ ARRAY_BITS [2/4]

unsigned { ... } ::ARRAY_BITS

No description provided

◆ ARRAY_BITS [3/4]

unsigned { ... } ::ARRAY_BITS

No description provided

◆ ARRAY_BITS [4/4]

unsigned int _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_t::ARRAY_BITS

No description provided

◆ ARRAY_SPARE [1/2]

unsigned { ... } ::ARRAY_SPARE

No description provided

◆ ARRAY_SPARE [2/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_2_t::ARRAY_SPARE

No description provided

◆ ASTART [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::ASTART

No description provided

◆ ASTART [2/2]

unsigned { ... } ::ASTART

No description provided

◆ AUTO_ROW_CNT_INCR_EN [1/2]

unsigned { ... } ::AUTO_ROW_CNT_INCR_EN

No description provided

◆ AUTO_ROW_CNT_INCR_EN [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_CNT_INCR_EN

No description provided

◆ AUTO_ROW_INCR_DIR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_INCR_DIR

No description provided

◆ AUTO_ROW_INCR_DIR [2/2]

unsigned { ... } ::AUTO_ROW_INCR_DIR

No description provided

◆ AUTO_ROW_INCR_STRIDE [1/2]

unsigned { ... } ::AUTO_ROW_INCR_STRIDE

No description provided

◆ AUTO_ROW_INCR_STRIDE [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::AUTO_ROW_INCR_STRIDE

No description provided

◆ AUTO_ROW_INCR_STRIDE_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::AUTO_ROW_INCR_STRIDE_MSB

No description provided

◆ AUTO_ROW_INCR_STRIDE_MSB [2/2]

unsigned { ... } ::AUTO_ROW_INCR_STRIDE_MSB

No description provided

◆ AUTO_ROWS_PER_PACKET_EN [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::AUTO_ROWS_PER_PACKET_EN

When 1, datapath calculates the rows to be packed in a MIPI packet; when 0 use the value programmed in rows per packet register

◆ AUTO_ROWS_PER_PACKET_EN [2/4]

unsigned { ... } ::AUTO_ROWS_PER_PACKET_EN

When 1, datapath calculates the rows to be packed in a MIPI packet; when 0 use the value programmed in rows per packet register

◆ AUTO_ROWS_PER_PACKET_EN [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::AUTO_ROWS_PER_PACKET_EN

When 1, datapath calculates the rows/dumps to be packed in a MIPI packet; when 0 use the value programmed in rows per packet register

◆ AUTO_ROWS_PER_PACKET_EN [4/4]

unsigned { ... } ::AUTO_ROWS_PER_PACKET_EN

When 1, datapath calculates the rows/dumps to be packed in a MIPI packet; when 0 use the value programmed in rows per packet register

◆ BINNED_AND_OR [1/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_s::BINNED_AND_OR

Indicates whether the ST tags are to be ORed together

◆ BINNED_AND_OR [2/4]

unsigned { ... } ::BINNED_AND_OR

Indicates whether the ST tags are to be ORed together

◆ BINNED_AND_OR [3/4]

unsigned { ... } ::BINNED_AND_OR

Indicates whether the ST tags are to be ORed together

◆ BINNED_AND_OR [4/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_t::BINNED_AND_OR

Indicates whether the ST tags are to be ORed together

◆ BINNING_AVG_EN [1/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_s::BINNING_AVG_EN

1'b1 = average two rows while digital binning; 1'b0 = add two rows while digital binning

◆ BINNING_AVG_EN [2/4]

unsigned { ... } ::BINNING_AVG_EN

1'b1 = average two rows while digital binning; 1'b0 = add two rows while digital binning

◆ BINNING_AVG_EN [3/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_t::BINNING_AVG_EN

1'b1 = average two rows while digital binning (use floor output); 1'b0 = add two rows while digital binning

◆ BINNING_AVG_EN [4/4]

unsigned { ... } ::BINNING_AVG_EN

1'b1 = average two rows while digital binning (use floor output); 1'b0 = add two rows while digital binning

◆ BINSS [1/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::BINSS

No description provided

◆ BINSS [2/12]

unsigned { ... } ::BINSS

No description provided

◆ BINSS [3/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::BINSS

No description provided

◆ BINSS [4/12]

unsigned { ... } ::BINSS

No description provided

◆ BINSS [5/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::BINSS

No description provided

◆ BINSS [6/12]

unsigned { ... } ::BINSS

No description provided

◆ BINSS [7/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::BINSS

No description provided

◆ BINSS [8/12]

unsigned { ... } ::BINSS

No description provided

◆ BINSS [9/12]

unsigned { ... } ::BINSS

No description provided

◆ BINSS [10/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::BINSS

No description provided

◆ BINSS [11/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::BINSS

No description provided

◆ BINSS [12/12]

unsigned { ... } ::BINSS

No description provided

◆ BITLINE_TURBO [1/2]

unsigned int _ADI_AI_REGS_YODA_READOUT_S1_t::BITLINE_TURBO

No description provided

◆ BITLINE_TURBO [2/2]

unsigned { ... } ::BITLINE_TURBO

No description provided

◆ BITS15_0 [1/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_s::BITS15_0

No description provided

◆ BITS15_0 [2/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [3/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_s::BITS15_0

No description provided

◆ BITS15_0 [4/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [5/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_s::BITS15_0

No description provided

◆ BITS15_0 [6/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [7/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_s::BITS15_0

No description provided

◆ BITS15_0 [8/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [9/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_s::BITS15_0

No description provided

◆ BITS15_0 [10/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [11/32]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_s::BITS15_0

No description provided

◆ BITS15_0 [12/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [13/32]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_s::BITS15_0

No description provided

◆ BITS15_0 [14/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [15/32]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_s::BITS15_0

No description provided

◆ BITS15_0 [16/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [17/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [18/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_LOW_t::BITS15_0

No description provided

◆ BITS15_0 [19/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [20/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_LOW_t::BITS15_0

No description provided

◆ BITS15_0 [21/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_LOW_t::BITS15_0

No description provided

◆ BITS15_0 [22/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [23/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [24/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_LOW_t::BITS15_0

No description provided

◆ BITS15_0 [25/32]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_LOW_t::BITS15_0

No description provided

◆ BITS15_0 [26/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [27/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [28/32]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_COLUMN_VEC_t::BITS15_0

No description provided

◆ BITS15_0 [29/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [30/32]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_COLUMN_VEC_t::BITS15_0

No description provided

◆ BITS15_0 [31/32]

unsigned { ... } ::BITS15_0

No description provided

◆ BITS15_0 [32/32]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_COLUMN_VEC_t::BITS15_0

No description provided

◆ BITS16_1 [1/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_s::BITS16_1

No description provided

◆ BITS16_1 [2/12]

unsigned { ... } ::BITS16_1

No description provided

◆ BITS16_1 [3/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_s::BITS16_1

No description provided

◆ BITS16_1 [4/12]

unsigned { ... } ::BITS16_1

No description provided

◆ BITS16_1 [5/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_s::BITS16_1

No description provided

◆ BITS16_1 [6/12]

unsigned { ... } ::BITS16_1

No description provided

◆ BITS16_1 [7/12]

unsigned { ... } ::BITS16_1

No description provided

◆ BITS16_1 [8/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_MAIN_t::BITS16_1

No description provided

◆ BITS16_1 [9/12]

unsigned { ... } ::BITS16_1

No description provided

◆ BITS16_1 [10/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_MAIN_t::BITS16_1

No description provided

◆ BITS16_1 [11/12]

unsigned { ... } ::BITS16_1

No description provided

◆ BITS16_1 [12/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_MAIN_t::BITS16_1

No description provided

◆ BITS17_AND_0 [1/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [2/12]

unsigned { ... } ::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [3/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [4/12]

unsigned { ... } ::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [5/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [6/12]

unsigned { ... } ::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [7/12]

unsigned { ... } ::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [8/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [9/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [10/12]

unsigned { ... } ::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [11/12]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::BITS17_AND_0

No description provided

◆ BITS17_AND_0 [12/12]

unsigned { ... } ::BITS17_AND_0

No description provided

◆ BITS20_16 [1/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::BITS20_16

No description provided

◆ BITS20_16 [2/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [3/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::BITS20_16

No description provided

◆ BITS20_16 [4/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [5/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::BITS20_16

No description provided

◆ BITS20_16 [6/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [7/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::BITS20_16

No description provided

◆ BITS20_16 [8/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [9/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::BITS20_16

No description provided

◆ BITS20_16 [10/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [11/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [12/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::BITS20_16

No description provided

◆ BITS20_16 [13/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::BITS20_16

No description provided

◆ BITS20_16 [14/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [15/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::BITS20_16

No description provided

◆ BITS20_16 [16/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [17/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BITS20_16 [18/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::BITS20_16

No description provided

◆ BITS20_16 [19/20]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::BITS20_16

No description provided

◆ BITS20_16 [20/20]

unsigned { ... } ::BITS20_16

No description provided

◆ BLANK_CHECK [1/2]

unsigned int _ADI_EFUSE_BLANK_CHECK_t::BLANK_CHECK

Initiate read of whole fuse macro to check if blank

◆ BLANK_CHECK [2/2]

unsigned { ... } ::BLANK_CHECK

Initiate read of whole fuse macro to check if blank

◆ BLANK_CHECK_FAIL [1/2]

unsigned int _ADI_EFUSE_BLANK_CHECK_t::BLANK_CHECK_FAIL

Blank Check Failed

◆ BLANK_CHECK_FAIL [2/2]

unsigned { ... } ::BLANK_CHECK_FAIL

Blank Check Failed

◆ BRK [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK

No description provided

◆ BRK [2/2]

unsigned { ... } ::BRK

No description provided

◆ BRK_RES [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK_RES

No description provided

◆ BRK_RES [2/2]

unsigned { ... } ::BRK_RES

No description provided

◆ BRK_SEQ_RAM_ADDR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::BRK_SEQ_RAM_ADDR

No description provided

◆ BRK_SEQ_RAM_ADDR [2/2]

unsigned { ... } ::BRK_SEQ_RAM_ADDR

No description provided

◆ BUF_CSI_TX_PKT_CMD_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::BUF_CSI_TX_PKT_CMD_ERROR

No description provided

◆ BUF_CSI_TX_PKT_CMD_ERROR [2/2]

unsigned { ... } ::BUF_CSI_TX_PKT_CMD_ERROR

No description provided

◆ BUF_MEMORYT_OVERFLOW_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::BUF_MEMORYT_OVERFLOW_ERREN

No description provided

◆ BUF_MEMORYT_OVERFLOW_ERREN [2/2]

unsigned { ... } ::BUF_MEMORYT_OVERFLOW_ERREN

No description provided

◆ BURSTPERIOD [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::BURSTPERIOD

No description provided

◆ BURSTPERIOD [2/2]

unsigned { ... } ::BURSTPERIOD

No description provided

◆ BUSY [1/2]

unsigned int _ADI_SPIM_REGS_SR_t::BUSY

No description provided

◆ BUSY [2/2]

unsigned { ... } ::BUSY

No description provided

◆ BUSY_BIT [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::BUSY_BIT

No description provided

◆ BUSY_BIT [2/4]

unsigned { ... } ::BUSY_BIT

No description provided

◆ BUSY_BIT [3/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::BUSY_BIT

No description provided

◆ BUSY_BIT [4/4]

unsigned { ... } ::BUSY_BIT

No description provided

◆ BYPASS_PC_GAIN [1/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_PC_GAIN

Bypass per-column gain correction

◆ BYPASS_PC_GAIN [2/4]

unsigned { ... } ::BYPASS_PC_GAIN

Bypass per-column gain correction

◆ BYPASS_PC_GAIN [3/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_PC_GAIN

Bypass per-column gain correction

◆ BYPASS_PC_GAIN [4/4]

unsigned { ... } ::BYPASS_PC_GAIN

Bypass per-column gain correction

◆ BYPASS_PC_OFFSET [1/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_PC_OFFSET

Bypass per-column offset correction

◆ BYPASS_PC_OFFSET [2/4]

unsigned { ... } ::BYPASS_PC_OFFSET

Bypass per-column offset correction

◆ BYPASS_PC_OFFSET [3/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_PC_OFFSET

Bypass per-column offset correction

◆ BYPASS_PC_OFFSET [4/4]

unsigned { ... } ::BYPASS_PC_OFFSET

Bypass per-column offset correction

◆ BYPASS_SATTAG [1/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_SATTAG

Bypass saturation tag while pixel adjustment

◆ BYPASS_SATTAG [2/4]

unsigned { ... } ::BYPASS_SATTAG

Bypass saturation tag while pixel adjustment

◆ BYPASS_SATTAG [3/4]

unsigned { ... } ::BYPASS_SATTAG

Bypass saturation tag while pixel adjustment

◆ BYPASS_SATTAG [4/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_SATTAG

Bypass saturation tag while pixel adjustment

◆ BYPASS_SCALE [1/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_s::BYPASS_SCALE

Bypass gain scaling

◆ BYPASS_SCALE [2/4]

unsigned { ... } ::BYPASS_SCALE

Bypass gain scaling

◆ BYPASS_SCALE [3/4]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_t::BYPASS_SCALE

Bypass gain scaling

◆ BYPASS_SCALE [4/4]

unsigned { ... } ::BYPASS_SCALE

Bypass gain scaling

◆ CALL_RPT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::CALL_RPT_CNT

No description provided

◆ CALL_RPT_CNT [2/2]

unsigned { ... } ::CALL_RPT_CNT

No description provided

◆ CALL_RPT_CNT_LSB [1/2]

unsigned { ... } ::CALL_RPT_CNT_LSB

No description provided

◆ CALL_RPT_CNT_LSB [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_RPT_CNT_LSB

No description provided

◆ CALL_STACK_NO_LSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_STACK_NO_LSB

No description provided

◆ CALL_STACK_NO_LSB [2/2]

unsigned { ... } ::CALL_STACK_NO_LSB

No description provided

◆ CALL_STACK_NO_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::CALL_STACK_NO_MSB

No description provided

◆ CALL_STACK_NO_MSB [2/2]

unsigned { ... } ::CALL_STACK_NO_MSB

No description provided

◆ CALL_STACK_OVERFLOW_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::CALL_STACK_OVERFLOW_ERREN

No description provided

◆ CALL_STACK_OVERFLOW_ERREN [2/2]

unsigned { ... } ::CALL_STACK_OVERFLOW_ERREN

No description provided

◆ CALL_STACK_OVERFLOW_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::CALL_STACK_OVERFLOW_ERROR

No description provided

◆ CALL_STACK_OVERFLOW_ERROR [2/2]

unsigned { ... } ::CALL_STACK_OVERFLOW_ERROR

No description provided

◆ CALL_STACK_UNDERRUN_ERREN [1/2]

unsigned { ... } ::CALL_STACK_UNDERRUN_ERREN

No description provided

◆ CALL_STACK_UNDERRUN_ERREN [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::CALL_STACK_UNDERRUN_ERREN

No description provided

◆ CALL_STACK_UNDERRUN_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::CALL_STACK_UNDERRUN_ERROR

No description provided

◆ CALL_STACK_UNDERRUN_ERROR [2/2]

unsigned { ... } ::CALL_STACK_UNDERRUN_ERROR

No description provided

◆ CAPTURE_END_TIME_HI [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_CTIME_5_t::CAPTURE_END_TIME_HI

No description provided

◆ CAPTURE_END_TIME_HI [2/2]

unsigned { ... } ::CAPTURE_END_TIME_HI

No description provided

◆ CAPTURE_END_TIME_LO [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_CTIME_4_t::CAPTURE_END_TIME_LO

No description provided

◆ CAPTURE_END_TIME_LO [2/2]

unsigned { ... } ::CAPTURE_END_TIME_LO

No description provided

◆ CAPTURE_START_TIME_HI [1/2]

unsigned { ... } ::CAPTURE_START_TIME_HI

No description provided

◆ CAPTURE_START_TIME_HI [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_CTIME_3_t::CAPTURE_START_TIME_HI

No description provided

◆ CAPTURE_START_TIME_LO [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_CTIME_2_t::CAPTURE_START_TIME_LO

No description provided

◆ CAPTURE_START_TIME_LO [2/2]

unsigned { ... } ::CAPTURE_START_TIME_LO

No description provided

◆ CDIV [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::CDIV

No description provided

◆ CDIV [2/2]

unsigned { ... } ::CDIV

No description provided

◆ CFG_CLK_LANE_EN [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::CFG_CLK_LANE_EN

No description provided

◆ CFG_CLK_LANE_EN [2/2]

unsigned { ... } ::CFG_CLK_LANE_EN

No description provided

◆ CFG_CONTINUOUS_HS_CLK [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::CFG_CONTINUOUS_HS_CLK

No description provided

◆ CFG_CONTINUOUS_HS_CLK [2/2]

unsigned { ... } ::CFG_CONTINUOUS_HS_CLK

No description provided

◆ CFG_CPHY_EN [1/2]

unsigned { ... } ::CFG_CPHY_EN

No description provided

◆ CFG_CPHY_EN [2/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::CFG_CPHY_EN

No description provided

◆ CFG_DATA_LANE_EN [1/2]

unsigned { ... } ::CFG_DATA_LANE_EN

No description provided

◆ CFG_DATA_LANE_EN [2/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::CFG_DATA_LANE_EN

No description provided

◆ CFG_MIXEL_AUTO_PD_EN [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::CFG_MIXEL_AUTO_PD_EN

No description provided

◆ CFG_MIXEL_AUTO_PD_EN [2/2]

unsigned { ... } ::CFG_MIXEL_AUTO_PD_EN

No description provided

◆ CFG_MIXEL_BYPASS_PLL [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::CFG_MIXEL_BYPASS_PLL

No description provided

◆ CFG_MIXEL_BYPASS_PLL [2/2]

unsigned { ... } ::CFG_MIXEL_BYPASS_PLL

No description provided

◆ CFG_MIXEL_CM [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::CFG_MIXEL_CM

No description provided

◆ CFG_MIXEL_CM [2/2]

unsigned { ... } ::CFG_MIXEL_CM

No description provided

◆ CFG_MIXEL_CN [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::CFG_MIXEL_CN

No description provided

◆ CFG_MIXEL_CN [2/2]

unsigned { ... } ::CFG_MIXEL_CN

No description provided

◆ CFG_MIXEL_CO [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::CFG_MIXEL_CO

No description provided

◆ CFG_MIXEL_CO [2/2]

unsigned { ... } ::CFG_MIXEL_CO

No description provided

◆ CFG_MIXEL_LOCK [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::CFG_MIXEL_LOCK

No description provided

◆ CFG_MIXEL_LOCK [2/2]

unsigned { ... } ::CFG_MIXEL_LOCK

No description provided

◆ CFG_MIXEL_LOCK_BYP [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::CFG_MIXEL_LOCK_BYP

No description provided

◆ CFG_MIXEL_LOCK_BYP [2/2]

unsigned { ... } ::CFG_MIXEL_LOCK_BYP

No description provided

◆ CFG_MIXEL_LOCK_LATCH [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::CFG_MIXEL_LOCK_LATCH

No description provided

◆ CFG_MIXEL_LOCK_LATCH [2/2]

unsigned { ... } ::CFG_MIXEL_LOCK_LATCH

No description provided

◆ CFG_MIXEL_M_PRG_HS_PREPARE [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::CFG_MIXEL_M_PRG_HS_PREPARE

No description provided

◆ CFG_MIXEL_M_PRG_HS_PREPARE [2/2]

unsigned { ... } ::CFG_MIXEL_M_PRG_HS_PREPARE

No description provided

◆ CFG_MIXEL_M_PRG_HS_TRAIL [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::CFG_MIXEL_M_PRG_HS_TRAIL

No description provided

◆ CFG_MIXEL_M_PRG_HS_TRAIL [2/2]

unsigned { ... } ::CFG_MIXEL_M_PRG_HS_TRAIL

No description provided

◆ CFG_MIXEL_M_PRG_HS_ZERO [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::CFG_MIXEL_M_PRG_HS_ZERO

No description provided

◆ CFG_MIXEL_M_PRG_HS_ZERO [2/2]

unsigned { ... } ::CFG_MIXEL_M_PRG_HS_ZERO

No description provided

◆ CFG_MIXEL_MC_PRG_HS_PREPARE [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::CFG_MIXEL_MC_PRG_HS_PREPARE

No description provided

◆ CFG_MIXEL_MC_PRG_HS_PREPARE [2/2]

unsigned { ... } ::CFG_MIXEL_MC_PRG_HS_PREPARE

No description provided

◆ CFG_MIXEL_MC_PRG_HS_TRAIL [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::CFG_MIXEL_MC_PRG_HS_TRAIL

No description provided

◆ CFG_MIXEL_MC_PRG_HS_TRAIL [2/2]

unsigned { ... } ::CFG_MIXEL_MC_PRG_HS_TRAIL

No description provided

◆ CFG_MIXEL_MC_PRG_HS_ZERO [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::CFG_MIXEL_MC_PRG_HS_ZERO

No description provided

◆ CFG_MIXEL_MC_PRG_HS_ZERO [2/2]

unsigned { ... } ::CFG_MIXEL_MC_PRG_HS_ZERO

No description provided

◆ CFG_MIXEL_PD_PHY [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::CFG_MIXEL_PD_PHY

No description provided

◆ CFG_MIXEL_PD_PHY [2/2]

unsigned { ... } ::CFG_MIXEL_PD_PHY

No description provided

◆ CFG_MIXEL_PD_PLL [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::CFG_MIXEL_PD_PLL

No description provided

◆ CFG_MIXEL_PD_PLL [2/2]

unsigned { ... } ::CFG_MIXEL_PD_PLL

No description provided

◆ CFG_MIXEL_TEST_ENBL [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::CFG_MIXEL_TEST_ENBL

No description provided

◆ CFG_MIXEL_TEST_ENBL [2/2]

unsigned { ... } ::CFG_MIXEL_TEST_ENBL

No description provided

◆ CFG_MIXEL_TEST_PATTERN [1/4]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN0_t::CFG_MIXEL_TEST_PATTERN

No description provided

◆ CFG_MIXEL_TEST_PATTERN [2/4]

unsigned { ... } ::CFG_MIXEL_TEST_PATTERN

No description provided

◆ CFG_MIXEL_TEST_PATTERN [3/4]

unsigned { ... } ::CFG_MIXEL_TEST_PATTERN

No description provided

◆ CFG_MIXEL_TEST_PATTERN [4/4]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_PATTERN1_t::CFG_MIXEL_TEST_PATTERN

No description provided

◆ CFG_MIXEL_TST_PLL [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::CFG_MIXEL_TST_PLL

No description provided

◆ CFG_MIXEL_TST_PLL [2/2]

unsigned { ... } ::CFG_MIXEL_TST_PLL

No description provided

◆ CFG_MIXEL_ULPS_PHY_CTRL [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::CFG_MIXEL_ULPS_PHY_CTRL

No description provided

◆ CFG_MIXEL_ULPS_PHY_CTRL [2/2]

unsigned { ... } ::CFG_MIXEL_ULPS_PHY_CTRL

No description provided

◆ CFG_MIXEL_ULPS_PLL_CTRL [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::CFG_MIXEL_ULPS_PLL_CTRL

No description provided

◆ CFG_MIXEL_ULPS_PLL_CTRL [2/2]

unsigned { ... } ::CFG_MIXEL_ULPS_PLL_CTRL

No description provided

◆ CFG_NUM_LANES [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::CFG_NUM_LANES

No description provided

◆ CFG_NUM_LANES [2/2]

unsigned { ... } ::CFG_NUM_LANES

No description provided

◆ CFG_PACKET_INTERFACE_EN [1/2]

unsigned { ... } ::CFG_PACKET_INTERFACE_EN

No description provided

◆ CFG_PACKET_INTERFACE_EN [2/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::CFG_PACKET_INTERFACE_EN

No description provided

◆ CFG_PPI_16_EN [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::CFG_PPI_16_EN

No description provided

◆ CFG_PPI_16_EN [2/2]

unsigned { ... } ::CFG_PPI_16_EN

No description provided

◆ CFG_SKEWCAL_TIME_I [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_I_t::CFG_SKEWCAL_TIME_I

No description provided

◆ CFG_SKEWCAL_TIME_I [2/2]

unsigned { ... } ::CFG_SKEWCAL_TIME_I

No description provided

◆ CFG_SKEWCAL_TIME_P [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_SKEW_CAL_CFG_SKEWCAL_TIME_P_t::CFG_SKEWCAL_TIME_P

No description provided

◆ CFG_SKEWCAL_TIME_P [2/2]

unsigned { ... } ::CFG_SKEWCAL_TIME_P

No description provided

◆ CFG_T_CLK_GAP [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::CFG_T_CLK_GAP

No description provided

◆ CFG_T_CLK_GAP [2/2]

unsigned { ... } ::CFG_T_CLK_GAP

No description provided

◆ CFG_T_POST [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::CFG_T_POST

No description provided

◆ CFG_T_POST [2/2]

unsigned { ... } ::CFG_T_POST

No description provided

◆ CFG_T_PRE [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::CFG_T_PRE

No description provided

◆ CFG_T_PRE [2/2]

unsigned { ... } ::CFG_T_PRE

No description provided

◆ CFG_TWAKEUP [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TWAKEUP_t::CFG_TWAKEUP

No description provided

◆ CFG_TWAKEUP [2/2]

unsigned { ... } ::CFG_TWAKEUP

No description provided

◆ CFG_TX_GAP [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::CFG_TX_GAP

No description provided

◆ CFG_TX_GAP [2/2]

unsigned { ... } ::CFG_TX_GAP

No description provided

◆ CFG_VCX_EN [1/2]

unsigned { ... } ::CFG_VCX_EN

No description provided

◆ CFG_VCX_EN [2/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::CFG_VCX_EN

No description provided

◆ CFS [1/2]

unsigned int _ADI_SPIM_REGS_CTRLR0_t::CFS

No description provided

◆ CFS [2/2]

unsigned { ... } ::CFS

No description provided

◆ CG_INVERT_CLK [1/2]

unsigned { ... } ::CG_INVERT_CLK

No description provided

◆ CG_INVERT_CLK [2/2]

unsigned int _ADI_AI_REGS_YODA_CKGEN_S1_t::CG_INVERT_CLK

No description provided

◆ CG_LIGHT_STATE [1/2]

unsigned int _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_LIGHT_STATE

No description provided

◆ CG_LIGHT_STATE [2/2]

unsigned { ... } ::CG_LIGHT_STATE

No description provided

◆ CG_QBUF_STATE [1/2]

unsigned { ... } ::CG_QBUF_STATE

No description provided

◆ CG_QBUF_STATE [2/2]

unsigned int _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_QBUF_STATE

No description provided

◆ CG_RSTN [1/2]

unsigned { ... } ::CG_RSTN

No description provided

◆ CG_RSTN [2/2]

unsigned int _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_RSTN

No description provided

◆ CG_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::CG_SPARE

No description provided

◆ CG_SPARE [2/2]

unsigned { ... } ::CG_SPARE

No description provided

◆ CG_STATE [1/2]

unsigned int _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_STATE

No description provided

◆ CG_STATE [2/2]

unsigned { ... } ::CG_STATE

No description provided

◆ CG_XTAL_PRESCALE [1/2]

unsigned { ... } ::CG_XTAL_PRESCALE

No description provided

◆ CG_XTAL_PRESCALE [2/2]

unsigned int _ADI_AI_REGS_YODA_CKGEN_CTRL_t::CG_XTAL_PRESCALE

No description provided

◆ CGBM [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::CGBM

No description provided

◆ CGBM [2/2]

unsigned { ... } ::CGBM

No description provided

◆ CHAIN1_LEN [1/2]

unsigned int _ADI_AI_REGS_YODA_CHAIN1_LEN_t::CHAIN1_LEN

No description provided

◆ CHAIN1_LEN [2/2]

unsigned { ... } ::CHAIN1_LEN

No description provided

◆ CHAIN2_LEN [1/2]

unsigned int _ADI_AI_REGS_YODA_CHAIN2_LEN_t::CHAIN2_LEN

No description provided

◆ CHAIN2_LEN [2/2]

unsigned { ... } ::CHAIN2_LEN

No description provided

◆ CHIP_ID [1/2]

unsigned int _ADI_AI_REGS_YODA_CHIP_ID_t::CHIP_ID

No description provided

◆ CHIP_ID [2/2]

unsigned { ... } ::CHIP_ID

No description provided

◆ CK1FALL [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::CK1FALL

No description provided

◆ CK1FALL [2/2]

unsigned { ... } ::CK1FALL

No description provided

◆ CK1FALL_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1FALL_MSB

No description provided

◆ CK1FALL_MSB [2/2]

unsigned { ... } ::CK1FALL_MSB

No description provided

◆ CK1REFFALL [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::CK1REFFALL

No description provided

◆ CK1REFFALL [2/2]

unsigned { ... } ::CK1REFFALL

No description provided

◆ CK1REFFALL_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1REFFALL_MSB

No description provided

◆ CK1REFFALL_MSB [2/2]

unsigned { ... } ::CK1REFFALL_MSB

No description provided

◆ CK1REFRISE [1/2]

unsigned { ... } ::CK1REFRISE

No description provided

◆ CK1REFRISE [2/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::CK1REFRISE

No description provided

◆ CK1REFRISE_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1REFRISE_MSB

No description provided

◆ CK1REFRISE_MSB [2/2]

unsigned { ... } ::CK1REFRISE_MSB

No description provided

◆ CK1RISE [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::CK1RISE

No description provided

◆ CK1RISE [2/2]

unsigned { ... } ::CK1RISE

No description provided

◆ CK1RISE_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK1RISE_MSB

No description provided

◆ CK1RISE_MSB [2/2]

unsigned { ... } ::CK1RISE_MSB

No description provided

◆ CK2FALL [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::CK2FALL

No description provided

◆ CK2FALL [2/2]

unsigned { ... } ::CK2FALL

No description provided

◆ CK2FALL_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2FALL_MSB

No description provided

◆ CK2FALL_MSB [2/2]

unsigned { ... } ::CK2FALL_MSB

No description provided

◆ CK2REFFALL [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::CK2REFFALL

No description provided

◆ CK2REFFALL [2/2]

unsigned { ... } ::CK2REFFALL

No description provided

◆ CK2REFFALL_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2REFFALL_MSB

No description provided

◆ CK2REFFALL_MSB [2/2]

unsigned { ... } ::CK2REFFALL_MSB

No description provided

◆ CK2REFRISE [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::CK2REFRISE

No description provided

◆ CK2REFRISE [2/2]

unsigned { ... } ::CK2REFRISE

No description provided

◆ CK2REFRISE_MSB [1/2]

unsigned { ... } ::CK2REFRISE_MSB

No description provided

◆ CK2REFRISE_MSB [2/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2REFRISE_MSB

No description provided

◆ CK2RISE [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::CK2RISE

No description provided

◆ CK2RISE [2/2]

unsigned { ... } ::CK2RISE

No description provided

◆ CK2RISE_MSB [1/2]

unsigned { ... } ::CK2RISE_MSB

No description provided

◆ CK2RISE_MSB [2/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CKX_t::CK2RISE_MSB

No description provided

◆ CLK_DE_C [1/2]

unsigned int _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::CLK_DE_C

No description provided

◆ CLK_DE_C [2/2]

unsigned { ... } ::CLK_DE_C

No description provided

◆ CLK_DE_END5 [1/2]

unsigned int _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::CLK_DE_END5

No description provided

◆ CLK_DE_END5 [2/2]

unsigned { ... } ::CLK_DE_END5

No description provided

◆ CLK_DE_MODE [1/2]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::CLK_DE_MODE

No description provided

◆ CLK_DE_MODE [2/2]

unsigned { ... } ::CLK_DE_MODE

No description provided

◆ CLK_DE_SEL [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_DE_SEL

No description provided

◆ CLK_DE_SEL [2/2]

unsigned { ... } ::CLK_DE_SEL

No description provided

◆ CLK_LVDS_OE [1/2]

unsigned int _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDS_OE

No description provided

◆ CLK_LVDS_OE [2/2]

unsigned { ... } ::CLK_LVDS_OE

No description provided

◆ CLK_LVDSTX_HZ [1/2]

unsigned int _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDSTX_HZ

No description provided

◆ CLK_LVDSTX_HZ [2/2]

unsigned { ... } ::CLK_LVDSTX_HZ

No description provided

◆ CLK_LVDSTX_I2X [1/2]

unsigned int _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_I2X

No description provided

◆ CLK_LVDSTX_I2X [2/2]

unsigned { ... } ::CLK_LVDSTX_I2X

No description provided

◆ CLK_LVDSTX_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_LSMOD_EN_t::CLK_LVDSTX_PD

No description provided

◆ CLK_LVDSTX_PD [2/2]

unsigned { ... } ::CLK_LVDSTX_PD

No description provided

◆ CLK_LVDSTX_TE [1/2]

unsigned { ... } ::CLK_LVDSTX_TE

No description provided

◆ CLK_LVDSTX_TE [2/2]

unsigned int _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TE

No description provided

◆ CLK_LVDSTX_TEST [1/2]

unsigned { ... } ::CLK_LVDSTX_TEST

No description provided

◆ CLK_LVDSTX_TEST [2/2]

unsigned int _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TEST

No description provided

◆ CLK_LVDSTX_TESTD [1/2]

unsigned { ... } ::CLK_LVDSTX_TESTD

No description provided

◆ CLK_LVDSTX_TESTD [2/2]

unsigned int _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::CLK_LVDSTX_TESTD

No description provided

◆ CLK_PROC_SEL [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_PROC_SEL

No description provided

◆ CLK_PROC_SEL [2/2]

unsigned { ... } ::CLK_PROC_SEL

No description provided

◆ CLK_SYS_SEL [1/2]

unsigned { ... } ::CLK_SYS_SEL

No description provided

◆ CLK_SYS_SEL [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::CLK_SYS_SEL

No description provided

◆ CLK_TEST_SEL [1/2]

unsigned { ... } ::CLK_TEST_SEL

No description provided

◆ CLK_TEST_SEL [2/2]

unsigned int _ADI_AI_REGS_YODA_CKGEN_S1_t::CLK_TEST_SEL

No description provided

◆ CLKDE_RESET [1/2]

unsigned int _ADI_AI_REGS_YODA_CLK_CTRL_t::CLKDE_RESET

No description provided

◆ CLKDE_RESET [2/2]

unsigned { ... } ::CLKDE_RESET

No description provided

◆ CLKOFFSET [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::CLKOFFSET

No description provided

◆ CLKOFFSET [2/2]

unsigned { ... } ::CLKOFFSET

No description provided

◆ CMN_SEL0 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::CMN_SEL0

No description provided

◆ CMN_SEL0 [2/2]

unsigned { ... } ::CMN_SEL0

No description provided

◆ CMN_SEL1 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::CMN_SEL1

No description provided

◆ CMN_SEL1 [2/2]

unsigned { ... } ::CMN_SEL1

No description provided

◆ CNTRL_0 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::CNTRL_0

No description provided

◆ CNTRL_0 [2/4]

unsigned { ... } ::CNTRL_0

No description provided

◆ CNTRL_0 [3/4]

unsigned { ... } ::CNTRL_0

No description provided

◆ CNTRL_0 [4/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::CNTRL_0

No description provided

◆ CNTRL_1 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_s::CNTRL_1

No description provided

◆ CNTRL_1 [2/4]

unsigned { ... } ::CNTRL_1

No description provided

◆ CNTRL_1 [3/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_0_t::CNTRL_1

No description provided

◆ CNTRL_1 [4/4]

unsigned { ... } ::CNTRL_1

No description provided

◆ CNTRL_2 [1/4]

unsigned { ... } ::CNTRL_2

No description provided

◆ CNTRL_2 [2/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::CNTRL_2

No description provided

◆ CNTRL_2 [3/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::CNTRL_2

No description provided

◆ CNTRL_2 [4/4]

unsigned { ... } ::CNTRL_2

No description provided

◆ CNTRL_3 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_s::CNTRL_3

No description provided

◆ CNTRL_3 [2/4]

unsigned { ... } ::CNTRL_3

No description provided

◆ CNTRL_3 [3/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_1_t::CNTRL_3

No description provided

◆ CNTRL_3 [4/4]

unsigned { ... } ::CNTRL_3

No description provided

◆ CNTRL_4 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::CNTRL_4

No description provided

◆ CNTRL_4 [2/4]

unsigned { ... } ::CNTRL_4

No description provided

◆ CNTRL_4 [3/4]

unsigned { ... } ::CNTRL_4

No description provided

◆ CNTRL_4 [4/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::CNTRL_4

No description provided

◆ CNTRL_5 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_s::CNTRL_5

No description provided

◆ CNTRL_5 [2/4]

unsigned { ... } ::CNTRL_5

No description provided

◆ CNTRL_5 [3/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_2_t::CNTRL_5

No description provided

◆ CNTRL_5 [4/4]

unsigned { ... } ::CNTRL_5

No description provided

◆ CNTRL_6 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::CNTRL_6

No description provided

◆ CNTRL_6 [2/4]

unsigned { ... } ::CNTRL_6

No description provided

◆ CNTRL_6 [3/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::CNTRL_6

No description provided

◆ CNTRL_6 [4/4]

unsigned { ... } ::CNTRL_6

No description provided

◆ CNTRL_7 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_s::CNTRL_7

No description provided

◆ CNTRL_7 [2/4]

unsigned { ... } ::CNTRL_7

No description provided

◆ CNTRL_7 [3/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_3_t::CNTRL_7

No description provided

◆ CNTRL_7 [4/4]

unsigned { ... } ::CNTRL_7

No description provided

◆ CNTRL_8 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::CNTRL_8

No description provided

◆ CNTRL_8 [2/4]

unsigned { ... } ::CNTRL_8

No description provided

◆ CNTRL_8 [3/4]

unsigned { ... } ::CNTRL_8

No description provided

◆ CNTRL_8 [4/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::CNTRL_8

No description provided

◆ CNTRL_9 [1/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_s::CNTRL_9

No description provided

◆ CNTRL_9 [2/4]

unsigned { ... } ::CNTRL_9

No description provided

◆ CNTRL_9 [3/4]

unsigned int _ADI_DE_REGS_YODA_DBG_MUX_CONTROL_4_t::CNTRL_9

No description provided

◆ CNTRL_9 [4/4]

unsigned { ... } ::CNTRL_9

No description provided

◆ COL_BIAS_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::COL_BIAS_PD

No description provided

◆ COL_BIAS_PD [2/2]

unsigned { ... } ::COL_BIAS_PD

No description provided

◆ COL_COMPARATOR_PD [1/2]

unsigned { ... } ::COL_COMPARATOR_PD

No description provided

◆ COL_COMPARATOR_PD [2/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::COL_COMPARATOR_PD

No description provided

◆ COLCORRECT_PARITY_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::COLCORRECT_PARITY_ERREN

No description provided

◆ COLCORRECT_PARITY_ERREN [2/2]

unsigned { ... } ::COLCORRECT_PARITY_ERREN

No description provided

◆ COLCORRECT_PARITY_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::COLCORRECT_PARITY_ERROR

No description provided

◆ COLCORRECT_PARITY_ERROR [2/2]

unsigned { ... } ::COLCORRECT_PARITY_ERROR

No description provided

◆ COMP_REF_DAC1 [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::COMP_REF_DAC1

No description provided

◆ COMP_REF_DAC1 [2/2]

unsigned { ... } ::COMP_REF_DAC1

No description provided

◆ COMP_REF_DAC2 [1/2]

unsigned { ... } ::COMP_REF_DAC2

No description provided

◆ COMP_REF_DAC2 [2/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::COMP_REF_DAC2

No description provided

◆ COMP_REF_DAC3 [1/2]

unsigned { ... } ::COMP_REF_DAC3

No description provided

◆ COMP_REF_DAC3 [2/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::COMP_REF_DAC3

No description provided

◆ COMP_REF_DAC4 [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::COMP_REF_DAC4

No description provided

◆ COMP_REF_DAC4 [2/2]

unsigned { ... } ::COMP_REF_DAC4

No description provided

◆ COMP_REF_DISABLE [1/2]

unsigned { ... } ::COMP_REF_DISABLE

No description provided

◆ COMP_REF_DISABLE [2/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::COMP_REF_DISABLE

No description provided

◆ COMPRESSION_PARITY_ERROR [1/2]

unsigned { ... } ::COMPRESSION_PARITY_ERROR

No description provided

◆ COMPRESSION_PARITY_ERROR [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::COMPRESSION_PARITY_ERROR

No description provided

◆ COMPRESSON_PARITY_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::COMPRESSON_PARITY_ERREN

No description provided

◆ COMPRESSON_PARITY_ERREN [2/2]

unsigned { ... } ::COMPRESSON_PARITY_ERREN

No description provided

◆ COND [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PCCOND_t::COND

No description provided

◆ COND [2/2]

unsigned { ... } ::COND

No description provided

◆ COUNT [1/28]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::COUNT

No description provided

◆ COUNT [2/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [3/28]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::COUNT

No description provided

◆ COUNT [4/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [5/28]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::COUNT

No description provided

◆ COUNT [6/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [7/28]

unsigned int _ADI_DE_REGS_YODA_BINNED_REPEAT_s::COUNT

No description provided

◆ COUNT [8/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [9/28]

unsigned int _ADI_DE_REGS_YODA_DARK_REPEAT_s::COUNT

No description provided

◆ COUNT [10/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [11/28]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::COUNT

No description provided

◆ COUNT [12/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [13/28]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::COUNT

No description provided

◆ COUNT [14/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [15/28]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::COUNT

No description provided

◆ COUNT [16/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [17/28]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::COUNT

No description provided

◆ COUNT [18/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [19/28]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::COUNT

No description provided

◆ COUNT [20/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [21/28]

unsigned int _ADI_DE_REGS_YODA_BINNED_REPEAT_t::COUNT

No description provided

◆ COUNT [22/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [23/28]

unsigned int _ADI_DE_REGS_YODA_DARK_REPEAT_t::COUNT

No description provided

◆ COUNT [24/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [25/28]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::COUNT

No description provided

◆ COUNT [26/28]

unsigned { ... } ::COUNT

No description provided

◆ COUNT [27/28]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::COUNT

No description provided

◆ COUNT [28/28]

unsigned { ... } ::COUNT

No description provided

◆ CTIME_ENABLE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::CTIME_ENABLE

No description provided

◆ CTIME_ENABLE [2/2]

unsigned { ... } ::CTIME_ENABLE

No description provided

◆ CTIME_HI [1/2]

unsigned { ... } ::CTIME_HI

No description provided

◆ CTIME_HI [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_CTIME_1_t::CTIME_HI

No description provided

◆ CTIME_LO [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_CTIME_0_t::CTIME_LO

No description provided

◆ CTIME_LO [2/2]

unsigned { ... } ::CTIME_LO

No description provided

◆ CURRENT_CG [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::CURRENT_CG

No description provided

◆ CURRENT_CG [2/2]

unsigned { ... } ::CURRENT_CG

No description provided

◆ CYCLE_MST [1/2]

unsigned { ... } ::CYCLE_MST

No description provided

◆ CYCLE_MST [2/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::CYCLE_MST

No description provided

◆ DAC_GLOBAL_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_GLOBAL_PD

No description provided

◆ DAC_GLOBAL_PD [2/2]

unsigned { ... } ::DAC_GLOBAL_PD

No description provided

◆ DAC_IN [1/2]

unsigned { ... } ::DAC_IN

No description provided

◆ DAC_IN [2/2]

unsigned int _ADI_AI_REGS_YODA_DAC_DATA_t::DAC_IN

No description provided

◆ DAC_LATCH [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL1_t::DAC_LATCH

No description provided

◆ DAC_LATCH [2/2]

unsigned { ... } ::DAC_LATCH

No description provided

◆ DAC_LOWLOAD [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_LOWLOAD

No description provided

◆ DAC_LOWLOAD [2/2]

unsigned { ... } ::DAC_LOWLOAD

No description provided

◆ DAC_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL2_t::DAC_PD

No description provided

◆ DAC_PD [2/2]

unsigned { ... } ::DAC_PD

No description provided

◆ DAC_SHARE [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::DAC_SHARE

No description provided

◆ DAC_SHARE [2/2]

unsigned { ... } ::DAC_SHARE

No description provided

◆ DAC_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::DAC_SPARE

No description provided

◆ DAC_SPARE [2/2]

unsigned { ... } ::DAC_SPARE

No description provided

◆ DAC_SPARE0 [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::DAC_SPARE0

No description provided

◆ DAC_SPARE0 [2/2]

unsigned { ... } ::DAC_SPARE0

No description provided

◆ DAC_SPARE1 [1/2]

unsigned { ... } ::DAC_SPARE1

No description provided

◆ DAC_SPARE1 [2/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::DAC_SPARE1

No description provided

◆ DAC_SPARE2 [1/2]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::DAC_SPARE2

No description provided

◆ DAC_SPARE2 [2/2]

unsigned { ... } ::DAC_SPARE2

No description provided

◆ DARK_BITS [1/4]

unsigned int _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::DARK_BITS

No description provided

◆ DARK_BITS [2/4]

unsigned { ... } ::DARK_BITS

No description provided

◆ DARK_BITS [3/4]

unsigned int _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::DARK_BITS

No description provided

◆ DARK_BITS [4/4]

unsigned { ... } ::DARK_BITS

No description provided

◆ DARK_ROW_VEC [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DARK_ROW_VEC

Each bit enables the readout of 8 dark rows on the top and the bottom of the array

◆ DARK_ROW_VEC [2/4]

unsigned { ... } ::DARK_ROW_VEC

Each bit enables the readout of 8 dark rows on the top and the bottom of the array

◆ DARK_ROW_VEC [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DARK_ROW_VEC

Each bit enables the readout of 8 dark rows on the top and the bottom of the array

◆ DARK_ROW_VEC [4/4]

unsigned { ... } ::DARK_ROW_VEC

Each bit enables the readout of 8 dark rows on the top and the bottom of the array

◆ DATAPATH_DONE_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::DATAPATH_DONE_SOURCE

No description provided

◆ DATAPATH_DONE_SOURCE [2/2]

unsigned { ... } ::DATAPATH_DONE_SOURCE

No description provided

◆ DBG_EN [1/4]

unsigned int _ADI_DATAPATH_DBG_MUX_s::DBG_EN

Enable for the Debug mux

◆ DBG_EN [2/4]

unsigned { ... } ::DBG_EN

Enable for the Debug mux

◆ DBG_EN [3/4]

unsigned int _ADI_DATAPATH_DBG_MUX_t::DBG_EN

Enable for the Debug mux

◆ DBG_EN [4/4]

unsigned { ... } ::DBG_EN

Enable for the Debug mux

◆ DBG_ENABLE [1/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::DBG_ENABLE

No description provided

◆ DBG_ENABLE [2/4]

unsigned { ... } ::DBG_ENABLE

No description provided

◆ DBG_ENABLE [3/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::DBG_ENABLE

No description provided

◆ DBG_ENABLE [4/4]

unsigned { ... } ::DBG_ENABLE

No description provided

◆ DBG_SEL [1/4]

unsigned int _ADI_DATAPATH_DBG_MUX_s::DBG_SEL

Internal signal debug mux select signal. Refer to Datapath HRM for mux description

◆ DBG_SEL [2/4]

unsigned { ... } ::DBG_SEL

Internal signal debug mux select signal. Refer to Datapath HRM for mux description

◆ DBG_SEL [3/4]

unsigned int _ADI_DATAPATH_DBG_MUX_t::DBG_SEL

Internal signal debug mux select signal. Refer to Datapath HRM for mux description

◆ DBG_SEL [4/4]

unsigned { ... } ::DBG_SEL

Internal signal debug mux select signal. Refer to Datapath HRM for mux description

◆ DCOL [1/2]

unsigned int _ADI_SPIM_REGS_SR_t::DCOL

No description provided

◆ DCOL [2/2]

unsigned { ... } ::DCOL

No description provided

◆ DE_DONE_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::DE_DONE_SOURCE

No description provided

◆ DE_DONE_SOURCE [2/2]

unsigned { ... } ::DE_DONE_SOURCE

No description provided

◆ DEBUG_MUX_CONTROL [1/2]

unsigned int _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::DEBUG_MUX_CONTROL

No description provided

◆ DEBUG_MUX_CONTROL [2/2]

unsigned { ... } ::DEBUG_MUX_CONTROL

No description provided

◆ DELTA_COMP_EN [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DELTA_COMP_EN

Enable delta compression

◆ DELTA_COMP_EN [2/4]

unsigned { ... } ::DELTA_COMP_EN

Enable delta compression

◆ DELTA_COMP_EN [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DELTA_COMP_EN

Enable delta compression

◆ DELTA_COMP_EN [4/4]

unsigned { ... } ::DELTA_COMP_EN

Enable delta compression

◆ DFS [1/2]

unsigned int _ADI_SPIM_REGS_CTRLR0_t::DFS

No description provided

◆ DFS [2/2]

unsigned { ... } ::DFS

No description provided

◆ DIGITAL_BIN_EN [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::DIGITAL_BIN_EN

Enable digital binning between adjacent rows, invalid to set if delta_comp_en is set

◆ DIGITAL_BIN_EN [2/4]

unsigned { ... } ::DIGITAL_BIN_EN

Enable digital binning between adjacent rows, invalid to set if delta_comp_en is set

◆ DIGITAL_BIN_EN [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::DIGITAL_BIN_EN

Enable digital binning between adjacent rows, invalid to set if delta_comp_en is set

◆ DIGITAL_BIN_EN [4/4]

unsigned { ... } ::DIGITAL_BIN_EN

Enable digital binning between adjacent rows, invalid to set if delta_comp_en is set

◆ DLL_CLKA_PARK [1/2]

unsigned { ... } ::DLL_CLKA_PARK

No description provided

◆ DLL_CLKA_PARK [2/2]

unsigned int _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKA_PARK

No description provided

◆ DLL_CLKB_PARK [1/2]

unsigned int _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKB_PARK

No description provided

◆ DLL_CLKB_PARK [2/2]

unsigned { ... } ::DLL_CLKB_PARK

No description provided

◆ DLL_CLKIN_EN [1/2]

unsigned { ... } ::DLL_CLKIN_EN

No description provided

◆ DLL_CLKIN_EN [2/2]

unsigned int _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_CLKIN_EN

No description provided

◆ DLL_COL_EN_CDN [1/2]

unsigned int _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_EN_CDN

No description provided

◆ DLL_COL_EN_CDN [2/2]

unsigned { ... } ::DLL_COL_EN_CDN

No description provided

◆ DLL_COL_EN_SDN [1/2]

unsigned int _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_EN_SDN

No description provided

◆ DLL_COL_EN_SDN [2/2]

unsigned { ... } ::DLL_COL_EN_SDN

No description provided

◆ DLL_COL_SREG_DIR [1/2]

unsigned int _ADI_AI_REGS_YODA_DLL_CONTROL_t::DLL_COL_SREG_DIR

No description provided

◆ DLL_COL_SREG_DIR [2/2]

unsigned { ... } ::DLL_COL_SREG_DIR

No description provided

◆ DLL_CPLF [1/2]

unsigned int _ADI_AI_REGS_YODA_CLKTREE_S1_t::DLL_CPLF

No description provided

◆ DLL_CPLF [2/2]

unsigned { ... } ::DLL_CPLF

No description provided

◆ DLL_LEAK [1/2]

unsigned int _ADI_AI_REGS_YODA_CLKTREE_S1_t::DLL_LEAK

No description provided

◆ DLL_LEAK [2/2]

unsigned { ... } ::DLL_LEAK

No description provided

◆ DLL_LPF_EN [1/2]

unsigned int _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_LPF_EN

No description provided

◆ DLL_LPF_EN [2/2]

unsigned { ... } ::DLL_LPF_EN

No description provided

◆ DLL_OPTION_1 [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_1_t::DLL_OPTION_1

No description provided

◆ DLL_OPTION_1 [2/2]

unsigned { ... } ::DLL_OPTION_1

No description provided

◆ DLL_OPTION_2 [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_1_t::DLL_OPTION_2

No description provided

◆ DLL_OPTION_2 [2/2]

unsigned { ... } ::DLL_OPTION_2

No description provided

◆ DLL_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_0_t::DLL_PD

No description provided

◆ DLL_PD [2/2]

unsigned { ... } ::DLL_PD

No description provided

◆ DLL_REST_EN [1/2]

unsigned int _ADI_AI_REGS_YODA_CLKTREE0_t::DLL_REST_EN

No description provided

◆ DLL_REST_EN [2/2]

unsigned { ... } ::DLL_REST_EN

No description provided

◆ DLL_SPARE [1/2]

unsigned { ... } ::DLL_SPARE

No description provided

◆ DLL_SPARE [2/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::DLL_SPARE

No description provided

◆ DR0 [1/2]

unsigned int _ADI_SPIM_REGS_DR0_t::DR0

No description provided

◆ DR0 [2/2]

unsigned { ... } ::DR0

No description provided

◆ DUMP_DIRECTION_BIT [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::DUMP_DIRECTION_BIT

No description provided

◆ DUMP_DIRECTION_BIT [2/4]

unsigned { ... } ::DUMP_DIRECTION_BIT

No description provided

◆ DUMP_DIRECTION_BIT [3/4]

unsigned { ... } ::DUMP_DIRECTION_BIT

No description provided

◆ DUMP_DIRECTION_BIT [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::DUMP_DIRECTION_BIT

No description provided

◆ DUMP_START [1/4]

unsigned int _ADI_DATAPATH_PP_USEQ_WRITE_s::DUMP_START

Bit to be written by micro-sequencer

◆ DUMP_START [2/4]

unsigned { ... } ::DUMP_START

Bit to be written by micro-sequencer

◆ DUMP_START [3/4]

unsigned int _ADI_DATAPATH_PP_USEQ_WRITE_t::DUMP_START

Bit to be written by micro-sequencer

◆ DUMP_START [4/4]

unsigned { ... } ::DUMP_START

Bit to be written by micro-sequencer

◆ EN_EXT_SYNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EN_EXT_SYNC

No description provided

◆ EN_EXT_SYNC [2/2]

unsigned { ... } ::EN_EXT_SYNC

No description provided

◆ END_ADDRESS [1/4]

unsigned int _ADI_DE_REGS_YODA_BINNED1X2_END_s::END_ADDRESS

No description provided

◆ END_ADDRESS [2/4]

unsigned { ... } ::END_ADDRESS

No description provided

◆ END_ADDRESS [3/4]

unsigned { ... } ::END_ADDRESS

No description provided

◆ END_ADDRESS [4/4]

unsigned int _ADI_DE_REGS_YODA_BINNED1X2_END_t::END_ADDRESS

No description provided

◆ ESC_CLK_BYTE_HALF_PERIOD [1/2]

unsigned { ... } ::ESC_CLK_BYTE_HALF_PERIOD

Sets period of MIPI escape clock

◆ ESC_CLK_BYTE_HALF_PERIOD [2/2]

unsigned int _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::ESC_CLK_BYTE_HALF_PERIOD

Sets period of MIPI escape clock

◆ ESC_CLK_SYS_HALF_PERIOD [1/2]

unsigned { ... } ::ESC_CLK_SYS_HALF_PERIOD

Sets period of MIPI escape clock

◆ ESC_CLK_SYS_HALF_PERIOD [2/2]

unsigned int _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::ESC_CLK_SYS_HALF_PERIOD

Sets period of MIPI escape clock

◆ EXEC_LENGTH [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL2_t::EXEC_LENGTH

No description provided

◆ EXEC_LENGTH [2/2]

unsigned { ... } ::EXEC_LENGTH

No description provided

◆ EXT_FSYNC_ESH [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::EXT_FSYNC_ESH

No description provided

◆ EXT_FSYNC_ESH [2/2]

unsigned { ... } ::EXT_FSYNC_ESH

No description provided

◆ EXT_SYNC_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EXT_SYNC_CNT

No description provided

◆ EXT_SYNC_CNT [2/2]

unsigned { ... } ::EXT_SYNC_CNT

No description provided

◆ EXT_SYNC_MODE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::EXT_SYNC_MODE

No description provided

◆ EXT_SYNC_MODE [2/2]

unsigned { ... } ::EXT_SYNC_MODE

No description provided

◆ FALL_TIME [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::FALL_TIME

No description provided

◆ FALL_TIME [2/2]

unsigned { ... } ::FALL_TIME

No description provided

◆ FIRMWARE_PARITY_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::FIRMWARE_PARITY_ERREN

No description provided

◆ FIRMWARE_PARITY_ERREN [2/2]

unsigned { ... } ::FIRMWARE_PARITY_ERREN

No description provided

◆ FIRMWARE_PARITY_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::FIRMWARE_PARITY_ERROR

No description provided

◆ FIRMWARE_PARITY_ERROR [2/2]

unsigned { ... } ::FIRMWARE_PARITY_ERROR

No description provided

◆ FIX2FLT_EN [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::FIX2FLT_EN

enable fixed to floating point conversion

◆ FIX2FLT_EN [2/4]

unsigned { ... } ::FIX2FLT_EN

enable fixed to floating point conversion

◆ FIX2FLT_EN [3/4]

unsigned { ... } ::FIX2FLT_EN

Enable fixed to floating point conversion. When raw_mode = 2'b00; this can be disabled only when output width is 16, to get gain corrected data without fixed to float conversion

◆ FIX2FLT_EN [4/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::FIX2FLT_EN

Enable fixed to floating point conversion. When raw_mode = 2'b00; this can be disabled only when output width is 16, to get gain corrected data without fixed to float conversion

◆ FIXED_ROW_READ [1/2]

unsigned { ... } ::FIXED_ROW_READ

Read from Fixed Row

◆ FIXED_ROW_READ [2/2]

unsigned int _ADI_EFUSE_CHARACTERIZATION_t::FIXED_ROW_READ

Read from Fixed Row

◆ FORCE_IPDA_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::FORCE_IPDA_FALL_CLK_CNT

No description provided

◆ FORCE_IPDA_FALL_CLK_CNT [2/2]

unsigned { ... } ::FORCE_IPDA_FALL_CLK_CNT

No description provided

◆ FORCE_IPDA_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::FORCE_IPDA_FALL_CNVT_CNT

No description provided

◆ FORCE_IPDA_FALL_CNVT_CNT [2/2]

unsigned { ... } ::FORCE_IPDA_FALL_CNVT_CNT

No description provided

◆ FORCE_IPDA_RISE_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL1_t::FORCE_IPDA_RISE_CLK_CNT

No description provided

◆ FORCE_IPDA_RISE_CLK_CNT [2/2]

unsigned { ... } ::FORCE_IPDA_RISE_CLK_CNT

No description provided

◆ FORCE_IPDA_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::FORCE_IPDA_RISE_CNVT_CNT

No description provided

◆ FORCE_IPDA_RISE_CNVT_CNT [2/2]

unsigned { ... } ::FORCE_IPDA_RISE_CNVT_CNT

No description provided

◆ FORCE_SF_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::FORCE_SF_FALL_CLK_CNT

No description provided

◆ FORCE_SF_FALL_CLK_CNT [2/2]

unsigned { ... } ::FORCE_SF_FALL_CLK_CNT

No description provided

◆ FORCE_SF_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::FORCE_SF_FALL_CNVT_CNT

No description provided

◆ FORCE_SF_FALL_CNVT_CNT [2/2]

unsigned { ... } ::FORCE_SF_FALL_CNVT_CNT

No description provided

◆ FORCE_SF_RISE_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FORCESFCTRL1_t::FORCE_SF_RISE_CLK_CNT

No description provided

◆ FORCE_SF_RISE_CLK_CNT [2/2]

unsigned { ... } ::FORCE_SF_RISE_CLK_CNT

No description provided

◆ FORCE_SF_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::FORCE_SF_RISE_CNVT_CNT

No description provided

◆ FORCE_SF_RISE_CNVT_CNT [2/2]

unsigned { ... } ::FORCE_SF_RISE_CNVT_CNT

No description provided

◆ FRAME_COUNT [1/4]

unsigned int _ADI_DATAPATH_FRAME_NUMBER_s::FRAME_COUNT

Frame counter to be incremented by micro-sequencer

◆ FRAME_COUNT [2/4]

unsigned { ... } ::FRAME_COUNT

Frame counter to be incremented by micro-sequencer

◆ FRAME_COUNT [3/4]

unsigned int _ADI_DATAPATH_FRAME_NUMBER_t::FRAME_COUNT

Depth Frame counter to be incremented by micro-sequencer

◆ FRAME_COUNT [4/4]

unsigned { ... } ::FRAME_COUNT

Depth Frame counter to be incremented by micro-sequencer

◆ FRAME_HEADERT_OVERFLOW_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::FRAME_HEADERT_OVERFLOW_ERREN

No description provided

◆ FRAME_HEADERT_OVERFLOW_ERREN [2/2]

unsigned { ... } ::FRAME_HEADERT_OVERFLOW_ERREN

No description provided

◆ FRF [1/2]

unsigned int _ADI_SPIM_REGS_CTRLR0_t::FRF

No description provided

◆ FRF [2/2]

unsigned { ... } ::FRF

No description provided

◆ FSYNC_FLAG [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::FSYNC_FLAG

No description provided

◆ FSYNC_FLAG [2/2]

unsigned { ... } ::FSYNC_FLAG

No description provided

◆ FSYNC_INT_COUNTER_0 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_0_t::FSYNC_INT_COUNTER_0

No description provided

◆ FSYNC_INT_COUNTER_0 [2/2]

unsigned { ... } ::FSYNC_INT_COUNTER_0

No description provided

◆ FSYNC_INT_COUNTER_1 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCINTCNTR_1_t::FSYNC_INT_COUNTER_1

No description provided

◆ FSYNC_INT_COUNTER_1 [2/2]

unsigned { ... } ::FSYNC_INT_COUNTER_1

No description provided

◆ FSYNC_LSMOD_COUNTER_0 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_0_t::FSYNC_LSMOD_COUNTER_0

No description provided

◆ FSYNC_LSMOD_COUNTER_0 [2/2]

unsigned { ... } ::FSYNC_LSMOD_COUNTER_0

No description provided

◆ FSYNC_LSMOD_COUNTER_1 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::FSYNC_LSMOD_COUNTER_1

No description provided

◆ FSYNC_LSMOD_COUNTER_1 [2/2]

unsigned { ... } ::FSYNC_LSMOD_COUNTER_1

No description provided

◆ FSYNC_OUT_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::FSYNC_OUT_EN

No description provided

◆ FSYNC_OUT_EN [2/2]

unsigned { ... } ::FSYNC_OUT_EN

No description provided

◆ FSYNC_OUT_MODE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::FSYNC_OUT_MODE

No description provided

◆ FSYNC_OUT_MODE [2/2]

unsigned { ... } ::FSYNC_OUT_MODE

No description provided

◆ FSYNC_SYS_COUNTER_0 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_0_t::FSYNC_SYS_COUNTER_0

No description provided

◆ FSYNC_SYS_COUNTER_0 [2/2]

unsigned { ... } ::FSYNC_SYS_COUNTER_0

No description provided

◆ FSYNC_SYS_COUNTER_1 [1/2]

unsigned { ... } ::FSYNC_SYS_COUNTER_1

No description provided

◆ FSYNC_SYS_COUNTER_1 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCSYSCNTR_1_t::FSYNC_SYS_COUNTER_1

No description provided

◆ FUSE_ACCIDENTAL_BURN [1/2]

unsigned { ... } ::FUSE_ACCIDENTAL_BURN

Post-programming error: fuse accidentally burned

◆ FUSE_ACCIDENTAL_BURN [2/2]

unsigned int _ADI_EFUSE_STATUS_t::FUSE_ACCIDENTAL_BURN

Post-programming error: fuse accidentally burned

◆ FUSE_NOT_BURNED [1/2]

unsigned int _ADI_EFUSE_STATUS_t::FUSE_NOT_BURNED

Post-programming error: fuse not burned

◆ FUSE_NOT_BURNED [2/2]

unsigned { ... } ::FUSE_NOT_BURNED

Post-programming error: fuse not burned

◆ GAIN_MEM_MARGIN [1/4]

unsigned int _ADI_DATAPATH_GAIN_MARGIN_CONTROL_s::GAIN_MEM_MARGIN

Read and write margin control. One bit for each gain memory.

◆ GAIN_MEM_MARGIN [2/4]

unsigned { ... } ::GAIN_MEM_MARGIN

Read and write margin control. One bit for each gain memory.

◆ GAIN_MEM_MARGIN [3/4]

unsigned { ... } ::GAIN_MEM_MARGIN

Read and write margin control for gain and offset correction memory. One bit for each gain memory.

◆ GAIN_MEM_MARGIN [4/4]

unsigned int _ADI_DATAPATH_GAIN_MARGIN_CONTROL_t::GAIN_MEM_MARGIN

Read and write margin control for gain and offset correction memory. One bit for each gain memory.

◆ GAIN_MEM_PARITY_ERR [1/2]

unsigned int _ADI_DATAPATH_PARITY_GAIN_MEM_s::GAIN_MEM_PARITY_ERR

Parity error bits from gain correction memories. One bit per bank

◆ GAIN_MEM_PARITY_ERR [2/2]

unsigned { ... } ::GAIN_MEM_PARITY_ERR

Parity error bits from gain correction memories. One bit per bank

◆ GAIN_MEM_PARITY_ERR_COUNT [1/4]

unsigned int _ADI_DATAPATH_GAIN_MEM_PARITY_ERR_CNT_s::GAIN_MEM_PARITY_ERR_COUNT

Count of parity errors indicated for every gain memory read

◆ GAIN_MEM_PARITY_ERR_COUNT [2/4]

unsigned { ... } ::GAIN_MEM_PARITY_ERR_COUNT

Count of parity errors indicated for every gain memory read

◆ GAIN_MEM_PARITY_ERR_COUNT [3/4]

unsigned { ... } ::GAIN_MEM_PARITY_ERR_COUNT

Indicates the parity error count of gain correction memory

◆ GAIN_MEM_PARITY_ERR_COUNT [4/4]

unsigned int _ADI_DATAPATH_PARITY_COUNT_t::GAIN_MEM_PARITY_ERR_COUNT

Indicates the parity error count of gain correction memory

◆ GAINTAG0_CLK_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::GAINTAG0_CLK_FALL_CLK_CNT

No description provided

◆ GAINTAG0_CLK_FALL_CLK_CNT [2/2]

unsigned { ... } ::GAINTAG0_CLK_FALL_CLK_CNT

No description provided

◆ GAINTAG0_CLK_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::GAINTAG0_CLK_FALL_CNVT_CNT

No description provided

◆ GAINTAG0_CLK_FALL_CNVT_CNT [2/2]

unsigned { ... } ::GAINTAG0_CLK_FALL_CNVT_CNT

No description provided

◆ GAINTAG0_CLK_RISE_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL1_t::GAINTAG0_CLK_RISE_CLK_CNT

No description provided

◆ GAINTAG0_CLK_RISE_CLK_CNT [2/2]

unsigned { ... } ::GAINTAG0_CLK_RISE_CLK_CNT

No description provided

◆ GAINTAG0_CLK_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::GAINTAG0_CLK_RISE_CNVT_CNT

No description provided

◆ GAINTAG0_CLK_RISE_CNVT_CNT [2/2]

unsigned { ... } ::GAINTAG0_CLK_RISE_CNVT_CNT

No description provided

◆ GAINTAG1_CLK_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::GAINTAG1_CLK_FALL_CLK_CNT

No description provided

◆ GAINTAG1_CLK_FALL_CLK_CNT [2/2]

unsigned { ... } ::GAINTAG1_CLK_FALL_CLK_CNT

No description provided

◆ GAINTAG1_CLK_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::GAINTAG1_CLK_FALL_CNVT_CNT

No description provided

◆ GAINTAG1_CLK_FALL_CNVT_CNT [2/2]

unsigned { ... } ::GAINTAG1_CLK_FALL_CNVT_CNT

No description provided

◆ GAINTAG1_CLK_RISE_CLK_CNT [1/2]

unsigned { ... } ::GAINTAG1_CLK_RISE_CLK_CNT

No description provided

◆ GAINTAG1_CLK_RISE_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL1_t::GAINTAG1_CLK_RISE_CLK_CNT

No description provided

◆ GAINTAG1_CLK_RISE_CNVT_CNT [1/2]

unsigned { ... } ::GAINTAG1_CLK_RISE_CNVT_CNT

No description provided

◆ GAINTAG1_CLK_RISE_CNVT_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::GAINTAG1_CLK_RISE_CNVT_CNT

No description provided

◆ GAINTAG_LATCH_INHIBIT [1/2]

unsigned { ... } ::GAINTAG_LATCH_INHIBIT

No description provided

◆ GAINTAG_LATCH_INHIBIT [2/2]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::GAINTAG_LATCH_INHIBIT

No description provided

◆ GAINTAG_THRESH_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::GAINTAG_THRESH_FALL_CLK_CNT

No description provided

◆ GAINTAG_THRESH_FALL_CLK_CNT [2/2]

unsigned { ... } ::GAINTAG_THRESH_FALL_CLK_CNT

No description provided

◆ GAINTAG_THRESH_FALL_CNVT_CNT [1/2]

unsigned { ... } ::GAINTAG_THRESH_FALL_CNVT_CNT

No description provided

◆ GAINTAG_THRESH_FALL_CNVT_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::GAINTAG_THRESH_FALL_CNVT_CNT

No description provided

◆ GAINTAG_THRESH_RISE_CLK_CNT [1/2]

unsigned { ... } ::GAINTAG_THRESH_RISE_CLK_CNT

No description provided

◆ GAINTAG_THRESH_RISE_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL1_t::GAINTAG_THRESH_RISE_CLK_CNT

No description provided

◆ GAINTAG_THRESH_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::GAINTAG_THRESH_RISE_CNVT_CNT

No description provided

◆ GAINTAG_THRESH_RISE_CNVT_CNT [2/2]

unsigned { ... } ::GAINTAG_THRESH_RISE_CNVT_CNT

No description provided

◆ GAINTAG_THRESH_SEL [1/2]

unsigned { ... } ::GAINTAG_THRESH_SEL

No description provided

◆ GAINTAG_THRESH_SEL [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::GAINTAG_THRESH_SEL

No description provided

◆ GAINTAG_THRESH_STATIC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::GAINTAG_THRESH_STATIC

No description provided

◆ GAINTAG_THRESH_STATIC [2/2]

unsigned { ... } ::GAINTAG_THRESH_STATIC

No description provided

◆ GLOBAL_GAIN_SCALE_P0 [1/4]

unsigned int _ADI_DATAPATH_GAIN0_s::GLOBAL_GAIN_SCALE_P0

Gain scale for GT0

◆ GLOBAL_GAIN_SCALE_P0 [2/4]

unsigned { ... } ::GLOBAL_GAIN_SCALE_P0

Gain scale for GT0

◆ GLOBAL_GAIN_SCALE_P0 [3/4]

unsigned int _ADI_DATAPATH_GAIN0_t::GLOBAL_GAIN_SCALE_P0

Gain scale for GT0

◆ GLOBAL_GAIN_SCALE_P0 [4/4]

unsigned { ... } ::GLOBAL_GAIN_SCALE_P0

Gain scale for GT0

◆ GLOBAL_GAIN_SCALE_P1 [1/4]

unsigned int _ADI_DATAPATH_GAIN1_s::GLOBAL_GAIN_SCALE_P1

Gain scale for GT1

◆ GLOBAL_GAIN_SCALE_P1 [2/4]

unsigned { ... } ::GLOBAL_GAIN_SCALE_P1

Gain scale for GT1

◆ GLOBAL_GAIN_SCALE_P1 [3/4]

unsigned { ... } ::GLOBAL_GAIN_SCALE_P1

Gain scale for GT1

◆ GLOBAL_GAIN_SCALE_P1 [4/4]

unsigned int _ADI_DATAPATH_GAIN1_t::GLOBAL_GAIN_SCALE_P1

Gain scale for GT1

◆ GLOBAL_GAIN_SCALE_P2 [1/4]

unsigned int _ADI_DATAPATH_GAIN2_s::GLOBAL_GAIN_SCALE_P2

Gain scale for GT2

◆ GLOBAL_GAIN_SCALE_P2 [2/4]

unsigned { ... } ::GLOBAL_GAIN_SCALE_P2

Gain scale for GT2

◆ GLOBAL_GAIN_SCALE_P2 [3/4]

unsigned int _ADI_DATAPATH_GAIN2_t::GLOBAL_GAIN_SCALE_P2

Gain scale for GT2

◆ GLOBAL_GAIN_SCALE_P2 [4/4]

unsigned { ... } ::GLOBAL_GAIN_SCALE_P2

Gain scale for GT2

◆ GLOBAL_GAIN_SCALE_P3 [1/4]

unsigned int _ADI_DATAPATH_GAIN3_s::GLOBAL_GAIN_SCALE_P3

Gain scale for GT3

◆ GLOBAL_GAIN_SCALE_P3 [2/4]

unsigned { ... } ::GLOBAL_GAIN_SCALE_P3

Gain scale for GT3

◆ GLOBAL_GAIN_SCALE_P3 [3/4]

unsigned int _ADI_DATAPATH_GAIN3_t::GLOBAL_GAIN_SCALE_P3

Gain scale for GT3

◆ GLOBAL_GAIN_SCALE_P3 [4/4]

unsigned { ... } ::GLOBAL_GAIN_SCALE_P3

Gain scale for GT3

◆ GLOBAL_GAIN_SHIFT_P0 [1/4]

unsigned int _ADI_DATAPATH_GAIN0_s::GLOBAL_GAIN_SHIFT_P0

Gain shift for GT0

◆ GLOBAL_GAIN_SHIFT_P0 [2/4]

unsigned { ... } ::GLOBAL_GAIN_SHIFT_P0

Gain shift for GT0

◆ GLOBAL_GAIN_SHIFT_P0 [3/4]

unsigned int _ADI_DATAPATH_GAIN0_t::GLOBAL_GAIN_SHIFT_P0

Gain shift for GT0

◆ GLOBAL_GAIN_SHIFT_P0 [4/4]

unsigned { ... } ::GLOBAL_GAIN_SHIFT_P0

Gain shift for GT0

◆ GLOBAL_GAIN_SHIFT_P1 [1/4]

unsigned int _ADI_DATAPATH_GAIN1_s::GLOBAL_GAIN_SHIFT_P1

Gain shift for GT1

◆ GLOBAL_GAIN_SHIFT_P1 [2/4]

unsigned { ... } ::GLOBAL_GAIN_SHIFT_P1

Gain shift for GT1

◆ GLOBAL_GAIN_SHIFT_P1 [3/4]

unsigned int _ADI_DATAPATH_GAIN1_t::GLOBAL_GAIN_SHIFT_P1

Gain shift for GT1

◆ GLOBAL_GAIN_SHIFT_P1 [4/4]

unsigned { ... } ::GLOBAL_GAIN_SHIFT_P1

Gain shift for GT1

◆ GLOBAL_GAIN_SHIFT_P2 [1/4]

unsigned int _ADI_DATAPATH_GAIN2_s::GLOBAL_GAIN_SHIFT_P2

Gain shift for GT2

◆ GLOBAL_GAIN_SHIFT_P2 [2/4]

unsigned { ... } ::GLOBAL_GAIN_SHIFT_P2

Gain shift for GT2

◆ GLOBAL_GAIN_SHIFT_P2 [3/4]

unsigned { ... } ::GLOBAL_GAIN_SHIFT_P2

Gain shift for GT2

◆ GLOBAL_GAIN_SHIFT_P2 [4/4]

unsigned int _ADI_DATAPATH_GAIN2_t::GLOBAL_GAIN_SHIFT_P2

Gain shift for GT2

◆ GLOBAL_GAIN_SHIFT_P3 [1/4]

unsigned int _ADI_DATAPATH_GAIN3_s::GLOBAL_GAIN_SHIFT_P3

Gain shift for GT3

◆ GLOBAL_GAIN_SHIFT_P3 [2/4]

unsigned { ... } ::GLOBAL_GAIN_SHIFT_P3

Gain shift for GT3

◆ GLOBAL_GAIN_SHIFT_P3 [3/4]

unsigned int _ADI_DATAPATH_GAIN3_t::GLOBAL_GAIN_SHIFT_P3

Gain shift for GT3

◆ GLOBAL_GAIN_SHIFT_P3 [4/4]

unsigned { ... } ::GLOBAL_GAIN_SHIFT_P3

Gain shift for GT3

◆ GLOBAL_RESET [1/4]

unsigned int _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::GLOBAL_RESET

No description provided

◆ GLOBAL_RESET [2/4]

unsigned { ... } ::GLOBAL_RESET

No description provided

◆ GLOBAL_RESET [3/4]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::GLOBAL_RESET

No description provided

◆ GLOBAL_RESET [4/4]

unsigned { ... } ::GLOBAL_RESET

No description provided

◆ GO_BIT [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::GO_BIT

No description provided

◆ GO_BIT [2/4]

unsigned { ... } ::GO_BIT

No description provided

◆ GO_BIT [3/4]

unsigned { ... } ::GO_BIT

No description provided

◆ GO_BIT [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::GO_BIT

No description provided

◆ GPIO0_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO0_PIN_FUNC

No description provided

◆ GPIO0_PIN_FUNC [2/2]

unsigned { ... } ::GPIO0_PIN_FUNC

No description provided

◆ GPIO10_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO10_PIN_FUNC

No description provided

◆ GPIO10_PIN_FUNC [2/2]

unsigned { ... } ::GPIO10_PIN_FUNC

No description provided

◆ GPIO11_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO11_PIN_FUNC

No description provided

◆ GPIO11_PIN_FUNC [2/2]

unsigned { ... } ::GPIO11_PIN_FUNC

No description provided

◆ GPIO12_PIN_FUNC [1/2]

unsigned { ... } ::GPIO12_PIN_FUNC

No description provided

◆ GPIO12_PIN_FUNC [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO12_PIN_FUNC

No description provided

◆ GPIO13_PIN_FUNC [1/2]

unsigned { ... } ::GPIO13_PIN_FUNC

No description provided

◆ GPIO13_PIN_FUNC [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO13_PIN_FUNC

No description provided

◆ GPIO14_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO14_PIN_FUNC

No description provided

◆ GPIO14_PIN_FUNC [2/2]

unsigned { ... } ::GPIO14_PIN_FUNC

No description provided

◆ GPIO15_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO15_PIN_FUNC

No description provided

◆ GPIO15_PIN_FUNC [2/2]

unsigned { ... } ::GPIO15_PIN_FUNC

No description provided

◆ GPIO1_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO1_PIN_FUNC

No description provided

◆ GPIO1_PIN_FUNC [2/2]

unsigned { ... } ::GPIO1_PIN_FUNC

No description provided

◆ GPIO2_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO2_PIN_FUNC

No description provided

◆ GPIO2_PIN_FUNC [2/2]

unsigned { ... } ::GPIO2_PIN_FUNC

No description provided

◆ GPIO2_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO2_SOURCE

No description provided

◆ GPIO2_SOURCE [2/2]

unsigned { ... } ::GPIO2_SOURCE

No description provided

◆ GPIO3_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO3_PIN_FUNC

No description provided

◆ GPIO3_PIN_FUNC [2/2]

unsigned { ... } ::GPIO3_PIN_FUNC

No description provided

◆ GPIO3_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO3_SOURCE

No description provided

◆ GPIO3_SOURCE [2/2]

unsigned { ... } ::GPIO3_SOURCE

No description provided

◆ GPIO4_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO4_PIN_FUNC

No description provided

◆ GPIO4_PIN_FUNC [2/2]

unsigned { ... } ::GPIO4_PIN_FUNC

No description provided

◆ GPIO4_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO4_SOURCE

No description provided

◆ GPIO4_SOURCE [2/2]

unsigned { ... } ::GPIO4_SOURCE

No description provided

◆ GPIO5_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO5_PIN_FUNC

No description provided

◆ GPIO5_PIN_FUNC [2/2]

unsigned { ... } ::GPIO5_PIN_FUNC

No description provided

◆ GPIO5_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO5_SOURCE

No description provided

◆ GPIO5_SOURCE [2/2]

unsigned { ... } ::GPIO5_SOURCE

No description provided

◆ GPIO6_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO6_PIN_FUNC

No description provided

◆ GPIO6_PIN_FUNC [2/2]

unsigned { ... } ::GPIO6_PIN_FUNC

No description provided

◆ GPIO6_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO6_SOURCE

No description provided

◆ GPIO6_SOURCE [2/2]

unsigned { ... } ::GPIO6_SOURCE

No description provided

◆ GPIO7_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC1_t::GPIO7_PIN_FUNC

No description provided

◆ GPIO7_PIN_FUNC [2/2]

unsigned { ... } ::GPIO7_PIN_FUNC

No description provided

◆ GPIO7_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO7_SOURCE

No description provided

◆ GPIO7_SOURCE [2/2]

unsigned { ... } ::GPIO7_SOURCE

No description provided

◆ GPIO8_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO8_PIN_FUNC

No description provided

◆ GPIO8_PIN_FUNC [2/2]

unsigned { ... } ::GPIO8_PIN_FUNC

No description provided

◆ GPIO8_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO8_SOURCE

No description provided

◆ GPIO8_SOURCE [2/2]

unsigned { ... } ::GPIO8_SOURCE

No description provided

◆ GPIO9_PIN_FUNC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOPINFUNC2_t::GPIO9_PIN_FUNC

No description provided

◆ GPIO9_PIN_FUNC [2/2]

unsigned { ... } ::GPIO9_PIN_FUNC

No description provided

◆ GPIO9_SOURCE [1/2]

unsigned { ... } ::GPIO9_SOURCE

No description provided

◆ GPIO9_SOURCE [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::GPIO9_SOURCE

No description provided

◆ GPIO_DIRECTION [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOCTRL_t::GPIO_DIRECTION

No description provided

◆ GPIO_DIRECTION [2/2]

unsigned { ... } ::GPIO_DIRECTION

No description provided

◆ GPIO_FSYNC_SNAPSHOT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOFSYNCSNAPSHOT_t::GPIO_FSYNC_SNAPSHOT

No description provided

◆ GPIO_FSYNC_SNAPSHOT [2/2]

unsigned { ... } ::GPIO_FSYNC_SNAPSHOT

No description provided

◆ GPIO_IN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOINPUT_t::GPIO_IN

No description provided

◆ GPIO_IN [2/2]

unsigned { ... } ::GPIO_IN

No description provided

◆ GPIO_OUT [1/4]

unsigned { ... } ::GPIO_OUT

No description provided

◆ GPIO_OUT [2/4]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOOUTPUTSET_t::GPIO_OUT

No description provided

◆ GPIO_OUT [3/4]

unsigned int _ADI_USEQ_REGS_MAP1_GPIOOUTPUTCLR_t::GPIO_OUT

No description provided

◆ GPIO_OUT [4/4]

unsigned { ... } ::GPIO_OUT

No description provided

◆ GPR_R0 [1/2]

unsigned { ... } ::GPR_R0

No description provided

◆ GPR_R0 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR0_t::GPR_R0

No description provided

◆ GPR_R1 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR1_t::GPR_R1

No description provided

◆ GPR_R1 [2/2]

unsigned { ... } ::GPR_R1

No description provided

◆ GPR_R10 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR10_t::GPR_R10

No description provided

◆ GPR_R10 [2/2]

unsigned { ... } ::GPR_R10

No description provided

◆ GPR_R11 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR11_t::GPR_R11

No description provided

◆ GPR_R11 [2/2]

unsigned { ... } ::GPR_R11

No description provided

◆ GPR_R12 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR12_t::GPR_R12

No description provided

◆ GPR_R12 [2/2]

unsigned { ... } ::GPR_R12

No description provided

◆ GPR_R13 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR13_t::GPR_R13

No description provided

◆ GPR_R13 [2/2]

unsigned { ... } ::GPR_R13

No description provided

◆ GPR_R14 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR14_t::GPR_R14

No description provided

◆ GPR_R14 [2/2]

unsigned { ... } ::GPR_R14

No description provided

◆ GPR_R15 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR15_t::GPR_R15

No description provided

◆ GPR_R15 [2/2]

unsigned { ... } ::GPR_R15

No description provided

◆ GPR_R16 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR16_t::GPR_R16

No description provided

◆ GPR_R16 [2/2]

unsigned { ... } ::GPR_R16

No description provided

◆ GPR_R17 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR17_t::GPR_R17

No description provided

◆ GPR_R17 [2/2]

unsigned { ... } ::GPR_R17

No description provided

◆ GPR_R18 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR18_t::GPR_R18

No description provided

◆ GPR_R18 [2/2]

unsigned { ... } ::GPR_R18

No description provided

◆ GPR_R19 [1/2]

unsigned { ... } ::GPR_R19

No description provided

◆ GPR_R19 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR19_t::GPR_R19

No description provided

◆ GPR_R2 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR2_t::GPR_R2

No description provided

◆ GPR_R2 [2/2]

unsigned { ... } ::GPR_R2

No description provided

◆ GPR_R20 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR20_t::GPR_R20

No description provided

◆ GPR_R20 [2/2]

unsigned { ... } ::GPR_R20

No description provided

◆ GPR_R21 [1/2]

unsigned { ... } ::GPR_R21

No description provided

◆ GPR_R21 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR21_t::GPR_R21

No description provided

◆ GPR_R22 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR22_t::GPR_R22

No description provided

◆ GPR_R22 [2/2]

unsigned { ... } ::GPR_R22

No description provided

◆ GPR_R23 [1/2]

unsigned { ... } ::GPR_R23

No description provided

◆ GPR_R23 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR23_t::GPR_R23

No description provided

◆ GPR_R24 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR24_t::GPR_R24

No description provided

◆ GPR_R24 [2/2]

unsigned { ... } ::GPR_R24

No description provided

◆ GPR_R25 [1/2]

unsigned { ... } ::GPR_R25

No description provided

◆ GPR_R25 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR25_t::GPR_R25

No description provided

◆ GPR_R26 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR26_t::GPR_R26

No description provided

◆ GPR_R26 [2/2]

unsigned { ... } ::GPR_R26

No description provided

◆ GPR_R27 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR27_t::GPR_R27

No description provided

◆ GPR_R27 [2/2]

unsigned { ... } ::GPR_R27

No description provided

◆ GPR_R28 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR28_t::GPR_R28

No description provided

◆ GPR_R28 [2/2]

unsigned { ... } ::GPR_R28

No description provided

◆ GPR_R29 [1/2]

unsigned { ... } ::GPR_R29

No description provided

◆ GPR_R29 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR29_t::GPR_R29

No description provided

◆ GPR_R3 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR3_t::GPR_R3

No description provided

◆ GPR_R3 [2/2]

unsigned { ... } ::GPR_R3

No description provided

◆ GPR_R30 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR30_t::GPR_R30

No description provided

◆ GPR_R30 [2/2]

unsigned { ... } ::GPR_R30

No description provided

◆ GPR_R31 [1/2]

unsigned { ... } ::GPR_R31

No description provided

◆ GPR_R31 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR31_t::GPR_R31

No description provided

◆ GPR_R4 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR4_t::GPR_R4

No description provided

◆ GPR_R4 [2/2]

unsigned { ... } ::GPR_R4

No description provided

◆ GPR_R5 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR5_t::GPR_R5

No description provided

◆ GPR_R5 [2/2]

unsigned { ... } ::GPR_R5

No description provided

◆ GPR_R6 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR6_t::GPR_R6

No description provided

◆ GPR_R6 [2/2]

unsigned { ... } ::GPR_R6

No description provided

◆ GPR_R7 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR7_t::GPR_R7

No description provided

◆ GPR_R7 [2/2]

unsigned { ... } ::GPR_R7

No description provided

◆ GPR_R8 [1/2]

unsigned { ... } ::GPR_R8

No description provided

◆ GPR_R8 [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR8_t::GPR_R8

No description provided

◆ GPR_R9 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GPRR9_t::GPR_R9

No description provided

◆ GPR_R9 [2/2]

unsigned { ... } ::GPR_R9

No description provided

◆ GT01_SWAP [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_GTSWAP_t::GT01_SWAP

No description provided

◆ GT01_SWAP [2/2]

unsigned { ... } ::GT01_SWAP

No description provided

◆ GT_EN_00 [1/4]

unsigned { ... } ::GT_EN_00

Remap value for GT value of 00 from analog

◆ GT_EN_00 [2/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_00

Remap value for GT value of 00 from analog

◆ GT_EN_00 [3/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_00

Remap value for GT value of 00 from analog

◆ GT_EN_00 [4/4]

unsigned { ... } ::GT_EN_00

Remap value for GT value of 00 from analog

◆ GT_EN_01 [1/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_01

Remap value for GT value of 01 from analog

◆ GT_EN_01 [2/4]

unsigned { ... } ::GT_EN_01

Remap value for GT value of 01 from analog

◆ GT_EN_01 [3/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_01

Remap value for GT value of 01 from analog

◆ GT_EN_01 [4/4]

unsigned { ... } ::GT_EN_01

Remap value for GT value of 01 from analog

◆ GT_EN_10 [1/4]

unsigned { ... } ::GT_EN_10

Remap value for GT value of 10 from analog

◆ GT_EN_10 [2/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_10

Remap value for GT value of 10 from analog

◆ GT_EN_10 [3/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_10

Remap value for GT value of 10 from analog

◆ GT_EN_10 [4/4]

unsigned { ... } ::GT_EN_10

Remap value for GT value of 10 from analog

◆ GT_EN_11 [1/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_s::GT_EN_11

Remap value for GT value of 11 from analog

◆ GT_EN_11 [2/4]

unsigned { ... } ::GT_EN_11

Remap value for GT value of 11 from analog

◆ GT_EN_11 [3/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_t::GT_EN_11

Remap value for GT value of 11 from analog

◆ GT_EN_11 [4/4]

unsigned { ... } ::GT_EN_11

Remap value for GT value of 11 from analog

◆ GT_LATCH_ACTIVE_HI [1/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_s::GT_LATCH_ACTIVE_HI

Indicates whether the gt latch is active HIGH

◆ GT_LATCH_ACTIVE_HI [2/4]

unsigned { ... } ::GT_LATCH_ACTIVE_HI

Indicates whether the gt latch is active HIGH

◆ GT_LATCH_ACTIVE_HI [3/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_t::GT_LATCH_ACTIVE_HI

Indicates whether the gt latch is active HIGH

◆ GT_LATCH_ACTIVE_HI [4/4]

unsigned { ... } ::GT_LATCH_ACTIVE_HI

Indicates whether the gt latch is active HIGH

◆ HSP_1024X38_MARGIN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_1024X38_MARGIN

HSP 1024x38 Margin

◆ HSP_1024X38_MARGIN [2/2]

unsigned { ... } ::HSP_1024X38_MARGIN

HSP 1024x38 Margin

◆ HSP_128X76_MARGIN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_128X76_MARGIN

HSP 128x76 Margin

◆ HSP_128X76_MARGIN [2/2]

unsigned { ... } ::HSP_128X76_MARGIN

HSP 128x76 Margin

◆ HSP_256X76_MARGIN [1/2]

unsigned { ... } ::HSP_256X76_MARGIN

HSP 256x76 Margin

◆ HSP_256X76_MARGIN [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_256X76_MARGIN

HSP 256x76 Margin

◆ HSP_SPRAM_DST [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPRAM_DST

HSP SPRAM DST (Disable Self Timing) Register

◆ HSP_SPRAM_DST [2/2]

unsigned { ... } ::HSP_SPRAM_DST

HSP SPRAM DST (Disable Self Timing) Register

◆ HSP_SPRAM_MARGIN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPRAM_MARGIN

HSP SPRAM Margin

◆ HSP_SPRAM_MARGIN [2/2]

unsigned { ... } ::HSP_SPRAM_MARGIN

HSP SPRAM Margin

◆ HSP_SPROM_MARGIN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_HSP_DFT_t::HSP_SPROM_MARGIN

HSP SPROM Margin

◆ HSP_SPROM_MARGIN [2/2]

unsigned { ... } ::HSP_SPROM_MARGIN

HSP SPROM Margin

◆ I2CBURSTMODE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_I2CCTRL_t::I2CBURSTMODE

No description provided

◆ I2CBURSTMODE [2/2]

unsigned { ... } ::I2CBURSTMODE

No description provided

◆ I2CRDPREFETCHENABLE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_I2CCTRL_t::I2CRDPREFETCHENABLE

No description provided

◆ I2CRDPREFETCHENABLE [2/2]

unsigned { ... } ::I2CRDPREFETCHENABLE

No description provided

◆ IA_BANK_TYPE [1/4]

unsigned int _ADI_DATAPATH_IA_BANK_TYPE_s::IA_BANK_TYPE

1'b1 = LSB bits of address used to select bank in reg mem access module. 1'b0 = have another input which specifies the bank

◆ IA_BANK_TYPE [2/4]

unsigned { ... } ::IA_BANK_TYPE

1'b1 = LSB bits of address used to select bank in reg mem access module. 1'b0 = have another input which specifies the bank

◆ IA_BANK_TYPE [3/4]

unsigned { ... } ::IA_BANK_TYPE

1'b1 = LSB bits of address used to select bank in reg mem access module. 1'b0 = have another input which specifies the bank

◆ IA_BANK_TYPE [4/4]

unsigned int _ADI_DATAPATH_IA_BANK_TYPE_t::IA_BANK_TYPE

1'b1 = LSB bits of address used to select bank in reg mem access module. 1'b0 = have another input which specifies the bank

◆ IA_ENA [1/4]

unsigned int _ADI_DATAPATH_IA_SELECT_s::IA_ENA

Indirect access enable for column correction memory

◆ IA_ENA [2/4]

unsigned { ... } ::IA_ENA

Indirect access enable for column correction memory

◆ IA_ENA [3/4]

unsigned int _ADI_DATAPATH_IA_SELECT_t::IA_ENA

Indirect access enable for column correction memory

◆ IA_ENA [4/4]

unsigned { ... } ::IA_ENA

Indirect access enable for column correction memory

◆ IA_RDDATA [1/4]

unsigned { ... } ::IA_RDDATA

Indirect access read data

◆ IA_RDDATA [2/4]

unsigned int _ADI_DATAPATH_IA_RDDATA_REG_s::IA_RDDATA

Indirect access read data

◆ IA_RDDATA [3/4]

unsigned { ... } ::IA_RDDATA

Indirect access read data

◆ IA_RDDATA [4/4]

unsigned int _ADI_DATAPATH_IA_RDDATA_REG_t::IA_RDDATA

Indirect access read data

◆ IA_RDDATA_ALIAS [1/4]

unsigned { ... } ::IA_RDDATA_ALIAS

Indirect access read data (alias for ia_rdata)

◆ IA_RDDATA_ALIAS [2/4]

unsigned int _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_s::IA_RDDATA_ALIAS

Indirect access read data (alias for ia_rdata)

◆ IA_RDDATA_ALIAS [3/4]

unsigned { ... } ::IA_RDDATA_ALIAS

Indirect access read data (alias for ia_rdata)

◆ IA_RDDATA_ALIAS [4/4]

unsigned int _ADI_DATAPATH_IA_RDDATA_REG_ALIAS_t::IA_RDDATA_ALIAS

Indirect access read data (alias for ia_rdata)

◆ IA_START_ADDR [1/4]

unsigned int _ADI_DATAPATH_IA_ADDR_REG_s::IA_START_ADDR

Indirect access start address

◆ IA_START_ADDR [2/4]

unsigned { ... } ::IA_START_ADDR

Indirect access start address

◆ IA_START_ADDR [3/4]

unsigned int _ADI_DATAPATH_IA_ADDR_REG_t::IA_START_ADDR

Indirect access start address

◆ IA_START_ADDR [4/4]

unsigned { ... } ::IA_START_ADDR

Indirect access start address

◆ IA_WRDATA [1/4]

unsigned int _ADI_DATAPATH_IA_WRDATA_REG_s::IA_WRDATA

Indirect access write data

◆ IA_WRDATA [2/4]

unsigned { ... } ::IA_WRDATA

Indirect access write data

◆ IA_WRDATA [3/4]

unsigned int _ADI_DATAPATH_IA_WRDATA_REG_t::IA_WRDATA

Indirect access write data

◆ IA_WRDATA [4/4]

unsigned { ... } ::IA_WRDATA

Indirect access write data

◆ IA_WRDATA_ALIAS [1/4]

unsigned int _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_s::IA_WRDATA_ALIAS

Indirect access write data (alias for ia_wrdata)

◆ IA_WRDATA_ALIAS [2/4]

unsigned { ... } ::IA_WRDATA_ALIAS

Indirect access write data (alias for ia_wrdata)

◆ IA_WRDATA_ALIAS [3/4]

unsigned int _ADI_DATAPATH_IA_WRDATA_REG_ALIAS_t::IA_WRDATA_ALIAS

Indirect access write data (alias for ia_wrdata)

◆ IA_WRDATA_ALIAS [4/4]

unsigned { ... } ::IA_WRDATA_ALIAS

Indirect access write data (alias for ia_wrdata)

◆ IBOUT_ADJ [1/2]

unsigned int _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IBOUT_ADJ

No description provided

◆ IBOUT_ADJ [2/2]

unsigned { ... } ::IBOUT_ADJ

No description provided

◆ ICR [1/2]

unsigned int _ADI_SPIM_REGS_ICR_t::ICR

No description provided

◆ ICR [2/2]

unsigned { ... } ::ICR

No description provided

◆ IDCODE [1/2]

unsigned { ... } ::IDCODE

No description provided

◆ IDCODE [2/2]

unsigned int _ADI_SPIM_REGS_IDR_t::IDCODE

No description provided

◆ INIT_VEC_BIT [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::INIT_VEC_BIT

No description provided

◆ INIT_VEC_BIT [2/4]

unsigned { ... } ::INIT_VEC_BIT

No description provided

◆ INIT_VEC_BIT [3/4]

unsigned { ... } ::INIT_VEC_BIT

No description provided

◆ INIT_VEC_BIT [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::INIT_VEC_BIT

No description provided

◆ INTCTR_AUTORESTART [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_AUTORESTART

No description provided

◆ INTCTR_AUTORESTART [2/2]

unsigned { ... } ::INTCTR_AUTORESTART

No description provided

◆ INTCTR_ESH [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_ESH

No description provided

◆ INTCTR_ESH [2/2]

unsigned { ... } ::INTCTR_ESH

No description provided

◆ INTCTR_FLAG [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::INTCTR_FLAG

No description provided

◆ INTCTR_FLAG [2/2]

unsigned { ... } ::INTCTR_FLAG

No description provided

◆ INTCTR_FREEZE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_FREEZE

No description provided

◆ INTCTR_FREEZE [2/2]

unsigned { ... } ::INTCTR_FREEZE

No description provided

◆ INTCTR_START [1/2]

unsigned { ... } ::INTCTR_START

No description provided

◆ INTCTR_START [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::INTCTR_START

No description provided

◆ INTERRUPT_APB_TIMEOUT_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_APB_TIMEOUT_ERR_EN

No description provided

◆ INTERRUPT_APB_TIMEOUT_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_APB_TIMEOUT_ERR_EN

No description provided

◆ INTERRUPT_CAL_STACK_OVRFLOW_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CAL_STACK_OVRFLOW_ERR_EN

No description provided

◆ INTERRUPT_CAL_STACK_OVRFLOW_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_CAL_STACK_OVRFLOW_ERR_EN

No description provided

◆ INTERRUPT_CAL_STACK_UNDR_RUN_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CAL_STACK_UNDR_RUN_ERR_EN

No description provided

◆ INTERRUPT_CAL_STACK_UNDR_RUN_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_CAL_STACK_UNDR_RUN_ERR_EN

No description provided

◆ INTERRUPT_COLCORRECT_PARITY_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_COLCORRECT_PARITY_ERR_EN

No description provided

◆ INTERRUPT_COLCORRECT_PARITY_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_COLCORRECT_PARITY_ERR_EN

No description provided

◆ INTERRUPT_COMPRESSION_PARITY_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_COMPRESSION_PARITY_ERR_EN

No description provided

◆ INTERRUPT_COMPRESSION_PARITY_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_COMPRESSION_PARITY_ERR_EN

No description provided

◆ INTERRUPT_CSI_TX_PKT_CMD_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_CSI_TX_PKT_CMD_ERR_EN

No description provided

◆ INTERRUPT_CSI_TX_PKT_CMD_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_CSI_TX_PKT_CMD_ERR_EN

No description provided

◆ INTERRUPT_FIRMWARE_PARITY_ERR_EN [1/2]

unsigned { ... } ::INTERRUPT_FIRMWARE_PARITY_ERR_EN

No description provided

◆ INTERRUPT_FIRMWARE_PARITY_ERR_EN [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_FIRMWARE_PARITY_ERR_EN

No description provided

◆ INTERRUPT_INVALID_OPCOD_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_INVALID_OPCOD_ERR_EN

No description provided

◆ INTERRUPT_INVALID_OPCOD_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_INVALID_OPCOD_ERR_EN

No description provided

◆ INTERRUPT_INVALID_OPERAND_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_INVALID_OPERAND_ERR_EN

No description provided

◆ INTERRUPT_INVALID_OPERAND_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_INVALID_OPERAND_ERR_EN

No description provided

◆ INTERRUPT_MIPI_CSI2_UNDERFLOW_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_MIPI_CSI2_UNDERFLOW_ERR_EN

No description provided

◆ INTERRUPT_MIPI_CSI2_UNDERFLOW_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_MIPI_CSI2_UNDERFLOW_ERR_EN

No description provided

◆ INTERRUPT_PSEUDO_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_PSEUDO_ERR_EN

No description provided

◆ INTERRUPT_PSEUDO_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_PSEUDO_ERR_EN

No description provided

◆ INTERRUPT_REG_WR_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_REG_WR_ERR_EN

No description provided

◆ INTERRUPT_REG_WR_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_REG_WR_ERR_EN

No description provided

◆ INTERRUPT_USER_DEFINED_ERR_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_INTERRUPTENABLE_t::INTERRUPT_USER_DEFINED_ERR_EN

No description provided

◆ INTERRUPT_USER_DEFINED_ERR_EN [2/2]

unsigned { ... } ::INTERRUPT_USER_DEFINED_ERR_EN

No description provided

◆ INTERV_1_0 [1/2]

unsigned int _ADI_SS_REGS_SSINTERV_10_t::INTERV_1_0

No description provided

◆ INTERV_1_0 [2/2]

unsigned { ... } ::INTERV_1_0

No description provided

◆ INTERV_1_1 [1/2]

unsigned int _ADI_SS_REGS_SSINTERV_11_t::INTERV_1_1

No description provided

◆ INTERV_1_1 [2/2]

unsigned { ... } ::INTERV_1_1

No description provided

◆ INTERV_2_0 [1/2]

unsigned int _ADI_SS_REGS_SSINTERV_20_t::INTERV_2_0

No description provided

◆ INTERV_2_0 [2/2]

unsigned { ... } ::INTERV_2_0

No description provided

◆ INTERV_2_1 [1/2]

unsigned int _ADI_SS_REGS_SSINTERV_21_t::INTERV_2_1

No description provided

◆ INTERV_2_1 [2/2]

unsigned { ... } ::INTERV_2_1

No description provided

◆ INTERV_3_0 [1/2]

unsigned int _ADI_SS_REGS_SSINTERV_30_t::INTERV_3_0

No description provided

◆ INTERV_3_0 [2/2]

unsigned { ... } ::INTERV_3_0

No description provided

◆ INTERV_3_1 [1/2]

unsigned int _ADI_SS_REGS_SSINTERV_31_t::INTERV_3_1

No description provided

◆ INTERV_3_1 [2/2]

unsigned { ... } ::INTERV_3_1

No description provided

◆ INTERVAL_LSBS [1/2]

unsigned { ... } ::INTERVAL_LSBS

No description provided

◆ INTERVAL_LSBS [2/2]

unsigned int _ADI_SS_REGS_SSINTERVLO_t::INTERVAL_LSBS

No description provided

◆ INTERVAL_MSBS [1/2]

unsigned int _ADI_SS_REGS_SSINTERVHI_t::INTERVAL_MSBS

No description provided

◆ INTERVAL_MSBS [2/2]

unsigned { ... } ::INTERVAL_MSBS

No description provided

◆ INVALID_OPCODE_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::INVALID_OPCODE_ERREN

No description provided

◆ INVALID_OPCODE_ERREN [2/2]

unsigned { ... } ::INVALID_OPCODE_ERREN

No description provided

◆ INVALID_OPCODE_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::INVALID_OPCODE_ERROR

No description provided

◆ INVALID_OPCODE_ERROR [2/2]

unsigned { ... } ::INVALID_OPCODE_ERROR

No description provided

◆ INVALID_OPERAND_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::INVALID_OPERAND_ERREN

No description provided

◆ INVALID_OPERAND_ERREN [2/2]

unsigned { ... } ::INVALID_OPERAND_ERREN

No description provided

◆ INVALID_OPERAND_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::INVALID_OPERAND_ERROR

No description provided

◆ INVALID_OPERAND_ERROR [2/2]

unsigned { ... } ::INVALID_OPERAND_ERROR

No description provided

◆ IPDA_GAIN [1/2]

unsigned int _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IPDA_GAIN

No description provided

◆ IPDA_GAIN [2/2]

unsigned { ... } ::IPDA_GAIN

No description provided

◆ IPDA_SPARE0 [1/2]

unsigned int _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::IPDA_SPARE0

No description provided

◆ IPDA_SPARE0 [2/2]

unsigned { ... } ::IPDA_SPARE0

No description provided

◆ IPDA_SPARE1 [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::IPDA_SPARE1

No description provided

◆ IPDA_SPARE1 [2/2]

unsigned { ... } ::IPDA_SPARE1

No description provided

◆ IPMUX_SEL [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::IPMUX_SEL

No description provided

◆ IPMUX_SEL [2/2]

unsigned { ... } ::IPMUX_SEL

No description provided

◆ IRQ_CLR [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::IRQ_CLR

No description provided

◆ IRQ_CLR [2/2]

unsigned { ... } ::IRQ_CLR

No description provided

◆ IRQ_ENABLE [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::IRQ_ENABLE

No description provided

◆ IRQ_ENABLE [2/2]

unsigned { ... } ::IRQ_ENABLE

No description provided

◆ IRQ_STATUS [1/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::IRQ_STATUS

No description provided

◆ IRQ_STATUS [2/2]

unsigned { ... } ::IRQ_STATUS

No description provided

◆ L1FALL [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::L1FALL

No description provided

◆ L1FALL [2/2]

unsigned { ... } ::L1FALL

No description provided

◆ L1FALL_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L1FALL_MSB

No description provided

◆ L1FALL_MSB [2/2]

unsigned { ... } ::L1FALL_MSB

No description provided

◆ L1RISE [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::L1RISE

No description provided

◆ L1RISE [2/2]

unsigned { ... } ::L1RISE

No description provided

◆ L1RISE_MSB [1/2]

unsigned { ... } ::L1RISE_MSB

No description provided

◆ L1RISE_MSB [2/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L1RISE_MSB

No description provided

◆ L2FALL [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::L2FALL

No description provided

◆ L2FALL [2/2]

unsigned { ... } ::L2FALL

No description provided

◆ L2FALL_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L2FALL_MSB

No description provided

◆ L2FALL_MSB [2/2]

unsigned { ... } ::L2FALL_MSB

No description provided

◆ L2RISE [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::L2RISE

No description provided

◆ L2RISE [2/2]

unsigned { ... } ::L2RISE

No description provided

◆ L2RISE_MSB [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CYCLE_t::L2RISE_MSB

No description provided

◆ L2RISE_MSB [2/2]

unsigned { ... } ::L2RISE_MSB

No description provided

◆ L_SKEW_CAL_I [1/2]

unsigned { ... } ::L_SKEW_CAL_I

Initiate an initial skew calibration packet. Microsequencer will write to this register on powerup. This will be reset by the skew_cal_done input from MIPI

◆ L_SKEW_CAL_I [2/2]

unsigned int _ADI_DATAPATH_MIPI_SKEW_CAL_t::L_SKEW_CAL_I

Initiate an initial skew calibration packet. Microsequencer will write to this register on powerup. This will be reset by the skew_cal_done input from MIPI

◆ L_SKEW_CAL_P [1/2]

unsigned int _ADI_DATAPATH_MIPI_SKEW_CAL_t::L_SKEW_CAL_P

Initiate a periodic skew calibration packet.

◆ L_SKEW_CAL_P [2/2]

unsigned { ... } ::L_SKEW_CAL_P

Initiate a periodic skew calibration packet.

◆ LD_ADDR [1/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::LD_ADDR

No description provided

◆ LD_ADDR [2/4]

unsigned { ... } ::LD_ADDR

No description provided

◆ LD_ADDR [3/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::LD_ADDR

No description provided

◆ LD_ADDR [4/4]

unsigned { ... } ::LD_ADDR

No description provided

◆ LD_DATA [1/4]

unsigned { ... } ::LD_DATA

No description provided

◆ LD_DATA [2/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_s::LD_DATA

No description provided

◆ LD_DATA [3/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATA_t::LD_DATA

No description provided

◆ LD_DATA [4/4]

unsigned { ... } ::LD_DATA

No description provided

◆ LD_DATA_ALIAS [1/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_s::LD_DATA_ALIAS

No description provided

◆ LD_DATA_ALIAS [2/4]

unsigned { ... } ::LD_DATA_ALIAS

No description provided

◆ LD_DATA_ALIAS [3/4]

unsigned { ... } ::LD_DATA_ALIAS

No description provided

◆ LD_DATA_ALIAS [4/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADDATAALIAS_t::LD_DATA_ALIAS

No description provided

◆ LD_RAM_SEL [1/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::LD_RAM_SEL

No description provided

◆ LD_RAM_SEL [2/4]

unsigned { ... } ::LD_RAM_SEL

No description provided

◆ LD_RAM_SEL [3/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::LD_RAM_SEL

No description provided

◆ LD_RAM_SEL [4/4]

unsigned { ... } ::LD_RAM_SEL

No description provided

◆ LFSR_EN [1/4]

unsigned int _ADI_DATAPATH_PP_LFSR_s::LFSR_EN

Indicates whether the Pixel Packer must work in LFSR mode

◆ LFSR_EN [2/4]

unsigned { ... } ::LFSR_EN

Indicates whether the Pixel Packer must work in LFSR mode

◆ LFSR_EN [3/4]

unsigned { ... } ::LFSR_EN

Indicates whether the Pixel Packer must work in LFSR mode

◆ LFSR_EN [4/4]

unsigned int _ADI_DATAPATH_PP_LFSR_t::LFSR_EN

Indicates whether the Pixel Packer must work in LFSR mode

◆ LFSR_MODE [1/4]

unsigned int _ADI_DATAPATH_PP_LFSR_s::LFSR_MODE

Indicates the LFSR data generation mode

◆ LFSR_MODE [2/4]

unsigned { ... } ::LFSR_MODE

Indicates the LFSR data generation mode

◆ LFSR_MODE [3/4]

unsigned int _ADI_DATAPATH_PP_LFSR_t::LFSR_MODE

Indicates the LFSR data generation mode

◆ LFSR_MODE [4/4]

unsigned { ... } ::LFSR_MODE

Indicates the LFSR data generation mode

◆ LFSR_SEED [1/4]

unsigned int _ADI_DATAPATH_PP_LFSR_s::LFSR_SEED

The initial seed value for the data generation in LFSR mode

◆ LFSR_SEED [2/4]

unsigned { ... } ::LFSR_SEED

The initial seed value for the data generation in LFSR mode

◆ LFSR_SEED [3/4]

unsigned int _ADI_DATAPATH_PP_LFSR_t::LFSR_SEED

The initial seed value for the data generation in LFSR mode

◆ LFSR_SEED [4/4]

unsigned { ... } ::LFSR_SEED

The initial seed value for the data generation in LFSR mode

◆ LIGHTMUX_SEL [1/2]

unsigned int _ADI_AI_REGS_YODA_LSCTRL0_S1_t::LIGHTMUX_SEL

No description provided

◆ LIGHTMUX_SEL [2/2]

unsigned { ... } ::LIGHTMUX_SEL

No description provided

◆ LINE_MEM_MARGIN [1/4]

unsigned int _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::LINE_MEM_MARGIN

Read and write margin control. One bit for each line memory.

◆ LINE_MEM_MARGIN [2/4]

unsigned { ... } ::LINE_MEM_MARGIN

Read and write margin control. One bit for each line memory.

◆ LINE_MEM_MARGIN [3/4]

unsigned int _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::LINE_MEM_MARGIN

Read and write margin control. One bit for each line memory.

◆ LINE_MEM_MARGIN [4/4]

unsigned { ... } ::LINE_MEM_MARGIN

Read and write margin control. One bit for each line memory.

◆ LINE_MEM_PARITY_ERR [1/2]

unsigned int _ADI_DATAPATH_PARITY_LINE_MEM_s::LINE_MEM_PARITY_ERR

Parity error bits from line buffer memories. One bit per bank

◆ LINE_MEM_PARITY_ERR [2/2]

unsigned { ... } ::LINE_MEM_PARITY_ERR

Parity error bits from line buffer memories. One bit per bank

◆ LINE_MEM_PARITY_ERR_COUNT [1/4]

unsigned int _ADI_DATAPATH_LINE_MEM_PARITY_ERR_CNT_s::LINE_MEM_PARITY_ERR_COUNT

Count of parity errors indicated for every line memory read

◆ LINE_MEM_PARITY_ERR_COUNT [2/4]

unsigned { ... } ::LINE_MEM_PARITY_ERR_COUNT

Count of parity errors indicated for every line memory read

◆ LINE_MEM_PARITY_ERR_COUNT [3/4]

unsigned int _ADI_DATAPATH_PARITY_COUNT_t::LINE_MEM_PARITY_ERR_COUNT

Indicates the parity error count of line memory

◆ LINE_MEM_PARITY_ERR_COUNT [4/4]

unsigned { ... } ::LINE_MEM_PARITY_ERR_COUNT

Indicates the parity error count of line memory

◆ LOAD_LC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_LC

No description provided

◆ LOAD_LC [2/2]

unsigned { ... } ::LOAD_LC

No description provided

◆ LOAD_PAD [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_PAD

No description provided

◆ LOAD_PAD [2/2]

unsigned { ... } ::LOAD_PAD

No description provided

◆ LOAD_POKE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::LOAD_POKE

No description provided

◆ LOAD_POKE [2/2]

unsigned { ... } ::LOAD_POKE

No description provided

◆ LPS_BUSY [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_BUSY

No description provided

◆ LPS_BUSY [2/4]

unsigned { ... } ::LPS_BUSY

No description provided

◆ LPS_BUSY [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_BUSY

No description provided

◆ LPS_BUSY [4/4]

unsigned { ... } ::LPS_BUSY

No description provided

◆ LPS_ENA [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ENA

No description provided

◆ LPS_ENA [2/4]

unsigned { ... } ::LPS_ENA

No description provided

◆ LPS_ENA [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ENA

No description provided

◆ LPS_ENA [4/4]

unsigned { ... } ::LPS_ENA

No description provided

◆ LPS_OFF [1/4]

unsigned { ... } ::LPS_OFF

No description provided

◆ LPS_OFF [2/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_OFF

No description provided

◆ LPS_OFF [3/4]

unsigned { ... } ::LPS_OFF

No description provided

◆ LPS_OFF [4/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_OFF

No description provided

◆ LPS_ON [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ON

No description provided

◆ LPS_ON [2/4]

unsigned { ... } ::LPS_ON

No description provided

◆ LPS_ON [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ON

No description provided

◆ LPS_ON [4/4]

unsigned { ... } ::LPS_ON

No description provided

◆ LPS_ON_IGNORE [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_ON_IGNORE

No description provided

◆ LPS_ON_IGNORE [2/4]

unsigned { ... } ::LPS_ON_IGNORE

No description provided

◆ LPS_ON_IGNORE [3/4]

unsigned { ... } ::LPS_ON_IGNORE

No description provided

◆ LPS_ON_IGNORE [4/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_ON_IGNORE

No description provided

◆ LPS_PARITY_ERR [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PARITY_ERR

No description provided

◆ LPS_PARITY_ERR [2/4]

unsigned { ... } ::LPS_PARITY_ERR

No description provided

◆ LPS_PARITY_ERR [3/4]

unsigned { ... } ::LPS_PARITY_ERR

No description provided

◆ LPS_PARITY_ERR [4/4]

unsigned int _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PARITY_ERR

No description provided

◆ LPS_PORT0_MARGIN [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PORT0_MARGIN

No description provided

◆ LPS_PORT0_MARGIN [2/4]

unsigned { ... } ::LPS_PORT0_MARGIN

No description provided

◆ LPS_PORT0_MARGIN [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PORT0_MARGIN

No description provided

◆ LPS_PORT0_MARGIN [4/4]

unsigned { ... } ::LPS_PORT0_MARGIN

No description provided

◆ LPS_PORT1_MARGIN [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSMARGIN_s::LPS_PORT1_MARGIN

No description provided

◆ LPS_PORT1_MARGIN [2/4]

unsigned { ... } ::LPS_PORT1_MARGIN

No description provided

◆ LPS_PORT1_MARGIN [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSMARGIN_t::LPS_PORT1_MARGIN

No description provided

◆ LPS_PORT1_MARGIN [4/4]

unsigned { ... } ::LPS_PORT1_MARGIN

No description provided

◆ LPS_RAM_ADDR [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMADDR_s::LPS_RAM_ADDR

No description provided

◆ LPS_RAM_ADDR [2/4]

unsigned { ... } ::LPS_RAM_ADDR

No description provided

◆ LPS_RAM_ADDR [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMADDR_t::LPS_RAM_ADDR

No description provided

◆ LPS_RAM_ADDR [4/4]

unsigned { ... } ::LPS_RAM_ADDR

No description provided

◆ LPS_RAM_DATA [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMDATA_s::LPS_RAM_DATA

No description provided

◆ LPS_RAM_DATA [2/4]

unsigned { ... } ::LPS_RAM_DATA

No description provided

◆ LPS_RAM_DATA [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMDATA_t::LPS_RAM_DATA

No description provided

◆ LPS_RAM_DATA [4/4]

unsigned { ... } ::LPS_RAM_DATA

No description provided

◆ LPS_RAM_DATA_ALIAS [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_s::LPS_RAM_DATA_ALIAS

No description provided

◆ LPS_RAM_DATA_ALIAS [2/4]

unsigned { ... } ::LPS_RAM_DATA_ALIAS

No description provided

◆ LPS_RAM_DATA_ALIAS [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMDATA_ALIAS_t::LPS_RAM_DATA_ALIAS

No description provided

◆ LPS_RAM_DATA_ALIAS [4/4]

unsigned { ... } ::LPS_RAM_DATA_ALIAS

No description provided

◆ LPS_RAM_END [1/4]

unsigned { ... } ::LPS_RAM_END

No description provided

◆ LPS_RAM_END [2/4]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::LPS_RAM_END

No description provided

◆ LPS_RAM_END [3/4]

unsigned { ... } ::LPS_RAM_END

No description provided

◆ LPS_RAM_END [4/4]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::LPS_RAM_END

No description provided

◆ LPS_RAM_READ_EN [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::LPS_RAM_READ_EN

No description provided

◆ LPS_RAM_READ_EN [2/4]

unsigned { ... } ::LPS_RAM_READ_EN

No description provided

◆ LPS_RAM_READ_EN [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::LPS_RAM_READ_EN

No description provided

◆ LPS_RAM_READ_EN [4/4]

unsigned { ... } ::LPS_RAM_READ_EN

No description provided

◆ LPS_RAM_READ_RDY [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::LPS_RAM_READ_RDY

No description provided

◆ LPS_RAM_READ_RDY [2/4]

unsigned { ... } ::LPS_RAM_READ_RDY

No description provided

◆ LPS_RAM_READ_RDY [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::LPS_RAM_READ_RDY

No description provided

◆ LPS_RAM_READ_RDY [4/4]

unsigned { ... } ::LPS_RAM_READ_RDY

No description provided

◆ LPS_RAM_START [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_s::LPS_RAM_START

No description provided

◆ LPS_RAM_START [2/4]

unsigned { ... } ::LPS_RAM_START

No description provided

◆ LPS_RAM_START [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEGENADDR_t::LPS_RAM_START

No description provided

◆ LPS_RAM_START [4/4]

unsigned { ... } ::LPS_RAM_START

No description provided

◆ LPS_RPT_EN [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_RPT_EN

No description provided

◆ LPS_RPT_EN [2/4]

unsigned { ... } ::LPS_RPT_EN

No description provided

◆ LPS_RPT_EN [3/4]

unsigned { ... } ::LPS_RPT_EN

No description provided

◆ LPS_RPT_EN [4/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_RPT_EN

No description provided

◆ LPS_START_EN [1/4]

unsigned { ... } ::LPS_START_EN

No description provided

◆ LPS_START_EN [2/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::LPS_START_EN

No description provided

◆ LPS_START_EN [3/4]

unsigned { ... } ::LPS_START_EN

No description provided

◆ LPS_START_EN [4/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::LPS_START_EN

No description provided

◆ LPS_WAVE_FREQ [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::LPS_WAVE_FREQ

No description provided

◆ LPS_WAVE_FREQ [2/4]

unsigned { ... } ::LPS_WAVE_FREQ

No description provided

◆ LPS_WAVE_FREQ [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::LPS_WAVE_FREQ

No description provided

◆ LPS_WAVE_FREQ [4/4]

unsigned { ... } ::LPS_WAVE_FREQ

No description provided

◆ LPS_WG_ACC [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEGENACC_s::LPS_WG_ACC

No description provided

◆ LPS_WG_ACC [2/4]

unsigned { ... } ::LPS_WG_ACC

No description provided

◆ LPS_WG_ACC [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEGENACC_t::LPS_WG_ACC

No description provided

◆ LPS_WG_ACC [4/4]

unsigned { ... } ::LPS_WG_ACC

No description provided

◆ LPSDBGCOM [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGCOM

No description provided

◆ LPSDBGCOM [2/4]

unsigned { ... } ::LPSDBGCOM

No description provided

◆ LPSDBGCOM [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGCOM

No description provided

◆ LPSDBGCOM [4/4]

unsigned { ... } ::LPSDBGCOM

No description provided

◆ LPSDBGEN [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGEN

No description provided

◆ LPSDBGEN [2/4]

unsigned { ... } ::LPSDBGEN

No description provided

◆ LPSDBGEN [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGEN

No description provided

◆ LPSDBGEN [4/4]

unsigned { ... } ::LPSDBGEN

No description provided

◆ LPSDBGSEL [1/4]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_s::LPSDBGSEL

No description provided

◆ LPSDBGSEL [2/4]

unsigned { ... } ::LPSDBGSEL

No description provided

◆ LPSDBGSEL [3/4]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_t::LPSDBGSEL

No description provided

◆ LPSDBGSEL [4/4]

unsigned { ... } ::LPSDBGSEL

No description provided

◆ LS_LVDS_OE [1/2]

unsigned int _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDS_OE

No description provided

◆ LS_LVDS_OE [2/2]

unsigned { ... } ::LS_LVDS_OE

No description provided

◆ LS_LVDSTX_HZ [1/2]

unsigned int _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDSTX_HZ

No description provided

◆ LS_LVDSTX_HZ [2/2]

unsigned { ... } ::LS_LVDSTX_HZ

No description provided

◆ LS_LVDSTX_I2X [1/2]

unsigned int _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_I2X

No description provided

◆ LS_LVDSTX_I2X [2/2]

unsigned { ... } ::LS_LVDSTX_I2X

No description provided

◆ LS_LVDSTX_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_LSMOD_EN_t::LS_LVDSTX_PD

No description provided

◆ LS_LVDSTX_PD [2/2]

unsigned { ... } ::LS_LVDSTX_PD

No description provided

◆ LS_LVDSTX_TE [1/2]

unsigned int _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TE

No description provided

◆ LS_LVDSTX_TE [2/2]

unsigned { ... } ::LS_LVDSTX_TE

No description provided

◆ LS_LVDSTX_TEST [1/2]

unsigned int _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TEST

No description provided

◆ LS_LVDSTX_TEST [2/2]

unsigned { ... } ::LS_LVDSTX_TEST

No description provided

◆ LS_LVDSTX_TESTD [1/2]

unsigned int _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::LS_LVDSTX_TESTD

No description provided

◆ LS_LVDSTX_TESTD [2/2]

unsigned { ... } ::LS_LVDSTX_TESTD

No description provided

◆ LS_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE

No description provided

◆ LS_SPARE [2/2]

unsigned { ... } ::LS_SPARE

No description provided

◆ LS_SPARE2 [1/2]

unsigned { ... } ::LS_SPARE2

No description provided

◆ LS_SPARE2 [2/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE2

No description provided

◆ LS_SPARE3 [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LS_SPARE3

No description provided

◆ LS_SPARE3 [2/2]

unsigned { ... } ::LS_SPARE3

No description provided

◆ LSMOD_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::LSMOD_SPARE

No description provided

◆ LSMOD_SPARE [2/2]

unsigned { ... } ::LSMOD_SPARE

No description provided

◆ LSMODCTR_AUTORESTART [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_AUTORESTART

No description provided

◆ LSMODCTR_AUTORESTART [2/2]

unsigned { ... } ::LSMODCTR_AUTORESTART

No description provided

◆ LSMODCTR_ESH [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_ESH

No description provided

◆ LSMODCTR_ESH [2/2]

unsigned { ... } ::LSMODCTR_ESH

No description provided

◆ LSMODCTR_FLAG [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::LSMODCTR_FLAG

No description provided

◆ LSMODCTR_FLAG [2/2]

unsigned { ... } ::LSMODCTR_FLAG

No description provided

◆ LSMODCTR_FREEZE [1/2]

unsigned { ... } ::LSMODCTR_FREEZE

No description provided

◆ LSMODCTR_FREEZE [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_FREEZE

No description provided

◆ LSMODCTR_START [1/2]

unsigned { ... } ::LSMODCTR_START

No description provided

◆ LSMODCTR_START [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::LSMODCTR_START

No description provided

◆ LTOFFSET [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_LTOFFSET_t::LTOFFSET

No description provided

◆ LTOFFSET [2/2]

unsigned { ... } ::LTOFFSET

No description provided

◆ MANUAL_MODE_BIT [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::MANUAL_MODE_BIT

No description provided

◆ MANUAL_MODE_BIT [2/4]

unsigned { ... } ::MANUAL_MODE_BIT

No description provided

◆ MANUAL_MODE_BIT [3/4]

unsigned { ... } ::MANUAL_MODE_BIT

No description provided

◆ MANUAL_MODE_BIT [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::MANUAL_MODE_BIT

No description provided

◆ MAPRAM_MARGIN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::MAPRAM_MARGIN

WaveRAM Margin

◆ MAPRAM_MARGIN [2/2]

unsigned { ... } ::MAPRAM_MARGIN

WaveRAM Margin

◆ MAPRAM_PARITY_ERR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::MAPRAM_PARITY_ERR

Parity error in map RAM

◆ MAPRAM_PARITY_ERR [2/2]

unsigned { ... } ::MAPRAM_PARITY_ERR

Parity error in map RAM

◆ MARGIN [1/6]

unsigned int _ADI_DE_REGS_YODA_MEM_DFT_s::MARGIN

No description provided

◆ MARGIN [2/6]

unsigned { ... } ::MARGIN

No description provided

◆ MARGIN [3/6]

unsigned { ... } ::MARGIN

Set the margin level in the sense amplifiers

◆ MARGIN [4/6]

unsigned int _ADI_EFUSE_CHARACTERIZATION_t::MARGIN

Set the margin level in the sense amplifiers

◆ MARGIN [5/6]

unsigned int _ADI_DE_REGS_YODA_MEM_DFT_t::MARGIN

No description provided

◆ MARGIN [6/6]

unsigned { ... } ::MARGIN

No description provided

◆ MDD [1/2]

unsigned int _ADI_SPIM_REGS_MWCR_t::MDD

No description provided

◆ MDD [2/2]

unsigned { ... } ::MDD

No description provided

◆ METADATA_BYTES [1/4]

unsigned int _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::METADATA_BYTES

Number of bytes sent as Metadata

◆ METADATA_BYTES [2/4]

unsigned { ... } ::METADATA_BYTES

Number of bytes sent as Metadata

◆ METADATA_BYTES [3/4]

unsigned int _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::METADATA_BYTES

Number of bytes sent as Metadata. Valid values are 0 or 128

◆ METADATA_BYTES [4/4]

unsigned { ... } ::METADATA_BYTES

Number of bytes sent as Metadata. Valid values are 0 or 128

◆ MHS [1/2]

unsigned int _ADI_SPIM_REGS_MWCR_t::MHS

No description provided

◆ MHS [2/2]

unsigned { ... } ::MHS

No description provided

◆ MIPI_BUFF_MARGIN [1/4]

unsigned int _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::MIPI_BUFF_MARGIN

Read and write margin control. One bit for each MIPI buffer

◆ MIPI_BUFF_MARGIN [2/4]

unsigned { ... } ::MIPI_BUFF_MARGIN

Read and write margin control. One bit for each MIPI buffer

◆ MIPI_BUFF_MARGIN [3/4]

unsigned int _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::MIPI_BUFF_MARGIN

Read and write margin control for line memory. One bit for each MIPI buffer

◆ MIPI_BUFF_MARGIN [4/4]

unsigned { ... } ::MIPI_BUFF_MARGIN

Read and write margin control for line memory. One bit for each MIPI buffer

◆ MIPI_BUFF_PARITY_ERR_COUNT [1/4]

unsigned int _ADI_DATAPATH_MIPI_BUFF_PARITY_ERR_CNT_s::MIPI_BUFF_PARITY_ERR_COUNT

Count of parity errors indicated for every MIPI buffer read

◆ MIPI_BUFF_PARITY_ERR_COUNT [2/4]

unsigned { ... } ::MIPI_BUFF_PARITY_ERR_COUNT

Count of parity errors indicated for every MIPI buffer read

◆ MIPI_BUFF_PARITY_ERR_COUNT [3/4]

unsigned { ... } ::MIPI_BUFF_PARITY_ERR_COUNT

Indicates parity error count of MIPI buffer memories

◆ MIPI_BUFF_PARITY_ERR_COUNT [4/4]

unsigned int _ADI_DATAPATH_PARITY_COUNT_t::MIPI_BUFF_PARITY_ERR_COUNT

Indicates parity error count of MIPI buffer memories

◆ MIPI_BUFF_RD_CTRL_EN [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::MIPI_BUFF_RD_CTRL_EN

When 1, reading of MIPI buffers is based on mipi_buff_rd_limit, else done in datapath

◆ MIPI_BUFF_RD_CTRL_EN [2/4]

unsigned { ... } ::MIPI_BUFF_RD_CTRL_EN

When 1, reading of MIPI buffers is based on mipi_buff_rd_limit, else done in datapath

◆ MIPI_BUFF_RD_CTRL_EN [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::MIPI_BUFF_RD_CTRL_EN

When 1, reading of MIPI buffers is based on mipi_buff_rd_limit, else done in datapath.

◆ MIPI_BUFF_RD_CTRL_EN [4/4]

unsigned { ... } ::MIPI_BUFF_RD_CTRL_EN

When 1, reading of MIPI buffers is based on mipi_buff_rd_limit, else done in datapath.

◆ MIPI_BUFF_RD_LIMIT [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::MIPI_BUFF_RD_LIMIT

Number of buffers to be filled before sending packet request

◆ MIPI_BUFF_RD_LIMIT [2/4]

unsigned { ... } ::MIPI_BUFF_RD_LIMIT

Number of buffers to be filled before sending packet request

◆ MIPI_BUFF_RD_LIMIT [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::MIPI_BUFF_RD_LIMIT

Number of buffers to be filled before sending packet request. Refer to programming guide to program this register

◆ MIPI_BUFF_RD_LIMIT [4/4]

unsigned { ... } ::MIPI_BUFF_RD_LIMIT

Number of buffers to be filled before sending packet request. Refer to programming guide to program this register

◆ MIPI_BUFF_READ_ENABLE_COUNT_MAX [1/4]

unsigned int _ADI_DATAPATH_MIPI_RD_EN_MAX_s::MIPI_BUFF_READ_ENABLE_COUNT_MAX

Indicates the number of reads done per mipi buffer. This value will be equal to (number of pixels per dump written to the MIPI buffer)/4

◆ MIPI_BUFF_READ_ENABLE_COUNT_MAX [2/4]

unsigned { ... } ::MIPI_BUFF_READ_ENABLE_COUNT_MAX

Indicates the number of reads done per mipi buffer. This value will be equal to (number of pixels per dump written to the MIPI buffer)/4

◆ MIPI_BUFF_READ_ENABLE_COUNT_MAX [3/4]

unsigned int _ADI_DATAPATH_MIPI_RD_EN_MAX_t::MIPI_BUFF_READ_ENABLE_COUNT_MAX

Indicates the number of reads done per mipi buffer. This value will be equal to (number of pixels per dump written to the MIPI buffer)/4

◆ MIPI_BUFF_READ_ENABLE_COUNT_MAX [4/4]

unsigned { ... } ::MIPI_BUFF_READ_ENABLE_COUNT_MAX

Indicates the number of reads done per mipi buffer. This value will be equal to (number of pixels per dump written to the MIPI buffer)/4

◆ MIPI_BUFFER_PARITY_ERROR [1/2]

unsigned int _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::MIPI_BUFFER_PARITY_ERROR

parity error bits from MIPI buffer memory. 1 per line memory, memory not divided into banks. 4 memories of size 65WX128D

◆ MIPI_BUFFER_PARITY_ERROR [2/2]

unsigned { ... } ::MIPI_BUFFER_PARITY_ERROR

parity error bits from MIPI buffer memory. 1 per line memory, memory not divided into banks. 4 memories of size 65WX128D

◆ MIPI_CMD_ERR_INTR [1/2]

unsigned { ... } ::MIPI_CMD_ERR_INTR

Command error received from MIPI. Reset only if datapath is reset

◆ MIPI_CMD_ERR_INTR [2/2]

unsigned int _ADI_DATAPATH_INTERRUPT_t::MIPI_CMD_ERR_INTR

Command error received from MIPI. Reset only if datapath is reset

◆ MIPI_CSI_2_UNDERFLOW_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::MIPI_CSI_2_UNDERFLOW_ERROR

No description provided

◆ MIPI_CSI_2_UNDERFLOW_ERROR [2/2]

unsigned { ... } ::MIPI_CSI_2_UNDERFLOW_ERROR

No description provided

◆ MIPI_CSI_2T_UNDERFLOW_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::MIPI_CSI_2T_UNDERFLOW_ERREN

No description provided

◆ MIPI_CSI_2T_UNDERFLOW_ERREN [2/2]

unsigned { ... } ::MIPI_CSI_2T_UNDERFLOW_ERREN

No description provided

◆ MIPI_OUT_8BIT [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::MIPI_OUT_8BIT

1'b1 = Send RAW14 or RAW16 as two 8 bit RAW pixels to MIPI; when 1'b0 = Send the pixel data as 14 bit or 16 bit value

◆ MIPI_OUT_8BIT [2/4]

unsigned { ... } ::MIPI_OUT_8BIT

1'b1 = Send RAW14 or RAW16 as two 8 bit RAW pixels to MIPI; when 1'b0 = Send the pixel data as 14 bit or 16 bit value

◆ MIPI_OUT_8BIT [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::MIPI_OUT_8BIT

1'b1 = Send RAW14 or RAW16 as two 8 bit RAW pixels to MIPI; when 1'b0 = Send the pixel data as 14 bit or 16 bit value

◆ MIPI_OUT_8BIT [4/4]

unsigned { ... } ::MIPI_OUT_8BIT

1'b1 = Send RAW14 or RAW16 as two 8 bit RAW pixels to MIPI; when 1'b0 = Send the pixel data as 14 bit or 16 bit value

◆ MIPI_ULPS_END_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::MIPI_ULPS_END_SOURCE

No description provided

◆ MIPI_ULPS_END_SOURCE [2/2]

unsigned { ... } ::MIPI_ULPS_END_SOURCE

No description provided

◆ MM_ENABLE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::MM_ENABLE

No description provided

◆ MM_ENABLE [2/2]

unsigned { ... } ::MM_ENABLE

No description provided

◆ MM_IPMUX_SEL [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::MM_IPMUX_SEL

No description provided

◆ MM_IPMUX_SEL [2/2]

unsigned { ... } ::MM_IPMUX_SEL

No description provided

◆ MM_OUT_SEL [1/2]

unsigned { ... } ::MM_OUT_SEL

No description provided

◆ MM_OUT_SEL [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_MM_CTRL_t::MM_OUT_SEL

No description provided

◆ MOD_AMP [1/2]

unsigned { ... } ::MOD_AMP

No description provided

◆ MOD_AMP [2/2]

unsigned int _ADI_SS_REGS_SSMODAMP_t::MOD_AMP

No description provided

◆ MOD_FREQ [1/2]

unsigned { ... } ::MOD_FREQ

No description provided

◆ MOD_FREQ [2/2]

unsigned int _ADI_SS_REGS_SSMODFREQ_t::MOD_FREQ

No description provided

◆ MSTICR [1/2]

unsigned int _ADI_SPIM_REGS_MSTICR_t::MSTICR

No description provided

◆ MSTICR [2/2]

unsigned { ... } ::MSTICR

No description provided

◆ MSTIM [1/2]

unsigned int _ADI_SPIM_REGS_IMR_t::MSTIM

No description provided

◆ MSTIM [2/2]

unsigned { ... } ::MSTIM

No description provided

◆ MSTIR [1/2]

unsigned int _ADI_SPIM_REGS_RISR_t::MSTIR

No description provided

◆ MSTIR [2/2]

unsigned { ... } ::MSTIR

No description provided

◆ MSTIS [1/2]

unsigned int _ADI_SPIM_REGS_ISR_t::MSTIS

No description provided

◆ MSTIS [2/2]

unsigned { ... } ::MSTIS

No description provided

◆ MUXGRP_SEL [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::MUXGRP_SEL

No description provided

◆ MUXGRP_SEL [2/2]

unsigned { ... } ::MUXGRP_SEL

No description provided

◆ MWMOD [1/2]

unsigned { ... } ::MWMOD

No description provided

◆ MWMOD [2/2]

unsigned int _ADI_SPIM_REGS_MWCR_t::MWMOD

No description provided

◆ NCDS_MODE [1/2]

unsigned int _ADI_AI_REGS_YODA_READOUT_S1_t::NCDS_MODE

No description provided

◆ NCDS_MODE [2/2]

unsigned { ... } ::NCDS_MODE

No description provided

◆ NDF [1/2]

unsigned int _ADI_SPIM_REGS_CTRLR1_t::NDF

No description provided

◆ NDF [2/2]

unsigned { ... } ::NDF

No description provided

◆ NO_OF_ADC_CONVERT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::NO_OF_ADC_CONVERT

No description provided

◆ NO_OF_ADC_CONVERT [2/2]

unsigned { ... } ::NO_OF_ADC_CONVERT

No description provided

◆ NO_OF_POSEDGE_CLKCYCLE [1/2]

unsigned { ... } ::NO_OF_POSEDGE_CLKCYCLE

No description provided

◆ NO_OF_POSEDGE_CLKCYCLE [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::NO_OF_POSEDGE_CLKCYCLE

No description provided

◆ NOISE_RESET_FALL_CLK_CNT [1/2]

unsigned { ... } ::NOISE_RESET_FALL_CLK_CNT

No description provided

◆ NOISE_RESET_FALL_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::NOISE_RESET_FALL_CLK_CNT

No description provided

◆ NOISE_RESET_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::NOISE_RESET_FALL_CNVT_CNT

No description provided

◆ NOISE_RESET_FALL_CNVT_CNT [2/2]

unsigned { ... } ::NOISE_RESET_FALL_CNVT_CNT

No description provided

◆ NOISE_RESET_RISE_CLK_CNT [1/2]

unsigned { ... } ::NOISE_RESET_RISE_CLK_CNT

No description provided

◆ NOISE_RESET_RISE_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_NOISERESETCTRL1_t::NOISE_RESET_RISE_CLK_CNT

No description provided

◆ NOISE_RESET_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::NOISE_RESET_RISE_CNVT_CNT

No description provided

◆ NOISE_RESET_RISE_CNVT_CNT [2/2]

unsigned { ... } ::NOISE_RESET_RISE_CNVT_CNT

No description provided

◆ NOT_USED [1/2]

unsigned int _ADI_SPIM_REGS_CTRLR0_t::NOT_USED

No description provided

◆ NOT_USED [2/2]

unsigned { ... } ::NOT_USED

No description provided

◆ OSC_PERIOD_DIVCLK_DIVIDE [1/2]

unsigned int _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::OSC_PERIOD_DIVCLK_DIVIDE

No description provided

◆ OSC_PERIOD_DIVCLK_DIVIDE [2/2]

unsigned { ... } ::OSC_PERIOD_DIVCLK_DIVIDE

No description provided

◆ OSC_PERIOD_ENABLE [1/2]

unsigned int _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::OSC_PERIOD_ENABLE

No description provided

◆ OSC_PERIOD_ENABLE [2/2]

unsigned { ... } ::OSC_PERIOD_ENABLE

No description provided

◆ OUTPUT_WIDTH [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::OUTPUT_WIDTH

Bit width of final output to MIPI

◆ OUTPUT_WIDTH [2/4]

unsigned { ... } ::OUTPUT_WIDTH

Bit width of final output to MIPI

◆ OUTPUT_WIDTH [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::OUTPUT_WIDTH

Bit width of final output to MIPI

◆ OUTPUT_WIDTH [4/4]

unsigned { ... } ::OUTPUT_WIDTH

Bit width of final output to MIPI

◆ OVERFLOW_ACTIVE [1/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_s::OVERFLOW_ACTIVE

When 0, inactive and ignored for adc mux

◆ OVERFLOW_ACTIVE [2/4]

unsigned { ... } ::OVERFLOW_ACTIVE

When 0, inactive and ignored for adc mux

◆ OVERFLOW_ACTIVE [3/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_t::OVERFLOW_ACTIVE

When 0, inactive and ignored for adc mux

◆ OVERFLOW_ACTIVE [4/4]

unsigned { ... } ::OVERFLOW_ACTIVE

When 0, inactive and ignored for adc mux

◆ OVERIDE_CNTRL [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::OVERIDE_CNTRL

No description provided

◆ OVERIDE_CNTRL [2/4]

unsigned { ... } ::OVERIDE_CNTRL

No description provided

◆ OVERIDE_CNTRL [3/4]

unsigned { ... } ::OVERIDE_CNTRL

No description provided

◆ OVERIDE_CNTRL [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::OVERIDE_CNTRL

No description provided

◆ OVR_VAL [1/12]

unsigned { ... } ::OVR_VAL

No description provided

◆ OVR_VAL [2/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_s::OVR_VAL

No description provided

◆ OVR_VAL [3/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_s::OVR_VAL

No description provided

◆ OVR_VAL [4/12]

unsigned { ... } ::OVR_VAL

No description provided

◆ OVR_VAL [5/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_s::OVR_VAL

No description provided

◆ OVR_VAL [6/12]

unsigned { ... } ::OVR_VAL

No description provided

◆ OVR_VAL [7/12]

unsigned { ... } ::OVR_VAL

No description provided

◆ OVR_VAL [8/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG1_t::OVR_VAL

No description provided

◆ OVR_VAL [9/12]

unsigned { ... } ::OVR_VAL

No description provided

◆ OVR_VAL [10/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG2_t::OVR_VAL

No description provided

◆ OVR_VAL [11/12]

unsigned { ... } ::OVR_VAL

No description provided

◆ OVR_VAL [12/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_DATA_REG3_t::OVR_VAL

No description provided

◆ OVR_VAL_SEL [1/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_s::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [2/12]

unsigned { ... } ::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [3/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_s::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [4/12]

unsigned { ... } ::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [5/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_s::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [6/12]

unsigned { ... } ::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [7/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG1_t::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [8/12]

unsigned { ... } ::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [9/12]

unsigned { ... } ::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [10/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG2_t::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [11/12]

unsigned { ... } ::OVR_VAL_SEL

No description provided

◆ OVR_VAL_SEL [12/12]

unsigned int _ADI_DE_REGS_YODA_OVERRIDE_SEL_REG3_t::OVR_VAL_SEL

No description provided

◆ PACKET_COUNT [1/4]

unsigned { ... } ::PACKET_COUNT

Indicates the packet number being sent to MIPI.

◆ PACKET_COUNT [2/4]

unsigned int _ADI_DATAPATH_PACKET_COUNT_s::PACKET_COUNT

Indicates the packet number being sent to MIPI.

◆ PACKET_COUNT [3/4]

unsigned int _ADI_DATAPATH_PACKET_COUNT_t::PACKET_COUNT

Indicates the packet number being sent to MIPI. Will be continously updated when a packet is sent to MIPI

◆ PACKET_COUNT [4/4]

unsigned { ... } ::PACKET_COUNT

Indicates the packet number being sent to MIPI. Will be continously updated when a packet is sent to MIPI

◆ PARITY_ERR [1/4]

unsigned { ... } ::PARITY_ERR

No description provided

◆ PARITY_ERR [2/4]

unsigned int _ADI_DE_REGS_YODA_MEM_DFT_s::PARITY_ERR

No description provided

◆ PARITY_ERR [3/4]

unsigned int _ADI_DE_REGS_YODA_MEM_DFT_t::PARITY_ERR

No description provided

◆ PARITY_ERR [4/4]

unsigned { ... } ::PARITY_ERR

No description provided

◆ PC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PCCOND_t::PC

No description provided

◆ PC [2/2]

unsigned { ... } ::PC

No description provided

◆ PCM_CLK_COUNT [1/2]

unsigned int _ADI_PCM_REGS_YODA_PCMCTRL_1_t::PCM_CLK_COUNT

No description provided

◆ PCM_CLK_COUNT [2/2]

unsigned { ... } ::PCM_CLK_COUNT

No description provided

◆ PCM_ENABLE_ALL [1/2]

unsigned int _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_ENABLE_ALL

No description provided

◆ PCM_ENABLE_ALL [2/2]

unsigned { ... } ::PCM_ENABLE_ALL

No description provided

◆ PCM_OUT [1/2]

unsigned int _ADI_PCM_REGS_YODA_PCMOUT_t::PCM_OUT

No description provided

◆ PCM_OUT [2/2]

unsigned { ... } ::PCM_OUT

No description provided

◆ PCM_SELECT [1/2]

unsigned { ... } ::PCM_SELECT

No description provided

◆ PCM_SELECT [2/2]

unsigned int _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_SELECT

No description provided

◆ PCM_START [1/2]

unsigned int _ADI_PCM_REGS_YODA_PCMCTRL_0_t::PCM_START

No description provided

◆ PCM_START [2/2]

unsigned { ... } ::PCM_START

No description provided

◆ PD_CSI [1/2]

unsigned { ... } ::PD_CSI

No description provided

◆ PD_CSI [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_CSI

No description provided

◆ PD_DATAPATH [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_DATAPATH

No description provided

◆ PD_DATAPATH [2/2]

unsigned { ... } ::PD_DATAPATH

No description provided

◆ PD_DE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_DE

No description provided

◆ PD_DE [2/2]

unsigned { ... } ::PD_DE

No description provided

◆ PD_LPS1 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_LPS1

No description provided

◆ PD_LPS1 [2/2]

unsigned { ... } ::PD_LPS1

No description provided

◆ PD_LPS2 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_LPS2

No description provided

◆ PD_LPS2 [2/2]

unsigned { ... } ::PD_LPS2

No description provided

◆ PD_PCM [1/2]

unsigned { ... } ::PD_PCM

No description provided

◆ PD_PCM [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_PCM

No description provided

◆ PD_SPI_MASTER [1/2]

unsigned { ... } ::PD_SPI_MASTER

No description provided

◆ PD_SPI_MASTER [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_SPI_MASTER

No description provided

◆ PD_SS [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::PD_SS

No description provided

◆ PD_SS [2/2]

unsigned { ... } ::PD_SS

No description provided

◆ PGM_ERR_BIT_ADDR [1/2]

unsigned { ... } ::PGM_ERR_BIT_ADDR

Error location

◆ PGM_ERR_BIT_ADDR [2/2]

unsigned int _ADI_EFUSE_ERR_LOCATION_t::PGM_ERR_BIT_ADDR

Error location

◆ PGM_MODE [1/2]

unsigned int _ADI_EFUSE_CHARACTERIZATION_t::PGM_MODE

Program mode

◆ PGM_MODE [2/2]

unsigned { ... } ::PGM_MODE

Program mode

◆ PI_N_LSBS [1/2]

unsigned int _ADI_SS_REGS_SSPINLO_t::PI_N_LSBS

No description provided

◆ PI_N_LSBS [2/2]

unsigned { ... } ::PI_N_LSBS

No description provided

◆ PI_N_MSBS [1/2]

unsigned int _ADI_SS_REGS_SSPINHI_t::PI_N_MSBS

No description provided

◆ PI_N_MSBS [2/2]

unsigned { ... } ::PI_N_MSBS

No description provided

◆ PIX_RESET_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::PIX_RESET_FALL_CLK_CNT

No description provided

◆ PIX_RESET_FALL_CLK_CNT [2/2]

unsigned { ... } ::PIX_RESET_FALL_CLK_CNT

No description provided

◆ PIX_RESET_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::PIX_RESET_FALL_CNVT_CNT

No description provided

◆ PIX_RESET_FALL_CNVT_CNT [2/2]

unsigned { ... } ::PIX_RESET_FALL_CNVT_CNT

No description provided

◆ PIX_RESET_RISE_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXRESETCTRL1_t::PIX_RESET_RISE_CLK_CNT

No description provided

◆ PIX_RESET_RISE_CLK_CNT [2/2]

unsigned { ... } ::PIX_RESET_RISE_CLK_CNT

No description provided

◆ PIX_RESET_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::PIX_RESET_RISE_CNVT_CNT

No description provided

◆ PIX_RESET_RISE_CNVT_CNT [2/2]

unsigned { ... } ::PIX_RESET_RISE_CNVT_CNT

No description provided

◆ PIXEL_BIAS_CDN [1/2]

unsigned int _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_CDN

No description provided

◆ PIXEL_BIAS_CDN [2/2]

unsigned { ... } ::PIXEL_BIAS_CDN

No description provided

◆ PIXEL_BIAS_DIR [1/2]

unsigned int _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_DIR

No description provided

◆ PIXEL_BIAS_DIR [2/2]

unsigned { ... } ::PIXEL_BIAS_DIR

No description provided

◆ PIXEL_BIAS_PD_DEF [1/2]

unsigned int _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_PD_DEF

No description provided

◆ PIXEL_BIAS_PD_DEF [2/2]

unsigned { ... } ::PIXEL_BIAS_PD_DEF

No description provided

◆ PIXEL_BIAS_SDN [1/2]

unsigned int _ADI_AI_REGS_YODA_PIXEL_BIAS_t::PIXEL_BIAS_SDN

No description provided

◆ PIXEL_BIAS_SDN [2/2]

unsigned { ... } ::PIXEL_BIAS_SDN

No description provided

◆ PIXGAINTAG0_LATCH_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_EN

No description provided

◆ PIXGAINTAG0_LATCH_EN [2/2]

unsigned { ... } ::PIXGAINTAG0_LATCH_EN

No description provided

◆ PIXGAINTAG0_LATCH_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_FALL_CLK_CNT

No description provided

◆ PIXGAINTAG0_LATCH_FALL_CLK_CNT [2/2]

unsigned { ... } ::PIXGAINTAG0_LATCH_FALL_CLK_CNT

No description provided

◆ PIXGAINTAG0_LATCH_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_FALL_CNVT_CNT

No description provided

◆ PIXGAINTAG0_LATCH_FALL_CNVT_CNT [2/2]

unsigned { ... } ::PIXGAINTAG0_LATCH_FALL_CNVT_CNT

No description provided

◆ PIXGAINTAG0_LATCH_RISE_CLK_CNT [1/2]

unsigned { ... } ::PIXGAINTAG0_LATCH_RISE_CLK_CNT

No description provided

◆ PIXGAINTAG0_LATCH_RISE_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_RISE_CLK_CNT

No description provided

◆ PIXGAINTAG0_LATCH_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::PIXGAINTAG0_LATCH_RISE_CNVT_CNT

No description provided

◆ PIXGAINTAG0_LATCH_RISE_CNVT_CNT [2/2]

unsigned { ... } ::PIXGAINTAG0_LATCH_RISE_CNVT_CNT

No description provided

◆ PIXGAINTAG0_READOUT_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::PIXGAINTAG0_READOUT_CLK_CNT

No description provided

◆ PIXGAINTAG0_READOUT_CLK_CNT [2/2]

unsigned { ... } ::PIXGAINTAG0_READOUT_CLK_CNT

No description provided

◆ PIXGAINTAG0_READOUT_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::PIXGAINTAG0_READOUT_CNVT_CNT

No description provided

◆ PIXGAINTAG0_READOUT_CNVT_CNT [2/2]

unsigned { ... } ::PIXGAINTAG0_READOUT_CNVT_CNT

No description provided

◆ PIXGAINTAG1_LATCH_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_EN

No description provided

◆ PIXGAINTAG1_LATCH_EN [2/2]

unsigned { ... } ::PIXGAINTAG1_LATCH_EN

No description provided

◆ PIXGAINTAG1_LATCH_FALL_CLK_CNT [1/2]

unsigned { ... } ::PIXGAINTAG1_LATCH_FALL_CLK_CNT

No description provided

◆ PIXGAINTAG1_LATCH_FALL_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_FALL_CLK_CNT

No description provided

◆ PIXGAINTAG1_LATCH_FALL_CNVT_CNT [1/2]

unsigned { ... } ::PIXGAINTAG1_LATCH_FALL_CNVT_CNT

No description provided

◆ PIXGAINTAG1_LATCH_FALL_CNVT_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_FALL_CNVT_CNT

No description provided

◆ PIXGAINTAG1_LATCH_RISE_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_RISE_CLK_CNT

No description provided

◆ PIXGAINTAG1_LATCH_RISE_CLK_CNT [2/2]

unsigned { ... } ::PIXGAINTAG1_LATCH_RISE_CLK_CNT

No description provided

◆ PIXGAINTAG1_LATCH_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::PIXGAINTAG1_LATCH_RISE_CNVT_CNT

No description provided

◆ PIXGAINTAG1_LATCH_RISE_CNVT_CNT [2/2]

unsigned { ... } ::PIXGAINTAG1_LATCH_RISE_CNVT_CNT

No description provided

◆ PIXGAINTAG1_READOUT_CLK_CNT [1/2]

unsigned { ... } ::PIXGAINTAG1_READOUT_CLK_CNT

No description provided

◆ PIXGAINTAG1_READOUT_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::PIXGAINTAG1_READOUT_CLK_CNT

No description provided

◆ PIXGAINTAG1_READOUT_CNVT_CNT [1/2]

unsigned { ... } ::PIXGAINTAG1_READOUT_CNVT_CNT

No description provided

◆ PIXGAINTAG1_READOUT_CNVT_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::PIXGAINTAG1_READOUT_CNVT_CNT

No description provided

◆ PIXSATURATE_LATCH_EN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_EN

No description provided

◆ PIXSATURATE_LATCH_EN [2/2]

unsigned { ... } ::PIXSATURATE_LATCH_EN

No description provided

◆ PIXSATURATE_LATCH_FALL_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_FALL_CLK_CNT

No description provided

◆ PIXSATURATE_LATCH_FALL_CLK_CNT [2/2]

unsigned { ... } ::PIXSATURATE_LATCH_FALL_CLK_CNT

No description provided

◆ PIXSATURATE_LATCH_FALL_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_FALL_CNVT_CNT

No description provided

◆ PIXSATURATE_LATCH_FALL_CNVT_CNT [2/2]

unsigned { ... } ::PIXSATURATE_LATCH_FALL_CNVT_CNT

No description provided

◆ PIXSATURATE_LATCH_RISE_CLK_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_RISE_CLK_CNT

No description provided

◆ PIXSATURATE_LATCH_RISE_CLK_CNT [2/2]

unsigned { ... } ::PIXSATURATE_LATCH_RISE_CLK_CNT

No description provided

◆ PIXSATURATE_LATCH_RISE_CNVT_CNT [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::PIXSATURATE_LATCH_RISE_CNVT_CNT

No description provided

◆ PIXSATURATE_LATCH_RISE_CNVT_CNT [2/2]

unsigned { ... } ::PIXSATURATE_LATCH_RISE_CNVT_CNT

No description provided

◆ PIXSATURATE_READOUT_CLK_CNT [1/2]

unsigned { ... } ::PIXSATURATE_READOUT_CLK_CNT

No description provided

◆ PIXSATURATE_READOUT_CLK_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::PIXSATURATE_READOUT_CLK_CNT

No description provided

◆ PIXSATURATE_READOUT_CNVT_CNT [1/2]

unsigned { ... } ::PIXSATURATE_READOUT_CNVT_CNT

No description provided

◆ PIXSATURATE_READOUT_CNVT_CNT [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::PIXSATURATE_READOUT_CNVT_CNT

No description provided

◆ POL [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::POL

No description provided

◆ POL [2/2]

unsigned { ... } ::POL

No description provided

◆ POSTAMBLE_BIT [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::POSTAMBLE_BIT

No description provided

◆ POSTAMBLE_BIT [2/4]

unsigned { ... } ::POSTAMBLE_BIT

No description provided

◆ POSTAMBLE_BIT [3/4]

unsigned { ... } ::POSTAMBLE_BIT

No description provided

◆ POSTAMBLE_BIT [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::POSTAMBLE_BIT

No description provided

◆ POWER_CONTROL [1/2]

unsigned int _ADI_EFUSE_PWR_CTRL_t::POWER_CONTROL

Power Control

◆ POWER_CONTROL [2/2]

unsigned { ... } ::POWER_CONTROL

Power Control

◆ PREAMBLE_BIT [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::PREAMBLE_BIT

No description provided

◆ PREAMBLE_BIT [2/4]

unsigned { ... } ::PREAMBLE_BIT

No description provided

◆ PREAMBLE_BIT [3/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::PREAMBLE_BIT

No description provided

◆ PREAMBLE_BIT [4/4]

unsigned { ... } ::PREAMBLE_BIT

No description provided

◆ PSEUDO_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::PSEUDO_ERREN

No description provided

◆ PSEUDO_ERREN [2/2]

unsigned { ... } ::PSEUDO_ERREN

No description provided

◆ PSEUDO_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::PSEUDO_ERROR

No description provided

◆ PSEUDO_ERROR [2/2]

unsigned { ... } ::PSEUDO_ERROR

No description provided

◆ PUMP_ADJ [1/2]

unsigned int _ADI_AI_REGS_YODA_PUMP_S1_t::PUMP_ADJ

No description provided

◆ PUMP_ADJ [2/2]

unsigned { ... } ::PUMP_ADJ

No description provided

◆ PUMP_BYPASS [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_0_t::PUMP_BYPASS

No description provided

◆ PUMP_BYPASS [2/2]

unsigned { ... } ::PUMP_BYPASS

No description provided

◆ PUMP_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::PUMP_SPARE

No description provided

◆ PUMP_SPARE [2/2]

unsigned { ... } ::PUMP_SPARE

No description provided

◆ PWM_BUSY [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::PWM_BUSY

No description provided

◆ PWM_BUSY [2/2]

unsigned { ... } ::PWM_BUSY

No description provided

◆ PWM_PERIOD [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::PWM_PERIOD

No description provided

◆ PWM_PERIOD [2/2]

unsigned { ... } ::PWM_PERIOD

No description provided

◆ PWM_REPEAT_PER_STEP [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::PWM_REPEAT_PER_STEP

No description provided

◆ PWM_REPEAT_PER_STEP [2/2]

unsigned { ... } ::PWM_REPEAT_PER_STEP

No description provided

◆ PWM_STEP_SIZE [1/2]

unsigned { ... } ::PWM_STEP_SIZE

No description provided

◆ PWM_STEP_SIZE [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PWM_CTRL_0_t::PWM_STEP_SIZE

No description provided

◆ QPD [1/2]

unsigned int _ADI_AI_REGS_YODA_PUMP_S1_t::QPD

No description provided

◆ QPD [2/2]

unsigned { ... } ::QPD

No description provided

◆ RAM [1/4]

unsigned { ... } ::RAM

No description provided

◆ RAM [2/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_SELECT_s::RAM

No description provided

◆ RAM [3/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_SELECT_t::RAM

No description provided

◆ RAM [4/4]

unsigned { ... } ::RAM

No description provided

◆ RAM_ADDR [1/4]

unsigned { ... } ::RAM_ADDR

No description provided

◆ RAM_ADDR [2/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::RAM_ADDR

No description provided

◆ RAM_ADDR [3/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::RAM_ADDR

No description provided

◆ RAM_ADDR [4/4]

unsigned { ... } ::RAM_ADDR

No description provided

◆ RAM_RDDATA [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_s::RAM_RDDATA

No description provided

◆ RAM_RDDATA [2/4]

unsigned { ... } ::RAM_RDDATA

No description provided

◆ RAM_RDDATA [3/4]

unsigned { ... } ::RAM_RDDATA

No description provided

◆ RAM_RDDATA [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_t::RAM_RDDATA

No description provided

◆ RAM_RDDATA_ALIAS [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_s::RAM_RDDATA_ALIAS

No description provided

◆ RAM_RDDATA_ALIAS [2/4]

unsigned { ... } ::RAM_RDDATA_ALIAS

No description provided

◆ RAM_RDDATA_ALIAS [3/4]

unsigned { ... } ::RAM_RDDATA_ALIAS

No description provided

◆ RAM_RDDATA_ALIAS [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_RDDATA_REG_ALIAS_t::RAM_RDDATA_ALIAS

No description provided

◆ RAM_WRDATA [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_s::RAM_WRDATA

No description provided

◆ RAM_WRDATA [2/4]

unsigned { ... } ::RAM_WRDATA

No description provided

◆ RAM_WRDATA [3/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_t::RAM_WRDATA

No description provided

◆ RAM_WRDATA [4/4]

unsigned { ... } ::RAM_WRDATA

No description provided

◆ RAM_WRDATA_ALIAS [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_s::RAM_WRDATA_ALIAS

No description provided

◆ RAM_WRDATA_ALIAS [2/4]

unsigned { ... } ::RAM_WRDATA_ALIAS

No description provided

◆ RAM_WRDATA_ALIAS [3/4]

unsigned { ... } ::RAM_WRDATA_ALIAS

No description provided

◆ RAM_WRDATA_ALIAS [4/4]

unsigned int _ADI_DE_REGS_YODA_DE_IA_WRDATA_REG_ALIAS_t::RAM_WRDATA_ALIAS

No description provided

◆ RAW_MODE [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::RAW_MODE

Enable RAW mode and select how the ADC clipping is handled

◆ RAW_MODE [2/4]

unsigned { ... } ::RAW_MODE

Enable RAW mode and select how the ADC clipping is handled

◆ RAW_MODE [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::RAW_MODE

Enable RAW mode and select how the ADC clipping is handled

◆ RAW_MODE [4/4]

unsigned { ... } ::RAW_MODE

Enable RAW mode and select how the ADC clipping is handled

◆ RD_ADDR [1/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RD_ADDR

No description provided

◆ RD_ADDR [2/4]

unsigned { ... } ::RD_ADDR

No description provided

◆ RD_ADDR [3/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RD_ADDR

No description provided

◆ RD_ADDR [4/4]

unsigned { ... } ::RD_ADDR

No description provided

◆ RD_RAM_SEL [1/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RD_RAM_SEL

No description provided

◆ RD_RAM_SEL [2/4]

unsigned { ... } ::RD_RAM_SEL

No description provided

◆ RD_RAM_SEL [3/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RD_RAM_SEL

No description provided

◆ RD_RAM_SEL [4/4]

unsigned { ... } ::RD_RAM_SEL

No description provided

◆ READ [1/2]

unsigned { ... } ::READ

No description provided

◆ READ [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::READ

No description provided

◆ READOUT_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_READOUT_t::READOUT_PD

No description provided

◆ READOUT_PD [2/2]

unsigned { ... } ::READOUT_PD

No description provided

◆ REFCLKOFFSET [1/2]

unsigned { ... } ::REFCLKOFFSET

No description provided

◆ REFCLKOFFSET [2/2]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_OFFSET_t::REFCLKOFFSET

No description provided

◆ REFGEN_BGR_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::REFGEN_BGR_PD

No description provided

◆ REFGEN_BGR_PD [2/2]

unsigned { ... } ::REFGEN_BGR_PD

No description provided

◆ REG_0 [1/4]

unsigned int _ADI_DATAPATH_REG_0_s::REG_0

Reserved for MIPI header

◆ REG_0 [2/4]

unsigned { ... } ::REG_0

Reserved for MIPI header

◆ REG_0 [3/4]

unsigned int _ADI_DATAPATH_REG_0_t::REG_0

Reserved for MIPI header

◆ REG_0 [4/4]

unsigned { ... } ::REG_0

Reserved for MIPI header

◆ REG_1 [1/4]

unsigned int _ADI_DATAPATH_REG_1_s::REG_1

Reserved for MIPI header

◆ REG_1 [2/4]

unsigned { ... } ::REG_1

Reserved for MIPI header

◆ REG_1 [3/4]

unsigned int _ADI_DATAPATH_REG_1_t::REG_1

Reserved for MIPI header

◆ REG_1 [4/4]

unsigned { ... } ::REG_1

Reserved for MIPI header

◆ REG_2 [1/4]

unsigned { ... } ::REG_2

Reserved for MIPI header

◆ REG_2 [2/4]

unsigned int _ADI_DATAPATH_REG_2_s::REG_2

Reserved for MIPI header

◆ REG_2 [3/4]

unsigned { ... } ::REG_2

Reserved for MIPI header

◆ REG_2 [4/4]

unsigned int _ADI_DATAPATH_REG_2_t::REG_2

Reserved for MIPI header

◆ REG_3 [1/4]

unsigned int _ADI_DATAPATH_REG_3_s::REG_3

Reserved for MIPI header

◆ REG_3 [2/4]

unsigned { ... } ::REG_3

Reserved for MIPI header

◆ REG_3 [3/4]

unsigned int _ADI_DATAPATH_REG_3_t::REG_3

Reserved for MIPI header

◆ REG_3 [4/4]

unsigned { ... } ::REG_3

Reserved for MIPI header

◆ REG_4 [1/4]

unsigned int _ADI_DATAPATH_REG_4_s::REG_4

Reserved for MIPI header

◆ REG_4 [2/4]

unsigned { ... } ::REG_4

Reserved for MIPI header

◆ REG_4 [3/4]

unsigned int _ADI_DATAPATH_REG_4_t::REG_4

Reserved for MIPI header

◆ REG_4 [4/4]

unsigned { ... } ::REG_4

Reserved for MIPI header

◆ REG_5 [1/4]

unsigned int _ADI_DATAPATH_REG_5_s::REG_5

Reserved for MIPI header

◆ REG_5 [2/4]

unsigned { ... } ::REG_5

Reserved for MIPI header

◆ REG_5 [3/4]

unsigned int _ADI_DATAPATH_REG_5_t::REG_5

Reserved for MIPI header

◆ REG_5 [4/4]

unsigned { ... } ::REG_5

Reserved for MIPI header

◆ REG_6 [1/4]

unsigned { ... } ::REG_6

Reserved for MIPI header

◆ REG_6 [2/4]

unsigned int _ADI_DATAPATH_REG_6_s::REG_6

Reserved for MIPI header

◆ REG_6 [3/4]

unsigned int _ADI_DATAPATH_REG_6_t::REG_6

Reserved for MIPI header

◆ REG_6 [4/4]

unsigned { ... } ::REG_6

Reserved for MIPI header

◆ REG_7 [1/4]

unsigned int _ADI_DATAPATH_REG_7_s::REG_7

Reserved for MIPI header

◆ REG_7 [2/4]

unsigned { ... } ::REG_7

Reserved for MIPI header

◆ REG_7 [3/4]

unsigned int _ADI_DATAPATH_REG_7_t::REG_7

Reserved for MIPI header

◆ REG_7 [4/4]

unsigned { ... } ::REG_7

Reserved for MIPI header

◆ REG_WR_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::REG_WR_ERREN

No description provided

◆ REG_WR_ERREN [2/2]

unsigned { ... } ::REG_WR_ERREN

No description provided

◆ REG_WR_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::REG_WR_ERROR

No description provided

◆ REG_WR_ERROR [2/2]

unsigned { ... } ::REG_WR_ERROR

No description provided

◆ REGIF_BUSY1 [1/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_BUSY1

No description provided

◆ REGIF_BUSY1 [2/2]

unsigned { ... } ::REGIF_BUSY1

No description provided

◆ REGIF_BUSY2 [1/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_BUSY2

No description provided

◆ REGIF_BUSY2 [2/2]

unsigned { ... } ::REGIF_BUSY2

No description provided

◆ REGIF_RD_WRB [1/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RD_WRB

No description provided

◆ REGIF_RD_WRB [2/2]

unsigned { ... } ::REGIF_RD_WRB

No description provided

◆ REGIF_READ_DATA [1/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_RDATA_t::REGIF_READ_DATA

No description provided

◆ REGIF_READ_DATA [2/2]

unsigned { ... } ::REGIF_READ_DATA

No description provided

◆ REGIF_READ_SHIFT [1/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_READ_SHIFT

No description provided

◆ REGIF_READ_SHIFT [2/2]

unsigned { ... } ::REGIF_READ_SHIFT

No description provided

◆ REGIF_RESETB1 [1/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RESETB1

No description provided

◆ REGIF_RESETB1 [2/2]

unsigned { ... } ::REGIF_RESETB1

No description provided

◆ REGIF_RESETB2 [1/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_RESETB2

No description provided

◆ REGIF_RESETB2 [2/2]

unsigned { ... } ::REGIF_RESETB2

No description provided

◆ REGIF_START1 [1/2]

unsigned { ... } ::REGIF_START1

No description provided

◆ REGIF_START1 [2/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_START1

No description provided

◆ REGIF_START2 [1/2]

unsigned { ... } ::REGIF_START2

No description provided

◆ REGIF_START2 [2/2]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::REGIF_START2

No description provided

◆ REPEAT_COUNT [1/6]

unsigned { ... } ::REPEAT_COUNT

No description provided

◆ REPEAT_COUNT [2/6]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::REPEAT_COUNT

No description provided

◆ REPEAT_COUNT [3/6]

unsigned { ... } ::REPEAT_COUNT

No description provided

◆ REPEAT_COUNT [4/6]

unsigned int _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::REPEAT_COUNT

No description provided

◆ REPEAT_COUNT [5/6]

unsigned { ... } ::REPEAT_COUNT

No description provided

◆ REPEAT_COUNT [6/6]

unsigned int _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::REPEAT_COUNT

No description provided

◆ RESERVED [1/4]

unsigned { ... } ::RESERVED

No description provided

◆ RESERVED [2/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED

No description provided

◆ RESERVED [3/4]

unsigned { ... } ::RESERVED

No description provided

◆ RESERVED [4/4]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED

No description provided

◆ RESERVED0 [1/10]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::RESERVED0

Reserved

◆ RESERVED0 [2/10]

unsigned { ... } ::RESERVED0

Reserved

◆ RESERVED0 [3/10]

unsigned { ... } ::RESERVED0

Reserved

◆ RESERVED0 [4/10]

unsigned int _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::RESERVED0

Reserved

◆ RESERVED0 [5/10]

unsigned int _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::RESERVED0

Reserved

◆ RESERVED0 [6/10]

unsigned { ... } ::RESERVED0

Reserved

◆ RESERVED0 [7/10]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED0

Reserved

◆ RESERVED0 [8/10]

unsigned { ... } ::RESERVED0

Reserved

◆ RESERVED0 [9/10]

unsigned int _ADI_AI_REGS_YODA_DLL_CONTROL_t::RESERVED0

Reserved

◆ RESERVED0 [10/10]

unsigned { ... } ::RESERVED0

Reserved

◆ RESERVED1 [1/98]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED1

Reserved

◆ RESERVED1 [2/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [3/98]

unsigned int _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED1

Reserved

◆ RESERVED1 [4/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [5/98]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSET_t::RESERVED1

Reserved

◆ RESERVED1 [6/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [7/98]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED1

No description provided

◆ RESERVED1 [8/98]

unsigned { ... } ::RESERVED1

No description provided

◆ RESERVED1 [9/98]

unsigned int _ADI_USEQ_REGS_MAP1_CTIMECTRL_t::RESERVED1

Reserved

◆ RESERVED1 [10/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [11/98]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED1

Reserved

◆ RESERVED1 [12/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [13/98]

unsigned int _ADI_DATAPATH_PP_USEQ_WRITE_s::RESERVED1

Reserved

◆ RESERVED1 [14/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [15/98]

unsigned int _ADI_DATAPATH_IA_SELECT_s::RESERVED1

Reserved

◆ RESERVED1 [16/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [17/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [18/98]

unsigned int _ADI_DATAPATH_IA_BANK_TYPE_s::RESERVED1

Reserved

◆ RESERVED1 [19/98]

unsigned int _ADI_DE_REGS_YODA_MEM_DFT_s::RESERVED1

Reserved

◆ RESERVED1 [20/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [21/98]

unsigned int _ADI_AI_REGS_YODA_CLK_CTRL_t::RESERVED1

Reserved

◆ RESERVED1 [22/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [23/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [24/98]

unsigned int _ADI_DE_REGS_YODA_DE_IA_SELECT_s::RESERVED1

Reserved

◆ RESERVED1 [25/98]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::RESERVED1

Reserved

◆ RESERVED1 [26/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [27/98]

unsigned int _ADI_SPIM_REGS_SSIENR_t::RESERVED1

Reserved

◆ RESERVED1 [28/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [29/98]

unsigned int _ADI_SPIM_REGS_SER_t::RESERVED1

Reserved

◆ RESERVED1 [30/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [31/98]

unsigned int _ADI_SPIM_REGS_RXFTLR_t::RESERVED1

Reserved

◆ RESERVED1 [32/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [33/98]

unsigned int _ADI_SPIM_REGS_TXOICR_t::RESERVED1

Reserved

◆ RESERVED1 [34/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [35/98]

unsigned int _ADI_SPIM_REGS_RXOICR_t::RESERVED1

Reserved

◆ RESERVED1 [36/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [37/98]

unsigned int _ADI_SPIM_REGS_RXUICR_t::RESERVED1

Reserved

◆ RESERVED1 [38/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [39/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [40/98]

unsigned int _ADI_SPIM_REGS_MSTICR_t::RESERVED1

Reserved

◆ RESERVED1 [41/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [42/98]

unsigned int _ADI_SPIM_REGS_ICR_t::RESERVED1

Reserved

◆ RESERVED1 [43/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CONTINUOUS_HS_CLK_t::RESERVED1

Reserved

◆ RESERVED1 [44/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [45/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::RESERVED1

Reserved

◆ RESERVED1 [46/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [47/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::RESERVED1

Reserved

◆ RESERVED1 [48/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [49/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_STATUS_t::RESERVED1

Reserved

◆ RESERVED1 [50/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [51/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [52/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_IRQ_ENABLE_t::RESERVED1

Reserved

◆ RESERVED1 [53/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [54/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CSI2TX_IRQ_CLR_t::RESERVED1

Reserved

◆ RESERVED1 [55/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CLK_LANE_EN_t::RESERVED1

Reserved

◆ RESERVED1 [56/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [57/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_CPHY_EN_t::RESERVED1

Reserved

◆ RESERVED1 [58/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [59/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [60/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PPI_16_EN_t::RESERVED1

Reserved

◆ RESERVED1 [61/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [62/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_PACKET_INTERFACE_EN_t::RESERVED1

Reserved

◆ RESERVED1 [63/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [64/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_VCX_EN_t::RESERVED1

Reserved

◆ RESERVED1 [65/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PLL_CTRL_t::RESERVED1

Reserved

◆ RESERVED1 [66/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [67/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [68/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_ULPS_PHY_CTRL_t::RESERVED1

Reserved

◆ RESERVED1 [69/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [70/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_BYP_t::RESERVED1

Reserved

◆ RESERVED1 [71/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [72/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_BYPASS_PLL_t::RESERVED1

Reserved

◆ RESERVED1 [73/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [74/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_LATCH_t::RESERVED1

Reserved

◆ RESERVED1 [75/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [76/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_AUTO_PD_EN_t::RESERVED1

Reserved

◆ RESERVED1 [77/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [78/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_LOCK_t::RESERVED1

Reserved

◆ RESERVED1 [79/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [80/98]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_PREPARE_t::RESERVED1

Reserved

◆ RESERVED1 [81/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [82/98]

unsigned int _ADI_EFUSE_PWR_CTRL_t::RESERVED1

Reserved

◆ RESERVED1 [83/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [84/98]

unsigned int _ADI_EFUSE_CHARACTERIZATION_t::RESERVED1

Reserved

◆ RESERVED1 [85/98]

unsigned { ... } ::RESERVED1

No description provided

◆ RESERVED1 [86/98]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED1

No description provided

◆ RESERVED1 [87/98]

unsigned { ... } ::RESERVED1

No description provided

◆ RESERVED1 [88/98]

unsigned int _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::RESERVED1

No description provided

◆ RESERVED1 [89/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [90/98]

unsigned int _ADI_DATAPATH_PP_USEQ_WRITE_t::RESERVED1

Reserved

◆ RESERVED1 [91/98]

unsigned int _ADI_DATAPATH_IA_SELECT_t::RESERVED1

Reserved

◆ RESERVED1 [92/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [93/98]

unsigned int _ADI_DATAPATH_IA_BANK_TYPE_t::RESERVED1

Reserved

◆ RESERVED1 [94/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [95/98]

unsigned int _ADI_DE_REGS_YODA_MEM_DFT_t::RESERVED1

Reserved

◆ RESERVED1 [96/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED1 [97/98]

unsigned int _ADI_DE_REGS_YODA_DE_IA_SELECT_t::RESERVED1

Reserved

◆ RESERVED1 [98/98]

unsigned { ... } ::RESERVED1

Reserved

◆ RESERVED10 [1/118]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_s::RESERVED10

Reserved

◆ RESERVED10 [2/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [3/118]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED10

Reserved

◆ RESERVED10 [4/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [5/118]

unsigned int _ADI_DATAPATH_ROI_ROW_START_s::RESERVED10

Reserved

◆ RESERVED10 [6/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [7/118]

unsigned int _ADI_DATAPATH_ROI_HEIGHT_s::RESERVED10

Reserved

◆ RESERVED10 [8/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [9/118]

unsigned int _ADI_DATAPATH_ROI_WIDTH_s::RESERVED10

Reserved

◆ RESERVED10 [10/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [11/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [12/118]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::RESERVED10

Reserved

◆ RESERVED10 [13/118]

unsigned int _ADI_DATAPATH_PACKET_COUNT_s::RESERVED10

Reserved

◆ RESERVED10 [14/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [15/118]

unsigned int _ADI_DATAPATH_PACKETS_PER_FRAME_s::RESERVED10

Reserved

◆ RESERVED10 [16/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [17/118]

unsigned int _ADI_DATAPATH_ROW_VECTOR_s::RESERVED10

Reserved

◆ RESERVED10 [18/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [19/118]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_s::RESERVED10

Reserved

◆ RESERVED10 [20/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [21/118]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_s::RESERVED10

Reserved

◆ RESERVED10 [22/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [23/118]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_s::RESERVED10

Reserved

◆ RESERVED10 [24/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [25/118]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_s::RESERVED10

Reserved

◆ RESERVED10 [26/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [27/118]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_s::RESERVED10

Reserved

◆ RESERVED10 [28/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [29/118]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_s::RESERVED10

Reserved

◆ RESERVED10 [30/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [31/118]

unsigned int _ADI_DE_REGS_YODA_BINNED_START_s::RESERVED10

Reserved

◆ RESERVED10 [32/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [33/118]

unsigned int _ADI_DE_REGS_YODA_BINNED_END_s::RESERVED10

Reserved

◆ RESERVED10 [34/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [35/118]

unsigned int _ADI_DE_REGS_YODA_DARK_START_s::RESERVED10

Reserved

◆ RESERVED10 [36/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [37/118]

unsigned int _ADI_DE_REGS_YODA_DARK_END_s::RESERVED10

Reserved

◆ RESERVED10 [38/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [39/118]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_START_s::RESERVED10

Reserved

◆ RESERVED10 [40/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [41/118]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_END_s::RESERVED10

Reserved

◆ RESERVED10 [42/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [43/118]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL2_S1_t::RESERVED10

Reserved

◆ RESERVED10 [44/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [45/118]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_START_s::RESERVED10

Reserved

◆ RESERVED10 [46/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [47/118]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_END_s::RESERVED10

Reserved

◆ RESERVED10 [48/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [49/118]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED10

Reserved

◆ RESERVED10 [50/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [51/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [52/118]

unsigned int _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_s::RESERVED10

Reserved

◆ RESERVED10 [53/118]

unsigned int _ADI_EFUSE_CHARACTERIZATION_t::RESERVED10

Reserved

◆ RESERVED10 [54/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [55/118]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_t::RESERVED10

Reserved

◆ RESERVED10 [56/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [57/118]

unsigned int _ADI_SS_REGS_SSWAVEPERIOD_t::RESERVED10

Reserved

◆ RESERVED10 [58/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [59/118]

unsigned int _ADI_SS_REGS_SSMODFREQ_t::RESERVED10

Reserved

◆ RESERVED10 [60/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [61/118]

unsigned int _ADI_SS_REGS_SSINTERV_11_t::RESERVED10

Reserved

◆ RESERVED10 [62/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [63/118]

unsigned int _ADI_SS_REGS_SSINTERV_21_t::RESERVED10

Reserved

◆ RESERVED10 [64/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [65/118]

unsigned int _ADI_SS_REGS_SSINTERV_31_t::RESERVED10

Reserved

◆ RESERVED10 [66/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [67/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [68/118]

unsigned int _ADI_SS_REGS_SSVALUE_01_t::RESERVED10

Reserved

◆ RESERVED10 [69/118]

unsigned int _ADI_SS_REGS_SSVALUE_11_t::RESERVED10

Reserved

◆ RESERVED10 [70/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [71/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [72/118]

unsigned int _ADI_SS_REGS_SSVALUE_21_t::RESERVED10

Reserved

◆ RESERVED10 [73/118]

unsigned int _ADI_SS_REGS_SSVALUE_31_t::RESERVED10

Reserved

◆ RESERVED10 [74/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [75/118]

unsigned int _ADI_SS_REGS_SSDBG_t::RESERVED10

Reserved

◆ RESERVED10 [76/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [77/118]

unsigned int _ADI_DATAPATH_ROI_ROW_START_t::RESERVED10

Reserved

◆ RESERVED10 [78/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [79/118]

unsigned int _ADI_DATAPATH_ROI_HEIGHT_t::RESERVED10

Reserved

◆ RESERVED10 [80/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [81/118]

unsigned int _ADI_DATAPATH_ROI_WIDTH_t::RESERVED10

Reserved

◆ RESERVED10 [82/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [83/118]

unsigned int _ADI_DATAPATH_PACKET_COUNT_t::RESERVED10

Reserved

◆ RESERVED10 [84/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [85/118]

unsigned int _ADI_DATAPATH_PACKETS_PER_FRAME_t::RESERVED10

Reserved

◆ RESERVED10 [86/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [87/118]

unsigned int _ADI_DATAPATH_ROW_VECTOR_t::RESERVED10

Reserved

◆ RESERVED10 [88/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [89/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [90/118]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_START_t::RESERVED10

Reserved

◆ RESERVED10 [91/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [92/118]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_END_t::RESERVED10

Reserved

◆ RESERVED10 [93/118]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_START_t::RESERVED10

Reserved

◆ RESERVED10 [94/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [95/118]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_END_t::RESERVED10

Reserved

◆ RESERVED10 [96/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [97/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [98/118]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_START_t::RESERVED10

Reserved

◆ RESERVED10 [99/118]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_END_t::RESERVED10

Reserved

◆ RESERVED10 [100/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [101/118]

unsigned int _ADI_DE_REGS_YODA_BINNED_START_t::RESERVED10

Reserved

◆ RESERVED10 [102/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [103/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [104/118]

unsigned int _ADI_DE_REGS_YODA_BINNED_END_t::RESERVED10

Reserved

◆ RESERVED10 [105/118]

unsigned int _ADI_DE_REGS_YODA_DARK_START_t::RESERVED10

Reserved

◆ RESERVED10 [106/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [107/118]

unsigned int _ADI_DE_REGS_YODA_DARK_END_t::RESERVED10

Reserved

◆ RESERVED10 [108/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [109/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [110/118]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_START_t::RESERVED10

Reserved

◆ RESERVED10 [111/118]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_END_t::RESERVED10

Reserved

◆ RESERVED10 [112/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [113/118]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_START_t::RESERVED10

Reserved

◆ RESERVED10 [114/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [115/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED10 [116/118]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_END_t::RESERVED10

Reserved

◆ RESERVED10 [117/118]

unsigned int _ADI_DE_REGS_YODA_DE_IA_ADDR_REG_t::RESERVED10

Reserved

◆ RESERVED10 [118/118]

unsigned { ... } ::RESERVED10

Reserved

◆ RESERVED11 [1/12]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::RESERVED11

Reserved

◆ RESERVED11 [2/12]

unsigned { ... } ::RESERVED11

Reserved

◆ RESERVED11 [3/12]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED11

Reserved

◆ RESERVED11 [4/12]

unsigned { ... } ::RESERVED11

Reserved

◆ RESERVED11 [5/12]

unsigned { ... } ::RESERVED11

Reserved

◆ RESERVED11 [6/12]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED11

Reserved

◆ RESERVED11 [7/12]

unsigned { ... } ::RESERVED11

Reserved

◆ RESERVED11 [8/12]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_BURST_PERIOD_t::RESERVED11

Reserved

◆ RESERVED11 [9/12]

unsigned int _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::RESERVED11

Reserved

◆ RESERVED11 [10/12]

unsigned { ... } ::RESERVED11

Reserved

◆ RESERVED11 [11/12]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::RESERVED11

Reserved

◆ RESERVED11 [12/12]

unsigned { ... } ::RESERVED11

Reserved

◆ RESERVED12 [1/30]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::RESERVED12

Reserved

◆ RESERVED12 [2/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [3/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [4/30]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::RESERVED12

Reserved

◆ RESERVED12 [5/30]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::RESERVED12

Reserved

◆ RESERVED12 [6/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [7/30]

unsigned int _ADI_USEQ_REGS_MAP1_CALLRPTCOUNT_t::RESERVED12

Reserved

◆ RESERVED12 [8/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [9/30]

unsigned int _ADI_USEQ_REGS_MAP1_PCCOND_t::RESERVED12

Reserved

◆ RESERVED12 [10/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [11/30]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLKCTRL_t::RESERVED12

Reserved

◆ RESERVED12 [12/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [13/30]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK2CTRL_t::RESERVED12

Reserved

◆ RESERVED12 [14/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [15/30]

unsigned int _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::RESERVED12

Reserved

◆ RESERVED12 [16/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [17/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [18/30]

unsigned int _ADI_DATAPATH_IA_ADDR_REG_s::RESERVED12

Reserved

◆ RESERVED12 [19/30]

unsigned int _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::RESERVED12

Reserved

◆ RESERVED12 [20/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [21/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [22/30]

unsigned int _ADI_AI_REGS_YODA_CLKTREE_S1_t::RESERVED12

Reserved

◆ RESERVED12 [23/30]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED12

Reserved

◆ RESERVED12 [24/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [25/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [26/30]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED12

Reserved

◆ RESERVED12 [27/30]

unsigned int _ADI_EFUSE_ERR_LOCATION_t::RESERVED12

Reserved

◆ RESERVED12 [28/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED12 [29/30]

unsigned int _ADI_DATAPATH_IA_ADDR_REG_t::RESERVED12

Reserved

◆ RESERVED12 [30/30]

unsigned { ... } ::RESERVED12

Reserved

◆ RESERVED13 [1/36]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1LATCHCTRL_t::RESERVED13

Reserved

◆ RESERVED13 [2/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [3/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [4/36]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATELATCHCTRL_t::RESERVED13

Reserved

◆ RESERVED13 [5/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [6/36]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0LATCHCTRL_t::RESERVED13

Reserved

◆ RESERVED13 [7/36]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_s::RESERVED13

Reserved

◆ RESERVED13 [8/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [9/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [10/36]

unsigned int _ADI_DATAPATH_GAIN0_s::RESERVED13

Reserved

◆ RESERVED13 [11/36]

unsigned int _ADI_DATAPATH_GAIN1_s::RESERVED13

Reserved

◆ RESERVED13 [12/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [13/36]

unsigned int _ADI_DATAPATH_GAIN2_s::RESERVED13

Reserved

◆ RESERVED13 [14/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [15/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [16/36]

unsigned int _ADI_DATAPATH_GAIN3_s::RESERVED13

Reserved

◆ RESERVED13 [17/36]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_s::RESERVED13

Reserved

◆ RESERVED13 [18/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [19/36]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL1_t::RESERVED13

Reserved

◆ RESERVED13 [20/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [21/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [22/36]

unsigned int _ADI_AI_REGS_YODA_TS_DATA_t::RESERVED13

Reserved

◆ RESERVED13 [23/36]

unsigned int _ADI_EFUSE_CHARACTERIZATION_t::RESERVED13

Reserved

◆ RESERVED13 [24/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [25/36]

unsigned int _ADI_DATAPATH_USE_CASE_FRAME_CONFIG_t::RESERVED13

Reserved

◆ RESERVED13 [26/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [27/36]

unsigned int _ADI_DATAPATH_GAIN0_t::RESERVED13

Reserved

◆ RESERVED13 [28/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [29/36]

unsigned int _ADI_DATAPATH_GAIN1_t::RESERVED13

Reserved

◆ RESERVED13 [30/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [31/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [32/36]

unsigned int _ADI_DATAPATH_GAIN2_t::RESERVED13

Reserved

◆ RESERVED13 [33/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED13 [34/36]

unsigned int _ADI_DATAPATH_GAIN3_t::RESERVED13

Reserved

◆ RESERVED13 [35/36]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_t::RESERVED13

Reserved

◆ RESERVED13 [36/36]

unsigned { ... } ::RESERVED13

Reserved

◆ RESERVED14 [1/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [2/30]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL_t::RESERVED14

Reserved

◆ RESERVED14 [3/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [4/30]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_s::RESERVED14

Reserved

◆ RESERVED14 [5/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [6/30]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_s::RESERVED14

Reserved

◆ RESERVED14 [7/30]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::RESERVED14

Reserved

◆ RESERVED14 [8/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [9/30]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMLOADADDR_t::RESERVED14

Reserved

◆ RESERVED14 [10/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [11/30]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDSTADDR_t::RESERVED14

Reserved

◆ RESERVED14 [12/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [13/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [14/30]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED14

Reserved

◆ RESERVED14 [15/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [16/30]

unsigned int _ADI_AI_REGS_YODA_CKGEN_S1_t::RESERVED14

Reserved

◆ RESERVED14 [17/30]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL2_t::RESERVED14

Reserved

◆ RESERVED14 [18/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [19/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [20/30]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::RESERVED14

Reserved

◆ RESERVED14 [21/30]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::RESERVED14

Reserved

◆ RESERVED14 [22/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [23/30]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::RESERVED14

Reserved

◆ RESERVED14 [24/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [25/30]

unsigned int _ADI_AI_REGS_YODA_PUMP_S1_t::RESERVED14

Reserved

◆ RESERVED14 [26/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [27/30]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::RESERVED14

Reserved

◆ RESERVED14 [28/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [29/30]

unsigned { ... } ::RESERVED14

Reserved

◆ RESERVED14 [30/30]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::RESERVED14

Reserved

◆ RESERVED15 [1/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [2/32]

unsigned int _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::RESERVED15

Reserved

◆ RESERVED15 [3/32]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED15

Reserved

◆ RESERVED15 [4/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [5/32]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED15

Reserved

◆ RESERVED15 [6/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [7/32]

unsigned int _ADI_DATAPATH_PP_LFSR_s::RESERVED15

Reserved

◆ RESERVED15 [8/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [9/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [10/32]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_s::RESERVED15

Reserved

◆ RESERVED15 [11/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [12/32]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL0_S1_t::RESERVED15

Reserved

◆ RESERVED15 [13/32]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED15

Reserved

◆ RESERVED15 [14/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [15/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [16/32]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_1_t::RESERVED15

Reserved

◆ RESERVED15 [17/32]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::RESERVED15

Reserved

◆ RESERVED15 [18/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [19/32]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::RESERVED15

Reserved

◆ RESERVED15 [20/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [21/32]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::RESERVED15

Reserved

◆ RESERVED15 [22/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [23/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [24/32]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::RESERVED15

Reserved

◆ RESERVED15 [25/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [26/32]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::RESERVED15

Reserved

◆ RESERVED15 [27/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [28/32]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::RESERVED15

Reserved

◆ RESERVED15 [29/32]

unsigned int _ADI_DATAPATH_PP_LFSR_t::RESERVED15

Reserved

◆ RESERVED15 [30/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED15 [31/32]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_t::RESERVED15

Reserved

◆ RESERVED15 [32/32]

unsigned { ... } ::RESERVED15

Reserved

◆ RESERVED2 [1/90]

unsigned int _ADI_USEQ_REGS_MAP1_GTSWAP_t::RESERVED2

Reserved

◆ RESERVED2 [2/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [3/90]

unsigned int _ADI_USEQ_REGS_MAP1_PIXELINTERFACECTRL_t::RESERVED2

Reserved

◆ RESERVED2 [4/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [5/90]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMRDCMD_s::RESERVED2

Reserved

◆ RESERVED2 [6/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [7/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [8/90]

unsigned int _ADI_LPS_REGS_YODA_LPSMARGIN_s::RESERVED2

Reserved

◆ RESERVED2 [9/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [10/90]

unsigned int _ADI_DATAPATH_PARITY_LINE_MEM_s::RESERVED2

Reserved

◆ RESERVED2 [11/90]

unsigned int _ADI_DATAPATH_LINE_MARGIN_CONTROL_s::RESERVED2

Reserved

◆ RESERVED2 [12/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [13/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [14/90]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::RESERVED2

Reserved

◆ RESERVED2 [15/90]

unsigned int _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::RESERVED2

Reserved

◆ RESERVED2 [16/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [17/90]

unsigned int _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::RESERVED2

Reserved

◆ RESERVED2 [18/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [19/90]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::RESERVED2

Reserved

◆ RESERVED2 [20/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [21/90]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::RESERVED2

Reserved

◆ RESERVED2 [22/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [23/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [24/90]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHSEL_t::RESERVED2

Reserved

◆ RESERVED2 [25/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [26/90]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::RESERVED2

Reserved

◆ RESERVED2 [27/90]

unsigned int _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::RESERVED2

Reserved

◆ RESERVED2 [28/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [29/90]

unsigned int _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::RESERVED2

Reserved

◆ RESERVED2 [30/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [31/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [32/90]

unsigned int _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_s::RESERVED2

Reserved

◆ RESERVED2 [33/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [34/90]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED2

Reserved

◆ RESERVED2 [35/90]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_s::RESERVED2

Reserved

◆ RESERVED2 [36/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [37/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [38/90]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_s::RESERVED2

Reserved

◆ RESERVED2 [39/90]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_s::RESERVED2

Reserved

◆ RESERVED2 [40/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [41/90]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::RESERVED2

Reserved

◆ RESERVED2 [42/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [43/90]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED2

Reserved

◆ RESERVED2 [44/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [45/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [46/90]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED2

Reserved

◆ RESERVED2 [47/90]

unsigned int _ADI_AI_REGS_YODA_PUMP_S1_t::RESERVED2

Reserved

◆ RESERVED2 [48/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [49/90]

unsigned int _ADI_AI_REGS_YODA_READOUT_S1_t::RESERVED2

Reserved

◆ RESERVED2 [50/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [51/90]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED2

Reserved

◆ RESERVED2 [52/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [53/90]

unsigned int _ADI_AI_REGS_YODA_VLOWSHODETECT_t::RESERVED2

Reserved

◆ RESERVED2 [54/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [55/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [56/90]

unsigned int _ADI_SPIM_REGS_TXFTLR_t::RESERVED2

Reserved

◆ RESERVED2 [57/90]

unsigned int _ADI_SPIM_REGS_RXFLR_t::RESERVED2

Reserved

◆ RESERVED2 [58/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [59/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [60/90]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::RESERVED2

Reserved

◆ RESERVED2 [61/90]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::RESERVED2

Reserved

◆ RESERVED2 [62/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [63/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [64/90]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_DATA_LANE_EN_t::RESERVED2

Reserved

◆ RESERVED2 [65/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [66/90]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_PD_PLL_PHY_t::RESERVED2

Reserved

◆ RESERVED2 [67/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [68/90]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_PREPARE_t::RESERVED2

Reserved

◆ RESERVED2 [69/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [70/90]

unsigned int _ADI_EFUSE_STATUS_t::RESERVED2

Reserved

◆ RESERVED2 [71/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [72/90]

unsigned int _ADI_EFUSE_BLANK_CHECK_t::RESERVED2

Reserved

◆ RESERVED2 [73/90]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMRDCMD_t::RESERVED2

Reserved

◆ RESERVED2 [74/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [75/90]

unsigned int _ADI_LPS_REGS_YODA_LPSMARGIN_t::RESERVED2

Reserved

◆ RESERVED2 [76/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [77/90]

unsigned int _ADI_SS_REGS_SSDBG_t::RESERVED2

Reserved

◆ RESERVED2 [78/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [79/90]

unsigned int _ADI_DATAPATH_LINE_MARGIN_CONTROL_t::RESERVED2

Reserved

◆ RESERVED2 [80/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [81/90]

unsigned int _ADI_DATAPATH_MIPI_SKEW_CAL_t::RESERVED2

Reserved

◆ RESERVED2 [82/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [83/90]

unsigned int _ADI_DE_REGS_YODA_ARRAY_INIT_VEC_DARK_t::RESERVED2

Reserved

◆ RESERVED2 [84/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [85/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [86/90]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROW_VEC_TOPBOT_t::RESERVED2

Reserved

◆ RESERVED2 [87/90]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROW_VEC_TOPBOT_t::RESERVED2

Reserved

◆ RESERVED2 [88/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [89/90]

unsigned { ... } ::RESERVED2

Reserved

◆ RESERVED2 [90/90]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROW_VEC_TOPBOT_t::RESERVED2

Reserved

◆ RESERVED3 [1/44]

unsigned int _ADI_USEQ_REGS_MAP1_I2CCTRL_t::RESERVED3

Reserved

◆ RESERVED3 [2/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [3/44]

unsigned int _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED3

Reserved

◆ RESERVED3 [4/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [5/44]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_s::RESERVED3

Reserved

◆ RESERVED3 [6/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [7/44]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED3

Reserved

◆ RESERVED3 [8/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [9/44]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::RESERVED3

Reserved

◆ RESERVED3 [10/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [11/44]

unsigned int _ADI_USEQ_REGS_MAP1_HSP_DFT_t::RESERVED3

Reserved

◆ RESERVED3 [12/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [13/44]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_s::RESERVED3

Reserved

◆ RESERVED3 [14/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [15/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [16/44]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DBGMUX_t::RESERVED3

Reserved

◆ RESERVED3 [17/44]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::RESERVED3

Reserved

◆ RESERVED3 [18/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [19/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [20/44]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::RESERVED3

Reserved

◆ RESERVED3 [21/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [22/44]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL1_S1_t::RESERVED3

Reserved

◆ RESERVED3 [23/44]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_0_t::RESERVED3

Reserved

◆ RESERVED3 [24/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [25/44]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_t::RESERVED3

Reserved

◆ RESERVED3 [26/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [27/44]

unsigned int _ADI_AI_REGS_YODA_VLOWENABLE_t::RESERVED3

Reserved

◆ RESERVED3 [28/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [29/44]

unsigned int _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::RESERVED3

Reserved

◆ RESERVED3 [30/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [31/44]

unsigned int _ADI_SPIM_REGS_MWCR_t::RESERVED3

Reserved

◆ RESERVED3 [32/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [33/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [34/44]

unsigned int _ADI_SPIM_REGS_TXFLR_t::RESERVED3

Reserved

◆ RESERVED3 [35/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [36/44]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CO_t::RESERVED3

Reserved

◆ RESERVED3 [37/44]

unsigned int _ADI_LPS_REGS_YODA_LPSDBG_t::RESERVED3

Reserved

◆ RESERVED3 [38/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [39/44]

unsigned int _ADI_SS_REGS_SSCTRL_t::RESERVED3

Reserved

◆ RESERVED3 [40/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [41/44]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_t::RESERVED3

Reserved

◆ RESERVED3 [42/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [43/44]

unsigned { ... } ::RESERVED3

Reserved

◆ RESERVED3 [44/44]

unsigned int _ADI_DATAPATH_INTERRUPT_t::RESERVED3

Reserved

◆ RESERVED4 [1/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [2/42]

unsigned int _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_s::RESERVED4

Reserved

◆ RESERVED4 [3/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [4/42]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_CHIP_DBGMUX_t::RESERVED4

Reserved

◆ RESERVED4 [5/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [6/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [7/42]

unsigned int _ADI_USEQ_REGS_MAP1_MM_CTRL_t::RESERVED4

Reserved

◆ RESERVED4 [8/42]

unsigned int _ADI_DATAPATH_PARITY_MIPI_BUFFER_s::RESERVED4

Reserved

◆ RESERVED4 [9/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [10/42]

unsigned int _ADI_DATAPATH_ANALOG_SS_s::RESERVED4

Reserved

◆ RESERVED4 [11/42]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::RESERVED4

Reserved

◆ RESERVED4 [12/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [13/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [14/42]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCLSMODCNTR_1_t::RESERVED4

Reserved

◆ RESERVED4 [15/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [16/42]

unsigned int _ADI_AI_REGS_YODA_CKGEN_S1_t::RESERVED4

Reserved

◆ RESERVED4 [17/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [18/42]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_s::RESERVED4

Reserved

◆ RESERVED4 [19/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [20/42]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_s::RESERVED4

Reserved

◆ RESERVED4 [21/42]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_s::RESERVED4

Reserved

◆ RESERVED4 [22/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [23/42]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED4

Reserved

◆ RESERVED4 [24/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [25/42]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_S1_t::RESERVED4

Reserved

◆ RESERVED4 [26/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [27/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [28/42]

unsigned int _ADI_AI_REGS_YODA_PIXEL_BIAS_t::RESERVED4

Reserved

◆ RESERVED4 [29/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [30/42]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_NUM_LANES_t::RESERVED4

Reserved

◆ RESERVED4 [31/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [32/42]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TST_PLL_t::RESERVED4

Reserved

◆ RESERVED4 [33/42]

unsigned int _ADI_DATAPATH_MIPI_BUFF_MARGIN_CONTROL_t::RESERVED4

Reserved

◆ RESERVED4 [34/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [35/42]

unsigned int _ADI_DATAPATH_ANALOG_SS_t::RESERVED4

Reserved

◆ RESERVED4 [36/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [37/42]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_0_ROI_TYPE_t::RESERVED4

Reserved

◆ RESERVED4 [38/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [39/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [40/42]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_1_ROI_TYPE_t::RESERVED4

Reserved

◆ RESERVED4 [41/42]

unsigned { ... } ::RESERVED4

Reserved

◆ RESERVED4 [42/42]

unsigned int _ADI_DE_REGS_YODA_USE_CASE_0_ROI_2_ROI_TYPE_t::RESERVED4

Reserved

◆ RESERVED5 [1/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [2/64]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED5

Reserved

◆ RESERVED5 [3/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [4/64]

unsigned int _ADI_USEQ_REGS_MAP1_SYSTEMCLOCKCONTROL_t::RESERVED5

Reserved

◆ RESERVED5 [5/64]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_s::RESERVED5

Reserved

◆ RESERVED5 [6/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [7/64]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::RESERVED5

Reserved

◆ RESERVED5 [8/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [9/64]

unsigned int _ADI_DATAPATH_DBG_MUX_s::RESERVED5

Reserved

◆ RESERVED5 [10/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [11/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_s::RESERVED5

Reserved

◆ RESERVED5 [12/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [13/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_s::RESERVED5

Reserved

◆ RESERVED5 [14/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [15/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [16/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_s::RESERVED5

Reserved

◆ RESERVED5 [17/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_s::RESERVED5

Reserved

◆ RESERVED5 [18/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [19/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_s::RESERVED5

Reserved

◆ RESERVED5 [20/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [21/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [22/64]

unsigned int _ADI_AI_REGS_YODA_ADCPLL_CTRL2_S1_t::RESERVED5

Reserved

◆ RESERVED5 [23/64]

unsigned int _ADI_AI_REGS_YODA_CLK_DE_CTRL_S1_t::RESERVED5

Reserved

◆ RESERVED5 [24/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [25/64]

unsigned int _ADI_AI_REGS_YODA_CLK_LVDSTX_S1_t::RESERVED5

Reserved

◆ RESERVED5 [26/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [27/64]

unsigned int _ADI_AI_REGS_YODA_CLKTREE0_t::RESERVED5

Reserved

◆ RESERVED5 [28/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [29/64]

unsigned int _ADI_AI_REGS_YODA_LS_LVDSTX_S1_t::RESERVED5

Reserved

◆ RESERVED5 [30/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [31/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [32/64]

unsigned int _ADI_AI_REGS_YODA_READOUT_S1_t::RESERVED5

Reserved

◆ RESERVED5 [33/64]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::RESERVED5

Reserved

◆ RESERVED5 [34/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [35/64]

unsigned int _ADI_AI_REGS_YODA_ANA_TEST_MUX_S1_t::RESERVED5

Reserved

◆ RESERVED5 [36/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [37/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [38/64]

unsigned int _ADI_AI_REGS_YODA_DLL_CONTROL_t::RESERVED5

Reserved

◆ RESERVED5 [39/64]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_0_t::RESERVED5

Reserved

◆ RESERVED5 [40/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [41/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [42/64]

unsigned int _ADI_SPIM_REGS_SR_t::RESERVED5

Reserved

◆ RESERVED5 [43/64]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CN_t::RESERVED5

Reserved

◆ RESERVED5 [44/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [45/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [46/64]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_TRAIL_t::RESERVED5

Reserved

◆ RESERVED5 [47/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [48/64]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_TRAIL_t::RESERVED5

Reserved

◆ RESERVED5 [49/64]

unsigned int _ADI_EFUSE_CHARACTERIZATION_t::RESERVED5

Reserved

◆ RESERVED5 [50/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [51/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [52/64]

unsigned int _ADI_DATAPATH_CORRECTION_CONFIG_t::RESERVED5

Reserved

◆ RESERVED5 [53/64]

unsigned int _ADI_DATAPATH_DBG_MUX_t::RESERVED5

Reserved

◆ RESERVED5 [54/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [55/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [56/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EE_HIGH_t::RESERVED5

Reserved

◆ RESERVED5 [57/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_EO_HIGH_t::RESERVED5

Reserved

◆ RESERVED5 [58/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [59/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OE_HIGH_t::RESERVED5

Reserved

◆ RESERVED5 [60/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [61/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED5 [62/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_OO_HIGH_t::RESERVED5

Reserved

◆ RESERVED5 [63/64]

unsigned int _ADI_DE_REGS_YODA_AMP_MUX_SEL_SELB_HIGH_t::RESERVED5

Reserved

◆ RESERVED5 [64/64]

unsigned { ... } ::RESERVED5

Reserved

◆ RESERVED6 [1/48]

unsigned int _ADI_USEQ_REGS_MAP1_FRAMESYNCCTRL_t::RESERVED6

Reserved

◆ RESERVED6 [2/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [3/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [4/48]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG1READOUTCTRL_t::RESERVED6

Reserved

◆ RESERVED6 [5/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [6/48]

unsigned int _ADI_USEQ_REGS_MAP1_PIXSATURATEREADOUTCTRL_t::RESERVED6

Reserved

◆ RESERVED6 [7/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [8/48]

unsigned int _ADI_USEQ_REGS_MAP1_PIXGAINTAG0READOUTCTRL_t::RESERVED6

Reserved

◆ RESERVED6 [9/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [10/48]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_s::RESERVED6

Reserved

◆ RESERVED6 [11/48]

unsigned int _ADI_DATAPATH_PP_ADC_DELAY_s::RESERVED6

Reserved

◆ RESERVED6 [12/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [13/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [14/48]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL1_S1_t::RESERVED6

Reserved

◆ RESERVED6 [15/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [16/48]

unsigned int _ADI_AI_REGS_YODA_CKGEN_CTRL_t::RESERVED6

Reserved

◆ RESERVED6 [17/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [18/48]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL2_S1_t::RESERVED6

Reserved

◆ RESERVED6 [19/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [20/48]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL3_S1_t::RESERVED6

Reserved

◆ RESERVED6 [21/48]

unsigned int _ADI_AI_REGS_YODA_IPDA_CTRL_S1_t::RESERVED6

Reserved

◆ RESERVED6 [22/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [23/48]

unsigned int _ADI_AI_REGS_YODA_LSMOD_EN_t::RESERVED6

Reserved

◆ RESERVED6 [24/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [25/48]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED6

Reserved

◆ RESERVED6 [26/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [27/48]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::RESERVED6

Reserved

◆ RESERVED6 [28/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [29/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [30/48]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::RESERVED6

Reserved

◆ RESERVED6 [31/48]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::RESERVED6

Reserved

◆ RESERVED6 [32/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [33/48]

unsigned int _ADI_AI_REGS_YODA_DEBUG_MUX_CONTROL_REG_t::RESERVED6

Reserved

◆ RESERVED6 [34/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [35/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [36/48]

unsigned int _ADI_SPIM_REGS_IMR_t::RESERVED6

Reserved

◆ RESERVED6 [37/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [38/48]

unsigned int _ADI_SPIM_REGS_ISR_t::RESERVED6

Reserved

◆ RESERVED6 [39/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [40/48]

unsigned int _ADI_SPIM_REGS_RISR_t::RESERVED6

Reserved

◆ RESERVED6 [41/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [42/48]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_TEST_ENBL_t::RESERVED6

Reserved

◆ RESERVED6 [43/48]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_M_PRG_HS_ZERO_t::RESERVED6

Reserved

◆ RESERVED6 [44/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [45/48]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_t::RESERVED6

Reserved

◆ RESERVED6 [46/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [47/48]

unsigned { ... } ::RESERVED6

Reserved

◆ RESERVED6 [48/48]

unsigned int _ADI_DATAPATH_PP_ADC_DELAY_t::RESERVED6

Reserved

◆ RESERVED7 [1/28]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED7

Reserved

◆ RESERVED7 [2/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [3/28]

unsigned int _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::RESERVED7

Reserved

◆ RESERVED7 [4/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [5/28]

unsigned int _ADI_AI_REGS_YODA_ADC_CTRL0_S1_t::RESERVED7

Reserved

◆ RESERVED7 [6/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [7/28]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::RESERVED7

Reserved

◆ RESERVED7 [8/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [9/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [10/28]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK1_t::RESERVED7

Reserved

◆ RESERVED7 [11/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [12/28]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK2_t::RESERVED7

Reserved

◆ RESERVED7 [13/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [14/28]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK1REF_t::RESERVED7

Reserved

◆ RESERVED7 [15/28]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_CK2REF_t::RESERVED7

Reserved

◆ RESERVED7 [16/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [17/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [18/28]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_L1_t::RESERVED7

Reserved

◆ RESERVED7 [19/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [20/28]

unsigned int _ADI_USEQ_REGS_MAP2_CLKGEN_L2_t::RESERVED7

Reserved

◆ RESERVED7 [21/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [22/28]

unsigned int _ADI_SPIM_REGS_SR_t::RESERVED7

Reserved

◆ RESERVED7 [23/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [24/28]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_MC_PRG_HS_ZERO_t::RESERVED7

Reserved

◆ RESERVED7 [25/28]

unsigned int _ADI_PCM_REGS_YODA_PCMCTRL_0_t::RESERVED7

Reserved

◆ RESERVED7 [26/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED7 [27/28]

unsigned int _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::RESERVED7

Reserved

◆ RESERVED7 [28/28]

unsigned { ... } ::RESERVED7

Reserved

◆ RESERVED8 [1/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [2/94]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::RESERVED8

Reserved

◆ RESERVED8 [3/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [4/94]

unsigned int _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::RESERVED8

Reserved

◆ RESERVED8 [5/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [6/94]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEFREQ_s::RESERVED8

Reserved

◆ RESERVED8 [7/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [8/94]

unsigned int _ADI_USEQ_REGS_MAP1_HSP_DFT_t::RESERVED8

Reserved

◆ RESERVED8 [9/94]

unsigned int _ADI_DATAPATH_MIPI_HEADER_WIDTH_s::RESERVED8

Reserved

◆ RESERVED8 [10/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [11/94]

unsigned int _ADI_USEQ_REGS_MAP1_AMPCLK3CTRL2_t::RESERVED8

Reserved

◆ RESERVED8 [12/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [13/94]

unsigned int _ADI_USEQ_REGS_MAP1_NOISERESETCTRL2_t::RESERVED8

Reserved

◆ RESERVED8 [14/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [15/94]

unsigned int _ADI_USEQ_REGS_MAP1_PIXRESETCTRL2_t::RESERVED8

Reserved

◆ RESERVED8 [16/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [17/94]

unsigned int _ADI_DATAPATH_MIPI_RD_EN_MAX_s::RESERVED8

Reserved

◆ RESERVED8 [18/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [19/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [20/94]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL4_t::RESERVED8

Reserved

◆ RESERVED8 [21/94]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG1CLKCTRL2_t::RESERVED8

Reserved

◆ RESERVED8 [22/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [23/94]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAGTHRESHCTRL2_t::RESERVED8

Reserved

◆ RESERVED8 [24/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [25/94]

unsigned int _ADI_USEQ_REGS_MAP1_GAINTAG0CLKCTRL2_t::RESERVED8

Reserved

◆ RESERVED8 [26/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [27/94]

unsigned int _ADI_USEQ_REGS_MAP1_FORCESFCTRL2_t::RESERVED8

Reserved

◆ RESERVED8 [28/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [29/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [30/94]

unsigned int _ADI_USEQ_REGS_MAP1_FORCEIPDACTRL2_t::RESERVED8

Reserved

◆ RESERVED8 [31/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [32/94]

unsigned int _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_s::RESERVED8

Reserved

◆ RESERVED8 [33/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [34/94]

unsigned int _ADI_USEQ_REGS_MAP1_PWM_CTRL_1_t::RESERVED8

Reserved

◆ RESERVED8 [35/94]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_s::RESERVED8

Reserved

◆ RESERVED8 [36/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [37/94]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_s::RESERVED8

Reserved

◆ RESERVED8 [38/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [39/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [40/94]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_s::RESERVED8

Reserved

◆ RESERVED8 [41/94]

unsigned int _ADI_DE_REGS_YODA_BINNED_REPEAT_s::RESERVED8

Reserved

◆ RESERVED8 [42/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [43/94]

unsigned int _ADI_DE_REGS_YODA_DARK_REPEAT_s::RESERVED8

Reserved

◆ RESERVED8 [44/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [45/94]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_s::RESERVED8

Reserved

◆ RESERVED8 [46/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [47/94]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_s::RESERVED8

Reserved

◆ RESERVED8 [48/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [49/94]

unsigned int _ADI_AI_REGS_YODA_DAC_DATA_t::RESERVED8

Reserved

◆ RESERVED8 [50/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [51/94]

unsigned int _ADI_AI_REGS_YODA_LSCTRL0_S1_t::RESERVED8

Reserved

◆ RESERVED8 [52/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [53/94]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::RESERVED8

Reserved

◆ RESERVED8 [54/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [55/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [56/94]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_PRE_t::RESERVED8

Reserved

◆ RESERVED8 [57/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [58/94]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_POST_t::RESERVED8

Reserved

◆ RESERVED8 [59/94]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_TX_GAP_t::RESERVED8

Reserved

◆ RESERVED8 [60/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [61/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [62/94]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_CFG_T_CLK_GAP_t::RESERVED8

Reserved

◆ RESERVED8 [63/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [64/94]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_MIXEL_DPHY_CFG_MIXEL_CM_t::RESERVED8

Reserved

◆ RESERVED8 [65/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [66/94]

unsigned int _ADI_LPS_REGS_YODA_LPSWAVEFREQ_t::RESERVED8

Reserved

◆ RESERVED8 [67/94]

unsigned int _ADI_SS_REGS_SSWAVEFREQ_t::RESERVED8

Reserved

◆ RESERVED8 [68/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [69/94]

unsigned int _ADI_SS_REGS_SSPINHI_t::RESERVED8

Reserved

◆ RESERVED8 [70/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [71/94]

unsigned int _ADI_SS_REGS_SSINTERVHI_t::RESERVED8

Reserved

◆ RESERVED8 [72/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [73/94]

unsigned int _ADI_SS_REGS_SSMODAMP_t::RESERVED8

Reserved

◆ RESERVED8 [74/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [75/94]

unsigned int _ADI_DATAPATH_MIPI_HEADER_WIDTH_t::RESERVED8

Reserved

◆ RESERVED8 [76/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [77/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [78/94]

unsigned int _ADI_DATAPATH_MIPI_ESC_CLK_DIV_t::RESERVED8

Reserved

◆ RESERVED8 [79/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [80/94]

unsigned int _ADI_DE_REGS_YODA_BINNED1X2_REPEAT_COUNT_t::RESERVED8

Reserved

◆ RESERVED8 [81/94]

unsigned int _ADI_DE_REGS_YODA_NATIVE_RESOLUTION_REPEAT_t::RESERVED8

Reserved

◆ RESERVED8 [82/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [83/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [84/94]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_2X_REPEAT_t::RESERVED8

Reserved

◆ RESERVED8 [85/94]

unsigned int _ADI_DE_REGS_YODA_SUB_SAMPLED_4X_REPEAT_t::RESERVED8

Reserved

◆ RESERVED8 [86/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [87/94]

unsigned int _ADI_DE_REGS_YODA_BINNED_REPEAT_t::RESERVED8

Reserved

◆ RESERVED8 [88/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [89/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [90/94]

unsigned int _ADI_DE_REGS_YODA_DARK_REPEAT_t::RESERVED8

Reserved

◆ RESERVED8 [91/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED8 [92/94]

unsigned int _ADI_DE_REGS_YODA_PREAMBLE_REPEAT_t::RESERVED8

Reserved

◆ RESERVED8 [93/94]

unsigned int _ADI_DE_REGS_YODA_POSTAMBLE_REPEAT_t::RESERVED8

Reserved

◆ RESERVED8 [94/94]

unsigned { ... } ::RESERVED8

Reserved

◆ RESERVED9 [1/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [2/44]

unsigned int _ADI_USEQ_REGS_MAP1_DIGPWRDOWN_t::RESERVED9

Reserved

◆ RESERVED9 [3/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [4/44]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_s::RESERVED9

Reserved

◆ RESERVED9 [5/44]

unsigned int _ADI_USEQ_REGS_MAP1_ROWCNTINCRCONTROL2_t::RESERVED9

Reserved

◆ RESERVED9 [6/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [7/44]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMADDR_s::RESERVED9

Reserved

◆ RESERVED9 [8/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [9/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [10/44]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::RESERVED9

Reserved

◆ RESERVED9 [11/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [12/44]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_2_s::RESERVED9

Reserved

◆ RESERVED9 [13/44]

unsigned int _ADI_DATAPATH_ROI_COLUMN_START_s::RESERVED9

Reserved

◆ RESERVED9 [14/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [15/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [16/44]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::RESERVED9

Reserved

◆ RESERVED9 [17/44]

unsigned int _ADI_AI_REGS_YODA_AMP_CTRL2_S1_t::RESERVED9

Reserved

◆ RESERVED9 [18/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [19/44]

unsigned int _ADI_AI_REGS_YODA_DAC_CTRL1_t::RESERVED9

Reserved

◆ RESERVED9 [20/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [21/44]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::RESERVED9

Reserved

◆ RESERVED9 [22/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [23/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [24/44]

unsigned int _ADI_AI_REGS_YODA_REGIF_CTRL_t::RESERVED9

Reserved

◆ RESERVED9 [25/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [26/44]

unsigned int _ADI_AI_REGS_YODA_VLOWENABLE_t::RESERVED9

Reserved

◆ RESERVED9 [27/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [28/44]

unsigned int _ADI_AI_REGS_YODA_CHAIN1_LEN_t::RESERVED9

Reserved

◆ RESERVED9 [29/44]

unsigned int _ADI_AI_REGS_YODA_CHAIN2_LEN_t::RESERVED9

Reserved

◆ RESERVED9 [30/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [31/44]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_1_t::RESERVED9

Reserved

◆ RESERVED9 [32/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [33/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [34/44]

unsigned int _ADI_LPS_REGS_YODA_LPSCTRL_t::RESERVED9

Reserved

◆ RESERVED9 [35/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [36/44]

unsigned int _ADI_LPS_REGS_YODA_LPSRAMADDR_t::RESERVED9

Reserved

◆ RESERVED9 [37/44]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_2_t::RESERVED9

Reserved

◆ RESERVED9 [38/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [39/44]

unsigned int _ADI_DATAPATH_ROI_COLUMN_START_t::RESERVED9

Reserved

◆ RESERVED9 [40/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [41/44]

unsigned int _ADI_DATAPATH_MIPI_RD_EN_MAX_t::RESERVED9

Reserved

◆ RESERVED9 [42/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [43/44]

unsigned { ... } ::RESERVED9

Reserved

◆ RESERVED9 [44/44]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::RESERVED9

Reserved

◆ RFF [1/2]

unsigned int _ADI_SPIM_REGS_SR_t::RFF

No description provided

◆ RFF [2/2]

unsigned { ... } ::RFF

No description provided

◆ RFNE [1/2]

unsigned { ... } ::RFNE

No description provided

◆ RFNE [2/2]

unsigned int _ADI_SPIM_REGS_SR_t::RFNE

No description provided

◆ RFT [1/2]

unsigned int _ADI_SPIM_REGS_RXFTLR_t::RFT

No description provided

◆ RFT [2/2]

unsigned { ... } ::RFT

No description provided

◆ RISE_TIME [1/2]

unsigned { ... } ::RISE_TIME

No description provided

◆ RISE_TIME [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ADCCNVTCTRL3_t::RISE_TIME

No description provided

◆ RM_ENABLE [1/2]

unsigned { ... } ::RM_ENABLE

Enable resistance measurement mode

◆ RM_ENABLE [2/2]

unsigned int _ADI_EFUSE_CHARACTERIZATION_t::RM_ENABLE

Enable resistance measurement mode

◆ ROI_0 [1/4]

unsigned { ... } ::ROI_0

No description provided

◆ ROI_0 [2/4]

unsigned int _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_0

No description provided

◆ ROI_0 [3/4]

unsigned { ... } ::ROI_0

No description provided

◆ ROI_0 [4/4]

unsigned int _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_0

No description provided

◆ ROI_1 [1/4]

unsigned int _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_1

No description provided

◆ ROI_1 [2/4]

unsigned { ... } ::ROI_1

No description provided

◆ ROI_1 [3/4]

unsigned int _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_1

No description provided

◆ ROI_1 [4/4]

unsigned { ... } ::ROI_1

No description provided

◆ ROI_2 [1/4]

unsigned { ... } ::ROI_2

No description provided

◆ ROI_2 [2/4]

unsigned int _ADI_DE_REGS_YODA_TYPE_OVERRIDE_s::ROI_2

No description provided

◆ ROI_2 [3/4]

unsigned int _ADI_DE_REGS_YODA_TYPE_OVERRIDE_t::ROI_2

No description provided

◆ ROI_2 [4/4]

unsigned { ... } ::ROI_2

No description provided

◆ ROI_HEIGHT [1/4]

unsigned int _ADI_DATAPATH_ROI_HEIGHT_s::ROI_HEIGHT

Numbers of rows enabled in ROI

◆ ROI_HEIGHT [2/4]

unsigned { ... } ::ROI_HEIGHT

Numbers of rows enabled in ROI

◆ ROI_HEIGHT [3/4]

unsigned int _ADI_DATAPATH_ROI_HEIGHT_t::ROI_HEIGHT

Numbers of rows enabled in ROI

◆ ROI_HEIGHT [4/4]

unsigned { ... } ::ROI_HEIGHT

Numbers of rows enabled in ROI

◆ ROI_WIDTH [1/4]

unsigned int _ADI_DATAPATH_ROI_WIDTH_s::ROI_WIDTH

Number of columns enabled in ROI

◆ ROI_WIDTH [2/4]

unsigned { ... } ::ROI_WIDTH

Number of columns enabled in ROI

◆ ROI_WIDTH [3/4]

unsigned int _ADI_DATAPATH_ROI_WIDTH_t::ROI_WIDTH

Number of columns enabled in ROI

◆ ROI_WIDTH [4/4]

unsigned { ... } ::ROI_WIDTH

Number of columns enabled in ROI

◆ ROW_CAPEVEN_DEF [1/2]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_CAPEVEN_DEF

No description provided

◆ ROW_CAPEVEN_DEF [2/2]

unsigned { ... } ::ROW_CAPEVEN_DEF

No description provided

◆ ROW_CAPODD_DEF [1/2]

unsigned { ... } ::ROW_CAPODD_DEF

No description provided

◆ ROW_CAPODD_DEF [2/2]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_CAPODD_DEF

No description provided

◆ ROW_READ_DEF [1/2]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_READ_DEF

No description provided

◆ ROW_READ_DEF [2/2]

unsigned { ... } ::ROW_READ_DEF

No description provided

◆ ROW_RESET_DEF [1/2]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_RESET_DEF

No description provided

◆ ROW_RESET_DEF [2/2]

unsigned { ... } ::ROW_RESET_DEF

No description provided

◆ ROW_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::ROW_SPARE

No description provided

◆ ROW_SPARE [2/2]

unsigned { ... } ::ROW_SPARE

No description provided

◆ ROW_TX_DEF [1/2]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_TX_DEF

No description provided

◆ ROW_TX_DEF [2/2]

unsigned { ... } ::ROW_TX_DEF

No description provided

◆ ROW_TX_PD_DEF [1/2]

unsigned { ... } ::ROW_TX_PD_DEF

No description provided

◆ ROW_TX_PD_DEF [2/2]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_TX_PD_DEF

No description provided

◆ ROW_UP_DNB [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::ROW_UP_DNB

No description provided

◆ ROW_UP_DNB [2/2]

unsigned { ... } ::ROW_UP_DNB

No description provided

◆ ROW_VECTOR [1/4]

unsigned int _ADI_DATAPATH_ROW_VECTOR_s::ROW_VECTOR

Each bit is used to indicate that a group of 64 rows of pixel array are enabled. LSB bit used to indicate rows 0-63

◆ ROW_VECTOR [2/4]

unsigned { ... } ::ROW_VECTOR

Each bit is used to indicate that a group of 64 rows of pixel array are enabled. LSB bit used to indicate rows 0-63

◆ ROW_VECTOR [3/4]

unsigned int _ADI_DATAPATH_ROW_VECTOR_t::ROW_VECTOR

Each bit is used to indicate that a group of 64 rows of pixel array are enabled. LSB bit used to indicate rows 0-63

◆ ROW_VECTOR [4/4]

unsigned { ... } ::ROW_VECTOR

Each bit is used to indicate that a group of 64 rows of pixel array are enabled. LSB bit used to indicate rows 0-63

◆ ROW_VECTOR_LD [1/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_0_t::ROW_VECTOR_LD

No description provided

◆ ROW_VECTOR_LD [2/2]

unsigned { ... } ::ROW_VECTOR_LD

No description provided

◆ ROW_WRAPEN [1/2]

unsigned int _ADI_AI_REGS_YODA_ROW_CTRL_t::ROW_WRAPEN

No description provided

◆ ROW_WRAPEN [2/2]

unsigned { ... } ::ROW_WRAPEN

No description provided

◆ ROWS_PER_PACKET [1/4]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_s::ROWS_PER_PACKET

Number of rows to be packed in a MIPI packet. Valid values are 1,2,4,8,16,32,64

◆ ROWS_PER_PACKET [2/4]

unsigned { ... } ::ROWS_PER_PACKET

Number of rows to be packed in a MIPI packet. Valid values are 1,2,4,8,16,32,64

◆ ROWS_PER_PACKET [3/4]

unsigned int _ADI_DATAPATH_USE_CASE_MIPI_PACKET_CONTROL_t::ROWS_PER_PACKET

Number of rows to be packed in a MIPI packet. Valid values are 1,2,4,8,16,32,64

◆ ROWS_PER_PACKET [4/4]

unsigned { ... } ::ROWS_PER_PACKET

Number of rows to be packed in a MIPI packet. Valid values are 1,2,4,8,16,32,64

◆ ROWS_PER_PACKET_OUT [1/4]

unsigned int _ADI_DATAPATH_ROWS_PER_PACKET_OUT_s::ROWS_PER_PACKET_OUT

When auto_rows_per_packet_en = 1; readback this value calculated by the datapath

◆ ROWS_PER_PACKET_OUT [2/4]

unsigned { ... } ::ROWS_PER_PACKET_OUT

When auto_rows_per_packet_en = 1; readback this value calculated by the datapath

◆ ROWS_PER_PACKET_OUT [3/4]

unsigned { ... } ::ROWS_PER_PACKET_OUT

When auto_rows_per_packet_en = 1; readback this value calculated by the datapath. Updated on dump start

◆ ROWS_PER_PACKET_OUT [4/4]

unsigned int _ADI_DATAPATH_ROWS_PER_PACKET_OUT_t::ROWS_PER_PACKET_OUT

When auto_rows_per_packet_en = 1; readback this value calculated by the datapath. Updated on dump start

◆ RXFIM [1/2]

unsigned int _ADI_SPIM_REGS_IMR_t::RXFIM

No description provided

◆ RXFIM [2/2]

unsigned { ... } ::RXFIM

No description provided

◆ RXFIR [1/2]

unsigned { ... } ::RXFIR

No description provided

◆ RXFIR [2/2]

unsigned int _ADI_SPIM_REGS_RISR_t::RXFIR

No description provided

◆ RXFIS [1/2]

unsigned { ... } ::RXFIS

No description provided

◆ RXFIS [2/2]

unsigned int _ADI_SPIM_REGS_ISR_t::RXFIS

No description provided

◆ RXOICR [1/2]

unsigned { ... } ::RXOICR

No description provided

◆ RXOICR [2/2]

unsigned int _ADI_SPIM_REGS_RXOICR_t::RXOICR

No description provided

◆ RXOIM [1/2]

unsigned { ... } ::RXOIM

No description provided

◆ RXOIM [2/2]

unsigned int _ADI_SPIM_REGS_IMR_t::RXOIM

No description provided

◆ RXOIR [1/2]

unsigned { ... } ::RXOIR

No description provided

◆ RXOIR [2/2]

unsigned int _ADI_SPIM_REGS_RISR_t::RXOIR

No description provided

◆ RXOIS [1/2]

unsigned int _ADI_SPIM_REGS_ISR_t::RXOIS

No description provided

◆ RXOIS [2/2]

unsigned { ... } ::RXOIS

No description provided

◆ RXTFL [1/2]

unsigned { ... } ::RXTFL

No description provided

◆ RXTFL [2/2]

unsigned int _ADI_SPIM_REGS_RXFLR_t::RXTFL

No description provided

◆ RXUICR [1/2]

unsigned { ... } ::RXUICR

No description provided

◆ RXUICR [2/2]

unsigned int _ADI_SPIM_REGS_RXUICR_t::RXUICR

No description provided

◆ RXUIM [1/2]

unsigned int _ADI_SPIM_REGS_IMR_t::RXUIM

No description provided

◆ RXUIM [2/2]

unsigned { ... } ::RXUIM

No description provided

◆ RXUIR [1/2]

unsigned int _ADI_SPIM_REGS_RISR_t::RXUIR

No description provided

◆ RXUIR [2/2]

unsigned { ... } ::RXUIR

No description provided

◆ RXUIS [1/2]

unsigned { ... } ::RXUIS

No description provided

◆ RXUIS [2/2]

unsigned int _ADI_SPIM_REGS_ISR_t::RXUIS

No description provided

◆ SAT_DETECT_PD [1/2]

unsigned { ... } ::SAT_DETECT_PD

No description provided

◆ SAT_DETECT_PD [2/2]

unsigned int _ADI_AI_REGS_YODA_POWER_DOWN_ADC_OTHERS_t::SAT_DETECT_PD

No description provided

◆ SATDETECT_S [1/2]

unsigned { ... } ::SATDETECT_S

No description provided

◆ SATDETECT_S [2/2]

unsigned int _ADI_AI_REGS_YODA_READOUT_S1_t::SATDETECT_S

No description provided

◆ SCKDV [1/2]

unsigned int _ADI_SPIM_REGS_BAUDR_t::SCKDV

No description provided

◆ SCKDV [2/2]

unsigned { ... } ::SCKDV

No description provided

◆ SCPH [1/2]

unsigned int _ADI_SPIM_REGS_CTRLR0_t::SCPH

No description provided

◆ SCPH [2/2]

unsigned { ... } ::SCPH

No description provided

◆ SCPOL [1/2]

unsigned int _ADI_SPIM_REGS_CTRLR0_t::SCPOL

No description provided

◆ SCPOL [2/2]

unsigned { ... } ::SCPOL

No description provided

◆ SCRATCHPAD [1/2]

unsigned int _ADI_USEQ_REGS_MAP2_SCRATCHPAD_0__t::SCRATCHPAD

No description provided

◆ SCRATCHPAD [2/2]

unsigned { ... } ::SCRATCHPAD

No description provided

◆ SEL_D2ORD3N_LOAD1 [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_0_t::SEL_D2ORD3N_LOAD1

No description provided

◆ SEL_D2ORD3N_LOAD1 [2/2]

unsigned { ... } ::SEL_D2ORD3N_LOAD1

No description provided

◆ SEL_D2ORD3N_LOAD2 [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_1_t::SEL_D2ORD3N_LOAD2

No description provided

◆ SEL_D2ORD3N_LOAD2 [2/2]

unsigned { ... } ::SEL_D2ORD3N_LOAD2

No description provided

◆ SEQ_ENABLE [1/2]

unsigned { ... } ::SEQ_ENABLE

No description provided

◆ SEQ_ENABLE [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_BREAKPOINTCTRL_t::SEQ_ENABLE

No description provided

◆ SEQ_STATE_MACHINE_STS [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCESTATUS_t::SEQ_STATE_MACHINE_STS

No description provided

◆ SEQ_STATE_MACHINE_STS [2/2]

unsigned { ... } ::SEQ_STATE_MACHINE_STS

No description provided

◆ SEQRAM_DST [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::SEQRAM_DST

SeqRAM DST (Disable Self Timing) Register

◆ SEQRAM_DST [2/2]

unsigned { ... } ::SEQRAM_DST

SeqRAM DST (Disable Self Timing) Register

◆ SEQRAM_MARGIN [1/2]

unsigned { ... } ::SEQRAM_MARGIN

SeqRAM Margin

◆ SEQRAM_MARGIN [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::SEQRAM_MARGIN

SeqRAM Margin

◆ SEQRAM_PARITY_ERR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::SEQRAM_PARITY_ERR

Parity Error in Sequence RAM

◆ SEQRAM_PARITY_ERR [2/2]

unsigned { ... } ::SEQRAM_PARITY_ERR

Parity Error in Sequence RAM

◆ SEQUENCE_END_ADDR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCEENDADDR_t::SEQUENCE_END_ADDR

No description provided

◆ SEQUENCE_END_ADDR [2/2]

unsigned { ... } ::SEQUENCE_END_ADDR

No description provided

◆ SEQUENCE_START_ADDR [1/2]

unsigned { ... } ::SEQUENCE_START_ADDR

No description provided

◆ SEQUENCE_START_ADDR [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_SEQUENCESTARTADDR_t::SEQUENCE_START_ADDR

No description provided

◆ SER [1/2]

unsigned { ... } ::SER

No description provided

◆ SER [2/2]

unsigned int _ADI_SPIM_REGS_SER_t::SER

No description provided

◆ SET_PSEUDO_ERROR [1/2]

unsigned { ... } ::SET_PSEUDO_ERROR

No description provided

◆ SET_PSEUDO_ERROR [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSET_t::SET_PSEUDO_ERROR

No description provided

◆ SET_USER_DEFINED_ERROR [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSET_t::SET_USER_DEFINED_ERROR

No description provided

◆ SET_USER_DEFINED_ERROR [2/2]

unsigned { ... } ::SET_USER_DEFINED_ERROR

No description provided

◆ SHIFT_CHAIN_DONE_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SHIFT_CHAIN_DONE_SOURCE

No description provided

◆ SHIFT_CHAIN_DONE_SOURCE [2/2]

unsigned { ... } ::SHIFT_CHAIN_DONE_SOURCE

No description provided

◆ SHO_VLOW [1/2]

unsigned { ... } ::SHO_VLOW

No description provided

◆ SHO_VLOW [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHODETECT_t::SHO_VLOW

No description provided

◆ SMPL_CLK_SEL [1/2]

unsigned int _ADI_PCM_REGS_YODA_OSC_PERIOD_CTRL_t::SMPL_CLK_SEL

No description provided

◆ SMPL_CLK_SEL [2/2]

unsigned { ... } ::SMPL_CLK_SEL

No description provided

◆ SMPL_PERIOD [1/2]

unsigned { ... } ::SMPL_PERIOD

No description provided

◆ SMPL_PERIOD [2/2]

unsigned int _ADI_PCM_REGS_YODA_OSC_PERIOD_RD_t::SMPL_PERIOD

No description provided

◆ SOFT_RESET_BOOT_MEM [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_BOOT_MEM

No description provided

◆ SOFT_RESET_BOOT_MEM [2/2]

unsigned { ... } ::SOFT_RESET_BOOT_MEM

No description provided

◆ SOFT_RESET_CSI [1/2]

unsigned { ... } ::SOFT_RESET_CSI

No description provided

◆ SOFT_RESET_CSI [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_CSI

No description provided

◆ SOFT_RESET_DATAPATH [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_DATAPATH

No description provided

◆ SOFT_RESET_DATAPATH [2/2]

unsigned { ... } ::SOFT_RESET_DATAPATH

No description provided

◆ SOFT_RESET_DE [1/2]

unsigned { ... } ::SOFT_RESET_DE

No description provided

◆ SOFT_RESET_DE [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_DE

No description provided

◆ SOFT_RESET_LPS1 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_LPS1

No description provided

◆ SOFT_RESET_LPS1 [2/2]

unsigned { ... } ::SOFT_RESET_LPS1

No description provided

◆ SOFT_RESET_LPS2 [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_LPS2

No description provided

◆ SOFT_RESET_LPS2 [2/2]

unsigned { ... } ::SOFT_RESET_LPS2

No description provided

◆ SOFT_RESET_PCM [1/2]

unsigned { ... } ::SOFT_RESET_PCM

No description provided

◆ SOFT_RESET_PCM [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_PCM

No description provided

◆ SOFT_RESET_SPI_MASTER [1/2]

unsigned { ... } ::SOFT_RESET_SPI_MASTER

No description provided

◆ SOFT_RESET_SPI_MASTER [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_SPI_MASTER

No description provided

◆ SOFT_RESET_SS [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_SOFT_RESET_t::SOFT_RESET_SS

No description provided

◆ SOFT_RESET_SS [2/2]

unsigned { ... } ::SOFT_RESET_SS

No description provided

◆ SPIM_READ_DONE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SPIM_READ_DONE

No description provided

◆ SPIM_READ_DONE [2/2]

unsigned { ... } ::SPIM_READ_DONE

No description provided

◆ SPIM_WRITE_DONE_SOURCE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::SPIM_WRITE_DONE_SOURCE

No description provided

◆ SPIM_WRITE_DONE_SOURCE [2/2]

unsigned { ... } ::SPIM_WRITE_DONE_SOURCE

No description provided

◆ SRL [1/2]

unsigned int _ADI_SPIM_REGS_CTRLR0_t::SRL

No description provided

◆ SRL [2/2]

unsigned { ... } ::SRL

No description provided

◆ SS_ENA [1/2]

unsigned int _ADI_SS_REGS_SSCTRL_t::SS_ENA

No description provided

◆ SS_ENA [2/2]

unsigned { ... } ::SS_ENA

No description provided

◆ SSDBGCOM [1/2]

unsigned int _ADI_SS_REGS_SSDBG_t::SSDBGCOM

No description provided

◆ SSDBGCOM [2/2]

unsigned { ... } ::SSDBGCOM

No description provided

◆ SSDBGEN [1/2]

unsigned int _ADI_SS_REGS_SSDBG_t::SSDBGEN

No description provided

◆ SSDBGEN [2/2]

unsigned { ... } ::SSDBGEN

No description provided

◆ SSDBGSEL [1/2]

unsigned int _ADI_SS_REGS_SSDBG_t::SSDBGSEL

No description provided

◆ SSDBGSEL [2/2]

unsigned { ... } ::SSDBGSEL

No description provided

◆ SSI_COMP_VERSION [1/2]

unsigned { ... } ::SSI_COMP_VERSION

No description provided

◆ SSI_COMP_VERSION [2/2]

unsigned int _ADI_SPIM_REGS_SSI_VERSION_ID_t::SSI_COMP_VERSION

No description provided

◆ SSI_EN [1/2]

unsigned int _ADI_SPIM_REGS_SSIENR_t::SSI_EN

No description provided

◆ SSI_EN [2/2]

unsigned { ... } ::SSI_EN

No description provided

◆ SSPLL_ACOFF [1/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL3_S1_t::SSPLL_ACOFF

No description provided

◆ SSPLL_ACOFF [2/2]

unsigned { ... } ::SSPLL_ACOFF

No description provided

◆ SSPLL_C [1/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_C

No description provided

◆ SSPLL_C [2/2]

unsigned { ... } ::SSPLL_C

No description provided

◆ SSPLL_DLPF [1/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_DLPF

No description provided

◆ SSPLL_DLPF [2/2]

unsigned { ... } ::SSPLL_DLPF

No description provided

◆ SSPLL_END5 [1/2]

unsigned { ... } ::SSPLL_END5

No description provided

◆ SSPLL_END5 [2/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_END5

No description provided

◆ SSPLL_LOCK_ACC [1/2]

unsigned { ... } ::SSPLL_LOCK_ACC

No description provided

◆ SSPLL_LOCK_ACC [2/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::SSPLL_LOCK_ACC

No description provided

◆ SSPLL_LOCK_LOST [1/2]

unsigned { ... } ::SSPLL_LOCK_LOST

No description provided

◆ SSPLL_LOCK_LOST [2/2]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::SSPLL_LOCK_LOST

No description provided

◆ SSPLL_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_PD

No description provided

◆ SSPLL_PD [2/2]

unsigned { ... } ::SSPLL_PD

No description provided

◆ SSPLL_PHASE_LOCK_DELAY [1/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_PHASE_LOCK_DELAY

No description provided

◆ SSPLL_PHASE_LOCK_DELAY [2/2]

unsigned { ... } ::SSPLL_PHASE_LOCK_DELAY

No description provided

◆ SSPLL_PHASE_LOCK_REG [1/2]

unsigned { ... } ::SSPLL_PHASE_LOCK_REG

No description provided

◆ SSPLL_PHASE_LOCK_REG [2/2]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::SSPLL_PHASE_LOCK_REG

No description provided

◆ SSPLL_QP [1/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_QP

No description provided

◆ SSPLL_QP [2/2]

unsigned { ... } ::SSPLL_QP

No description provided

◆ SSPLL_RESET_LOCK_LOST [1/2]

unsigned { ... } ::SSPLL_RESET_LOCK_LOST

No description provided

◆ SSPLL_RESET_LOCK_LOST [2/2]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_RESET_LOCK_LOST

No description provided

◆ SSPLL_RST [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::SSPLL_RST

No description provided

◆ SSPLL_RST [2/2]

unsigned { ... } ::SSPLL_RST

No description provided

◆ SSPLL_RZ [1/2]

unsigned { ... } ::SSPLL_RZ

No description provided

◆ SSPLL_RZ [2/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL0_S1_t::SSPLL_RZ

No description provided

◆ SSPLL_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::SSPLL_SPARE

No description provided

◆ SSPLL_SPARE [2/2]

unsigned { ... } ::SSPLL_SPARE

No description provided

◆ SSPLL_TEST_SEL [1/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_TEST_SEL

No description provided

◆ SSPLL_TEST_SEL [2/2]

unsigned { ... } ::SSPLL_TEST_SEL

No description provided

◆ SSPLL_TESTMUX [1/2]

unsigned { ... } ::SSPLL_TESTMUX

No description provided

◆ SSPLL_TESTMUX [2/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL2_S1_t::SSPLL_TESTMUX

No description provided

◆ SSPLL_UNLOCK_ACC [1/2]

unsigned { ... } ::SSPLL_UNLOCK_ACC

No description provided

◆ SSPLL_UNLOCK_ACC [2/2]

unsigned int _ADI_AI_REGS_YODA_SSPLL_CTRL1_S1_t::SSPLL_UNLOCK_ACC

No description provided

◆ ST_DECODE_000 [1/4]

unsigned { ... } ::ST_DECODE_000

Mux input for the ST selection

◆ ST_DECODE_000 [2/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_000

Mux input for the ST selection

◆ ST_DECODE_000 [3/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_000

Mux input for the ST selection

◆ ST_DECODE_000 [4/4]

unsigned { ... } ::ST_DECODE_000

Mux input for the ST selection

◆ ST_DECODE_001 [1/4]

unsigned { ... } ::ST_DECODE_001

Mux input for the ST selection

◆ ST_DECODE_001 [2/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_001

Mux input for the ST selection

◆ ST_DECODE_001 [3/4]

unsigned { ... } ::ST_DECODE_001

Mux input for the ST selection

◆ ST_DECODE_001 [4/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_001

Mux input for the ST selection

◆ ST_DECODE_010 [1/4]

unsigned { ... } ::ST_DECODE_010

Mux input for the ST selection

◆ ST_DECODE_010 [2/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_010

Mux input for the ST selection

◆ ST_DECODE_010 [3/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_010

Mux input for the ST selection

◆ ST_DECODE_010 [4/4]

unsigned { ... } ::ST_DECODE_010

Mux input for the ST selection

◆ ST_DECODE_011 [1/4]

unsigned { ... } ::ST_DECODE_011

Mux input for the ST selection

◆ ST_DECODE_011 [2/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_011

Mux input for the ST selection

◆ ST_DECODE_011 [3/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_011

Mux input for the ST selection

◆ ST_DECODE_011 [4/4]

unsigned { ... } ::ST_DECODE_011

Mux input for the ST selection

◆ ST_DECODE_100 [1/4]

unsigned { ... } ::ST_DECODE_100

Mux input for the ST selection

◆ ST_DECODE_100 [2/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_s::ST_DECODE_100

Mux input for the ST selection

◆ ST_DECODE_100 [3/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_1_t::ST_DECODE_100

Mux input for the ST selection

◆ ST_DECODE_100 [4/4]

unsigned { ... } ::ST_DECODE_100

Mux input for the ST selection

◆ ST_DECODE_101 [1/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_101

Mux input for the ST selection

◆ ST_DECODE_101 [2/4]

unsigned { ... } ::ST_DECODE_101

Mux input for the ST selection

◆ ST_DECODE_101 [3/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_101

Mux input for the ST selection

◆ ST_DECODE_101 [4/4]

unsigned { ... } ::ST_DECODE_101

Mux input for the ST selection

◆ ST_DECODE_110 [1/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_110

Mux input for the ST selection

◆ ST_DECODE_110 [2/4]

unsigned { ... } ::ST_DECODE_110

Mux input for the ST selection

◆ ST_DECODE_110 [3/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_110

Mux input for the ST selection

◆ ST_DECODE_110 [4/4]

unsigned { ... } ::ST_DECODE_110

Mux input for the ST selection

◆ ST_DECODE_111 [1/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_2_s::ST_DECODE_111

Mux input for the ST selection

◆ ST_DECODE_111 [2/4]

unsigned { ... } ::ST_DECODE_111

Mux input for the ST selection

◆ ST_DECODE_111 [3/4]

unsigned int _ADI_DATAPATH_PP_DECODE_ST_2_t::ST_DECODE_111

Mux input for the ST selection

◆ ST_DECODE_111 [4/4]

unsigned { ... } ::ST_DECODE_111

Mux input for the ST selection

◆ ST_EN_0 [1/4]

unsigned { ... } ::ST_EN_0

Remap value for ST value of 0 from analog

◆ ST_EN_0 [2/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_s::ST_EN_0

Remap value for ST value of 0 from analog

◆ ST_EN_0 [3/4]

unsigned { ... } ::ST_EN_0

Remap value for ST value of 0 from analog

◆ ST_EN_0 [4/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_t::ST_EN_0

Remap value for ST value of 0 from analog

◆ ST_EN_1 [1/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_s::ST_EN_1

Remap value for ST value of 1 from analog

◆ ST_EN_1 [2/4]

unsigned { ... } ::ST_EN_1

Remap value for ST value of 1 from analog

◆ ST_EN_1 [3/4]

unsigned { ... } ::ST_EN_1

Remap value for ST value of 1 from analog

◆ ST_EN_1 [4/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_t::ST_EN_1

Remap value for ST value of 1 from analog

◆ ST_LATCH_ACTIVE_HI [1/4]

unsigned { ... } ::ST_LATCH_ACTIVE_HI

Indicates whether the st latch is active HIGH

◆ ST_LATCH_ACTIVE_HI [2/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_s::ST_LATCH_ACTIVE_HI

Indicates whether the st latch is active HIGH

◆ ST_LATCH_ACTIVE_HI [3/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_ST_t::ST_LATCH_ACTIVE_HI

Indicates whether the st latch is active HIGH

◆ ST_LATCH_ACTIVE_HI [4/4]

unsigned { ... } ::ST_LATCH_ACTIVE_HI

Indicates whether the st latch is active HIGH

◆ START_ADDRESS [1/4]

unsigned int _ADI_DE_REGS_YODA_BINNED1X2_START_s::START_ADDRESS

No description provided

◆ START_ADDRESS [2/4]

unsigned { ... } ::START_ADDRESS

No description provided

◆ START_ADDRESS [3/4]

unsigned int _ADI_DE_REGS_YODA_BINNED1X2_START_t::START_ADDRESS

No description provided

◆ START_ADDRESS [4/4]

unsigned { ... } ::START_ADDRESS

No description provided

◆ START_COLUMN [1/4]

unsigned int _ADI_DATAPATH_ROI_COLUMN_START_s::START_COLUMN

Start column of ROI. Should be a multiple of 16

◆ START_COLUMN [2/4]

unsigned { ... } ::START_COLUMN

Start column of ROI. Should be a multiple of 16

◆ START_COLUMN [3/4]

unsigned { ... } ::START_COLUMN

Start column of ROI. Should be a multiple of 16

◆ START_COLUMN [4/4]

unsigned int _ADI_DATAPATH_ROI_COLUMN_START_t::START_COLUMN

Start column of ROI. Should be a multiple of 16

◆ START_EXEC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::START_EXEC

No description provided

◆ START_EXEC [2/2]

unsigned { ... } ::START_EXEC

No description provided

◆ START_ROW [1/4]

unsigned { ... } ::START_ROW

Start row of ROI. Should be a multiple of 64. Range (0-639)

◆ START_ROW [2/4]

unsigned int _ADI_DATAPATH_ROI_ROW_START_s::START_ROW

Start row of ROI. Should be a multiple of 64. Range (0-639)

◆ START_ROW [3/4]

unsigned int _ADI_DATAPATH_ROI_ROW_START_t::START_ROW

Start row of ROI. Should be a multiple of 64. Range (0-639)

◆ START_ROW [4/4]

unsigned { ... } ::START_ROW

Start row of ROI. Should be a multiple of 64. Range (0-639)

◆ STATIC_CNTRL [1/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_s::STATIC_CNTRL

No description provided

◆ STATIC_CNTRL [2/4]

unsigned { ... } ::STATIC_CNTRL

No description provided

◆ STATIC_CNTRL [3/4]

unsigned int _ADI_DE_REGS_YODA_DE_CONTROL_t::STATIC_CNTRL

No description provided

◆ STATIC_CNTRL [4/4]

unsigned { ... } ::STATIC_CNTRL

No description provided

◆ STOP_EXEC [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::STOP_EXEC

No description provided

◆ STOP_EXEC [2/2]

unsigned { ... } ::STOP_EXEC

No description provided

◆ SYSCTR_AUTORESTART [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_AUTORESTART

No description provided

◆ SYSCTR_AUTORESTART [2/2]

unsigned { ... } ::SYSCTR_AUTORESTART

No description provided

◆ SYSCTR_ESH [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_ESH

No description provided

◆ SYSCTR_ESH [2/2]

unsigned { ... } ::SYSCTR_ESH

No description provided

◆ SYSCTR_FLAG [1/2]

unsigned { ... } ::SYSCTR_FLAG

No description provided

◆ SYSCTR_FLAG [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCSTATUS_t::SYSCTR_FLAG

No description provided

◆ SYSCTR_FREEZE [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_FREEZE

No description provided

◆ SYSCTR_FREEZE [2/2]

unsigned { ... } ::SYSCTR_FREEZE

No description provided

◆ SYSCTR_START [1/2]

unsigned { ... } ::SYSCTR_START

No description provided

◆ SYSCTR_START [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_FSYNCCTRL_t::SYSCTR_START

No description provided

◆ SYSPLL_ACTIVE [1/2]

unsigned { ... } ::SYSPLL_ACTIVE

No description provided

◆ SYSPLL_ACTIVE [2/2]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_ACTIVE

No description provided

◆ SYSPLL_DLPF [1/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_DLPF

No description provided

◆ SYSPLL_DLPF [2/2]

unsigned { ... } ::SYSPLL_DLPF

No description provided

◆ SYSPLL_LOCK_ACC [1/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::SYSPLL_LOCK_ACC

No description provided

◆ SYSPLL_LOCK_ACC [2/2]

unsigned { ... } ::SYSPLL_LOCK_ACC

No description provided

◆ SYSPLL_LOCK_LOST [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_LOCK_LOST

No description provided

◆ SYSPLL_LOCK_LOST [2/2]

unsigned { ... } ::SYSPLL_LOCK_LOST

No description provided

◆ SYSPLL_LX [1/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_LX

No description provided

◆ SYSPLL_LX [2/2]

unsigned { ... } ::SYSPLL_LX

No description provided

◆ SYSPLL_M [1/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_M

No description provided

◆ SYSPLL_M [2/2]

unsigned { ... } ::SYSPLL_M

No description provided

◆ SYSPLL_N [1/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_N

No description provided

◆ SYSPLL_N [2/2]

unsigned { ... } ::SYSPLL_N

No description provided

◆ SYSPLL_P [1/2]

unsigned { ... } ::SYSPLL_P

No description provided

◆ SYSPLL_P [2/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL2_S1_t::SYSPLL_P

No description provided

◆ SYSPLL_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::SYSPLL_PD

No description provided

◆ SYSPLL_PD [2/2]

unsigned { ... } ::SYSPLL_PD

No description provided

◆ SYSPLL_PHASE_LOCK_DELAY [1/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_PHASE_LOCK_DELAY

No description provided

◆ SYSPLL_PHASE_LOCK_DELAY [2/2]

unsigned { ... } ::SYSPLL_PHASE_LOCK_DELAY

No description provided

◆ SYSPLL_PHASE_LOCK_REG [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_STATUS_t::SYSPLL_PHASE_LOCK_REG

No description provided

◆ SYSPLL_PHASE_LOCK_REG [2/2]

unsigned { ... } ::SYSPLL_PHASE_LOCK_REG

No description provided

◆ SYSPLL_QP [1/2]

unsigned { ... } ::SYSPLL_QP

No description provided

◆ SYSPLL_QP [2/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_QP

No description provided

◆ SYSPLL_RESET_LOCK_LOST [1/2]

unsigned int _ADI_AI_REGS_YODA_PLL_CTRL_t::SYSPLL_RESET_LOCK_LOST

No description provided

◆ SYSPLL_RESET_LOCK_LOST [2/2]

unsigned { ... } ::SYSPLL_RESET_LOCK_LOST

No description provided

◆ SYSPLL_RZ [1/2]

unsigned { ... } ::SYSPLL_RZ

No description provided

◆ SYSPLL_RZ [2/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL0_S1_t::SYSPLL_RZ

No description provided

◆ SYSPLL_SPARE [1/2]

unsigned { ... } ::SYSPLL_SPARE

No description provided

◆ SYSPLL_SPARE [2/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::SYSPLL_SPARE

No description provided

◆ SYSPLL_UNLOCK_ACC [1/2]

unsigned int _ADI_AI_REGS_YODA_SYSPLL_CTRL1_S1_t::SYSPLL_UNLOCK_ACC

No description provided

◆ SYSPLL_UNLOCK_ACC [2/2]

unsigned { ... } ::SYSPLL_UNLOCK_ACC

No description provided

◆ TAG_SCALE [1/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_s::TAG_SCALE

Scaling factor for tag wait

◆ TAG_SCALE [2/4]

unsigned { ... } ::TAG_SCALE

Scaling factor for tag wait

◆ TAG_SCALE [3/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_t::TAG_SCALE

Scaling factor for tag wait

◆ TAG_SCALE [4/4]

unsigned { ... } ::TAG_SCALE

Scaling factor for tag wait

◆ TAG_WAIT [1/4]

unsigned { ... } ::TAG_WAIT

Wait time between value change on gt_sel_o signal in number of clock cycles (2-20 clks)

◆ TAG_WAIT [2/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_s::TAG_WAIT

Wait time between value change on gt_sel_o signal in number of clock cycles (2-20 clks)

◆ TAG_WAIT [3/4]

unsigned { ... } ::TAG_WAIT

Wait time between value change on gt_sel_o signal in number of clock cycles (2-20 clks)

◆ TAG_WAIT [4/4]

unsigned int _ADI_DATAPATH_PP_ENCODE_GT_t::TAG_WAIT

Wait time between value change on gt_sel_o signal in number of clock cycles (2-20 clks)

◆ TEMP_SENSOR_DONE_SOURCE [1/2]

unsigned { ... } ::TEMP_SENSOR_DONE_SOURCE

No description provided

◆ TEMP_SENSOR_DONE_SOURCE [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCSOURCE_t::TEMP_SENSOR_DONE_SOURCE

No description provided

◆ TFE [1/2]

unsigned { ... } ::TFE

No description provided

◆ TFE [2/2]

unsigned int _ADI_SPIM_REGS_SR_t::TFE

No description provided

◆ TFNF [1/2]

unsigned { ... } ::TFNF

No description provided

◆ TFNF [2/2]

unsigned int _ADI_SPIM_REGS_SR_t::TFNF

No description provided

◆ TFT [1/2]

unsigned { ... } ::TFT

No description provided

◆ TFT [2/2]

unsigned int _ADI_SPIM_REGS_TXFTLR_t::TFT

No description provided

◆ TIMING_ISSUE_INTR_DP [1/2]

unsigned int _ADI_DATAPATH_INTERRUPT_t::TIMING_ISSUE_INTR_DP

Timing error interrupt seen by the datapath. Reset when datapath is reset

◆ TIMING_ISSUE_INTR_DP [2/2]

unsigned { ... } ::TIMING_ISSUE_INTR_DP

Timing error interrupt seen by the datapath. Reset when datapath is reset

◆ TIMING_ISSUE_INTR_PP [1/2]

unsigned { ... } ::TIMING_ISSUE_INTR_PP

timing error reported by pixel packer. reset when datapath is reset

◆ TIMING_ISSUE_INTR_PP [2/2]

unsigned int _ADI_DATAPATH_INTERRUPT_t::TIMING_ISSUE_INTR_PP

timing error reported by pixel packer. reset when datapath is reset

◆ TMOD [1/2]

unsigned { ... } ::TMOD

No description provided

◆ TMOD [2/2]

unsigned int _ADI_SPIM_REGS_CTRLR0_t::TMOD

No description provided

◆ TOTAL_PACKETS_PER_FRAME [1/4]

unsigned int _ADI_DATAPATH_PACKETS_PER_FRAME_s::TOTAL_PACKETS_PER_FRAME

Indicates the total number of data packets in a MIPI frame

◆ TOTAL_PACKETS_PER_FRAME [2/4]

unsigned { ... } ::TOTAL_PACKETS_PER_FRAME

Indicates the total number of data packets in a MIPI frame

◆ TOTAL_PACKETS_PER_FRAME [3/4]

unsigned int _ADI_DATAPATH_PACKETS_PER_FRAME_t::TOTAL_PACKETS_PER_FRAME

Indicates the total number of data packets in a MIPI frame

◆ TOTAL_PACKETS_PER_FRAME [4/4]

unsigned { ... } ::TOTAL_PACKETS_PER_FRAME

Indicates the total number of data packets in a MIPI frame

◆ TPDPS [1/2]

unsigned int _ADI_EFUSE_TIMING_t::TPDPS

PD to PS setup time

◆ TPDPS [2/2]

unsigned { ... } ::TPDPS

PD to PS setup time

◆ TPGM_PULSE [1/2]

unsigned int _ADI_EFUSE_TIMING_t::TPGM_PULSE

Program STROBE pulse width

◆ TPGM_PULSE [2/2]

unsigned { ... } ::TPGM_PULSE

Program STROBE pulse width

◆ TREAD_PULSE [1/2]

unsigned { ... } ::TREAD_PULSE

Read STROBE pulse width

◆ TREAD_PULSE [2/2]

unsigned int _ADI_EFUSE_TIMING_t::TREAD_PULSE

Read STROBE pulse width

◆ TS_CAL_VER [1/4]

unsigned int _ADI_DATAPATH_TS_CAL_VER_s::TS_CAL_VER

Temperature sensor calibration version

◆ TS_CAL_VER [2/4]

unsigned { ... } ::TS_CAL_VER

Temperature sensor calibration version

◆ TS_CAL_VER [3/4]

unsigned int _ADI_DATAPATH_TS_CAL_VER_t::TS_CAL_VER

Temperature sensor calibration version

◆ TS_CAL_VER [4/4]

unsigned { ... } ::TS_CAL_VER

Temperature sensor calibration version

◆ TS_CALIB_ENABLE [1/2]

unsigned { ... } ::TS_CALIB_ENABLE

No description provided

◆ TS_CALIB_ENABLE [2/2]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_CALIB_ENABLE

No description provided

◆ TS_CALIB_INPUTS [1/2]

unsigned { ... } ::TS_CALIB_INPUTS

No description provided

◆ TS_CALIB_INPUTS [2/2]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_CALIB_INPUTS

No description provided

◆ TS_EOC_REG [1/2]

unsigned { ... } ::TS_EOC_REG

No description provided

◆ TS_EOC_REG [2/2]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_t::TS_EOC_REG

No description provided

◆ TS_FREQ_SELECT [1/2]

unsigned { ... } ::TS_FREQ_SELECT

No description provided

◆ TS_FREQ_SELECT [2/2]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_FREQ_SELECT

No description provided

◆ TS_FSADJ [1/2]

unsigned { ... } ::TS_FSADJ

No description provided

◆ TS_FSADJ [2/2]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_S1_t::TS_FSADJ

No description provided

◆ TS_INIT_LOGIC [1/2]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_t::TS_INIT_LOGIC

No description provided

◆ TS_INIT_LOGIC [2/2]

unsigned { ... } ::TS_INIT_LOGIC

No description provided

◆ TS_OVRFL_REG [1/2]

unsigned int _ADI_AI_REGS_YODA_TS_DATA_t::TS_OVRFL_REG

No description provided

◆ TS_OVRFL_REG [2/2]

unsigned { ... } ::TS_OVRFL_REG

No description provided

◆ TS_PD [1/2]

unsigned { ... } ::TS_PD

No description provided

◆ TS_PD [2/2]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_t::TS_PD

No description provided

◆ TS_Q_REG [1/2]

unsigned { ... } ::TS_Q_REG

No description provided

◆ TS_Q_REG [2/2]

unsigned int _ADI_AI_REGS_YODA_TS_DATA_t::TS_Q_REG

No description provided

◆ TS_RST [1/2]

unsigned { ... } ::TS_RST

No description provided

◆ TS_RST [2/2]

unsigned int _ADI_AI_REGS_YODA_TS_CTRL_t::TS_RST

No description provided

◆ TS_SOC_CAL [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_1_t::TS_SOC_CAL

No description provided

◆ TS_SOC_CAL [2/2]

unsigned { ... } ::TS_SOC_CAL

No description provided

◆ TS_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SERIAL_SPARE_0_t::TS_SPARE

No description provided

◆ TS_SPARE [2/2]

unsigned { ... } ::TS_SPARE

No description provided

◆ TUNIT [1/2]

unsigned { ... } ::TUNIT

Efuse timing diagram step size

◆ TUNIT [2/2]

unsigned int _ADI_EFUSE_TIMING_t::TUNIT

Efuse timing diagram step size

◆ TXEIM [1/2]

unsigned { ... } ::TXEIM

No description provided

◆ TXEIM [2/2]

unsigned int _ADI_SPIM_REGS_IMR_t::TXEIM

No description provided

◆ TXEIR [1/2]

unsigned { ... } ::TXEIR

No description provided

◆ TXEIR [2/2]

unsigned int _ADI_SPIM_REGS_RISR_t::TXEIR

No description provided

◆ TXEIS [1/2]

unsigned int _ADI_SPIM_REGS_ISR_t::TXEIS

No description provided

◆ TXEIS [2/2]

unsigned { ... } ::TXEIS

No description provided

◆ TXOICR [1/2]

unsigned int _ADI_SPIM_REGS_TXOICR_t::TXOICR

No description provided

◆ TXOICR [2/2]

unsigned { ... } ::TXOICR

No description provided

◆ TXOIM [1/2]

unsigned int _ADI_SPIM_REGS_IMR_t::TXOIM

No description provided

◆ TXOIM [2/2]

unsigned { ... } ::TXOIM

No description provided

◆ TXOIR [1/2]

unsigned { ... } ::TXOIR

No description provided

◆ TXOIR [2/2]

unsigned int _ADI_SPIM_REGS_RISR_t::TXOIR

No description provided

◆ TXOIS [1/2]

unsigned { ... } ::TXOIS

No description provided

◆ TXOIS [2/2]

unsigned int _ADI_SPIM_REGS_ISR_t::TXOIS

No description provided

◆ TXTFL [1/2]

unsigned { ... } ::TXTFL

No description provided

◆ TXTFL [2/2]

unsigned int _ADI_SPIM_REGS_TXFLR_t::TXTFL

No description provided

◆ ULPS_ACTIVE [1/2]

unsigned { ... } ::ULPS_ACTIVE

No description provided

◆ ULPS_ACTIVE [2/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ACTIVE_t::ULPS_ACTIVE

No description provided

◆ ULPS_CLK_ACTIVE [1/2]

unsigned { ... } ::ULPS_CLK_ACTIVE

No description provided

◆ ULPS_CLK_ACTIVE [2/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ACTIVE_t::ULPS_CLK_ACTIVE

No description provided

◆ ULPS_CLK_ENABLE [1/2]

unsigned { ... } ::ULPS_CLK_ENABLE

No description provided

◆ ULPS_CLK_ENABLE [2/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_CLK_ENABLE_t::ULPS_CLK_ENABLE

No description provided

◆ ULPS_ENABLE [1/2]

unsigned { ... } ::ULPS_ENABLE

No description provided

◆ ULPS_ENABLE [2/2]

unsigned int _ADI_CSI2_REGSPEC_TOP_CPU0_CSI2_TX_BASE_ULPS_ENABLE_t::ULPS_ENABLE

No description provided

◆ UPDATE_MAPRAM [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_MAPRAM

No description provided

◆ UPDATE_MAPRAM [2/2]

unsigned { ... } ::UPDATE_MAPRAM

No description provided

◆ UPDATE_SEQRAM [1/2]

unsigned { ... } ::UPDATE_SEQRAM

No description provided

◆ UPDATE_SEQRAM [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_SEQRAM

No description provided

◆ UPDATE_STAMP [1/2]

unsigned { ... } ::UPDATE_STAMP

No description provided

◆ UPDATE_STAMP [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_UPDATESTAMP_t::UPDATE_STAMP

No description provided

◆ UPDATE_WAVERAM [1/2]

unsigned { ... } ::UPDATE_WAVERAM

No description provided

◆ UPDATE_WAVERAM [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQCONTROLREGISTER_t::UPDATE_WAVERAM

No description provided

◆ USEQ_FW_VERSION_LSB [1/4]

unsigned int _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_s::USEQ_FW_VERSION_LSB

LSB bits of micro-sequencer FW version

◆ USEQ_FW_VERSION_LSB [2/4]

unsigned { ... } ::USEQ_FW_VERSION_LSB

LSB bits of micro-sequencer FW version

◆ USEQ_FW_VERSION_LSB [3/4]

unsigned int _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_LSB_t::USEQ_FW_VERSION_LSB

LSB bits of micro-sequencer FW version

◆ USEQ_FW_VERSION_LSB [4/4]

unsigned { ... } ::USEQ_FW_VERSION_LSB

LSB bits of micro-sequencer FW version

◆ USEQ_FW_VERSION_MSB [1/4]

unsigned int _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_s::USEQ_FW_VERSION_MSB

MSB bits of micro-sequencer FW version

◆ USEQ_FW_VERSION_MSB [2/4]

unsigned { ... } ::USEQ_FW_VERSION_MSB

MSB bits of micro-sequencer FW version

◆ USEQ_FW_VERSION_MSB [3/4]

unsigned { ... } ::USEQ_FW_VERSION_MSB

MSB bits of micro-sequencer FW version

◆ USEQ_FW_VERSION_MSB [4/4]

unsigned int _ADI_DATAPATH_MICRO_SEQUENCER_FW_VERSION_MSB_t::USEQ_FW_VERSION_MSB

MSB bits of micro-sequencer FW version

◆ USEQ_RAM_RD_DATA [1/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_s::USEQ_RAM_RD_DATA

No description provided

◆ USEQ_RAM_RD_DATA [2/4]

unsigned { ... } ::USEQ_RAM_RD_DATA

No description provided

◆ USEQ_RAM_RD_DATA [3/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDDATA_t::USEQ_RAM_RD_DATA

No description provided

◆ USEQ_RAM_RD_DATA [4/4]

unsigned { ... } ::USEQ_RAM_RD_DATA

No description provided

◆ USEQ_RAM_RD_DATA_ALIAS [1/4]

unsigned { ... } ::USEQ_RAM_RD_DATA_ALIAS

No description provided

◆ USEQ_RAM_RD_DATA_ALIAS [2/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_s::USEQ_RAM_RD_DATA_ALIAS

No description provided

◆ USEQ_RAM_RD_DATA_ALIAS [3/4]

unsigned { ... } ::USEQ_RAM_RD_DATA_ALIAS

No description provided

◆ USEQ_RAM_RD_DATA_ALIAS [4/4]

unsigned int _ADI_USEQ_REGS_MAP1_USEQRAMRDDATAALIAS_t::USEQ_RAM_RD_DATA_ALIAS

No description provided

◆ USEQERRJUMPADDR [1/2]

unsigned { ... } ::USEQERRJUMPADDR

No description provided

◆ USEQERRJUMPADDR [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRJMPADDR_t::USEQERRJUMPADDR

No description provided

◆ USER_DEFINED_ERREN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_STOPERRENA_t::USER_DEFINED_ERREN

No description provided

◆ USER_DEFINED_ERREN [2/2]

unsigned { ... } ::USER_DEFINED_ERREN

No description provided

◆ USER_DEFINED_ERROR [1/2]

unsigned { ... } ::USER_DEFINED_ERROR

No description provided

◆ USER_DEFINED_ERROR [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_ERRORSTATUS_t::USER_DEFINED_ERROR

No description provided

◆ VALUE_0_0 [1/2]

unsigned int _ADI_SS_REGS_SSVALUE_00_t::VALUE_0_0

No description provided

◆ VALUE_0_0 [2/2]

unsigned { ... } ::VALUE_0_0

No description provided

◆ VALUE_0_1 [1/2]

unsigned { ... } ::VALUE_0_1

No description provided

◆ VALUE_0_1 [2/2]

unsigned int _ADI_SS_REGS_SSVALUE_01_t::VALUE_0_1

No description provided

◆ VALUE_1_0 [1/2]

unsigned { ... } ::VALUE_1_0

No description provided

◆ VALUE_1_0 [2/2]

unsigned int _ADI_SS_REGS_SSVALUE_10_t::VALUE_1_0

No description provided

◆ VALUE_1_1 [1/2]

unsigned { ... } ::VALUE_1_1

No description provided

◆ VALUE_1_1 [2/2]

unsigned int _ADI_SS_REGS_SSVALUE_11_t::VALUE_1_1

No description provided

◆ VALUE_2_0 [1/2]

unsigned { ... } ::VALUE_2_0

No description provided

◆ VALUE_2_0 [2/2]

unsigned int _ADI_SS_REGS_SSVALUE_20_t::VALUE_2_0

No description provided

◆ VALUE_2_1 [1/2]

unsigned int _ADI_SS_REGS_SSVALUE_21_t::VALUE_2_1

No description provided

◆ VALUE_2_1 [2/2]

unsigned { ... } ::VALUE_2_1

No description provided

◆ VALUE_3_0 [1/2]

unsigned int _ADI_SS_REGS_SSVALUE_30_t::VALUE_3_0

No description provided

◆ VALUE_3_0 [2/2]

unsigned { ... } ::VALUE_3_0

No description provided

◆ VALUE_3_1 [1/2]

unsigned { ... } ::VALUE_3_1

No description provided

◆ VALUE_3_1 [2/2]

unsigned int _ADI_SS_REGS_SSVALUE_31_t::VALUE_3_1

No description provided

◆ VLOW_CTR_RD [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RD

No description provided

◆ VLOW_CTR_RD [2/2]

unsigned { ... } ::VLOW_CTR_RD

No description provided

◆ VLOW_CTR_RD_RDY [1/2]

unsigned { ... } ::VLOW_CTR_RD_RDY

No description provided

◆ VLOW_CTR_RD_RDY [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RD_RDY

No description provided

◆ VLOW_CTR_RESET [1/2]

unsigned { ... } ::VLOW_CTR_RESET

No description provided

◆ VLOW_CTR_RESET [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHOCTRL3_t::VLOW_CTR_RESET

No description provided

◆ VLOW_EVENT_CTR [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VLOW_EVENT_CTR

No description provided

◆ VLOW_EVENT_CTR [2/2]

unsigned { ... } ::VLOW_EVENT_CTR

No description provided

◆ VLOW_GMPS2X [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOW_GMPS2X

No description provided

◆ VLOW_GMPS2X [2/2]

unsigned { ... } ::VLOW_GMPS2X

No description provided

◆ VLOW_HITIME_CTR [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHOCTRL2_t::VLOW_HITIME_CTR

No description provided

◆ VLOW_HITIME_CTR [2/2]

unsigned { ... } ::VLOW_HITIME_CTR

No description provided

◆ VLOW_IC_START [1/2]

unsigned { ... } ::VLOW_IC_START

No description provided

◆ VLOW_IC_START [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VLOW_IC_START

No description provided

◆ VLOW_IGNORE_CNT [1/2]

unsigned { ... } ::VLOW_IGNORE_CNT

No description provided

◆ VLOW_IGNORE_CNT [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHOCTRL1_t::VLOW_IGNORE_CNT

No description provided

◆ VLOW_LIN_EN [1/2]

unsigned { ... } ::VLOW_LIN_EN

No description provided

◆ VLOW_LIN_EN [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOW_LIN_EN

No description provided

◆ VLOW_LIN_PD [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOW_LIN_PD

No description provided

◆ VLOW_LIN_PD [2/2]

unsigned { ... } ::VLOW_LIN_PD

No description provided

◆ VLOW_LIN_VADJ [1/2]

unsigned { ... } ::VLOW_LIN_VADJ

No description provided

◆ VLOW_LIN_VADJ [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VLOW_LIN_VADJ

No description provided

◆ VLOW_SHO_DETECT [1/2]

unsigned { ... } ::VLOW_SHO_DETECT

No description provided

◆ VLOW_SHO_DETECT [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWSHODETECT_t::VLOW_SHO_DETECT

No description provided

◆ VLOW_SPARE [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOW_SPARE

No description provided

◆ VLOW_SPARE [2/2]

unsigned { ... } ::VLOW_SPARE

No description provided

◆ VLOW_SW_VADJ [1/2]

unsigned { ... } ::VLOW_SW_VADJ

No description provided

◆ VLOW_SW_VADJ [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL4_S2_t::VLOW_SW_VADJ

No description provided

◆ VLOWCLKHICNT [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VLOWCLKHICNT

No description provided

◆ VLOWCLKHICNT [2/2]

unsigned { ... } ::VLOWCLKHICNT

No description provided

◆ VLOWCLKLOCNT [1/2]

unsigned { ... } ::VLOWCLKLOCNT

No description provided

◆ VLOWCLKLOCNT [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL2_S2_t::VLOWCLKLOCNT

No description provided

◆ VLOWENABLECTRL [1/2]

unsigned { ... } ::VLOWENABLECTRL

No description provided

◆ VLOWENABLECTRL [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWENABLE_t::VLOWENABLECTRL

No description provided

◆ VLOWMISCCTRL [1/2]

unsigned { ... } ::VLOWMISCCTRL

No description provided

◆ VLOWMISCCTRL [2/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL1_S2_t::VLOWMISCCTRL

No description provided

◆ VLOWSETPOINTCTRL [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL0_S2_t::VLOWSETPOINTCTRL

No description provided

◆ VLOWSETPOINTCTRL [2/2]

unsigned { ... } ::VLOWSETPOINTCTRL

No description provided

◆ VREGMISCCTRL [1/2]

unsigned int _ADI_AI_REGS_YODA_VLOWREGCTRL3_S2_t::VREGMISCCTRL

No description provided

◆ VREGMISCCTRL [2/2]

unsigned { ... } ::VREGMISCCTRL

No description provided

◆ WAIT_FOR_SYNC_POL [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_WAITFORSYNCPOLARITY_t::WAIT_FOR_SYNC_POL

No description provided

◆ WAIT_FOR_SYNC_POL [2/2]

unsigned { ... } ::WAIT_FOR_SYNC_POL

No description provided

◆ WAVE_AMPLITUDE [1/2]

unsigned int _ADI_SS_REGS_SSWAVEAMP_t::WAVE_AMPLITUDE

No description provided

◆ WAVE_AMPLITUDE [2/2]

unsigned { ... } ::WAVE_AMPLITUDE

No description provided

◆ WAVE_FREQ [1/2]

unsigned int _ADI_SS_REGS_SSWAVEFREQ_t::WAVE_FREQ

No description provided

◆ WAVE_FREQ [2/2]

unsigned { ... } ::WAVE_FREQ

No description provided

◆ WAVE_OFFSET [1/2]

unsigned { ... } ::WAVE_OFFSET

No description provided

◆ WAVE_OFFSET [2/2]

unsigned int _ADI_SS_REGS_SSWAVEOFFSET_t::WAVE_OFFSET

No description provided

◆ WAVE_PERIOD [1/2]

unsigned int _ADI_SS_REGS_SSWAVEPERIOD_t::WAVE_PERIOD

No description provided

◆ WAVE_PERIOD [2/2]

unsigned { ... } ::WAVE_PERIOD

No description provided

◆ WAVERAM_DST [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::WAVERAM_DST

WaveRAM DST (Disable Self Timing) Register

◆ WAVERAM_DST [2/2]

unsigned { ... } ::WAVERAM_DST

WaveRAM DST (Disable Self Timing) Register

◆ WAVERAM_MARGIN [1/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_DFT_t::WAVERAM_MARGIN

WaveRAM Margin

◆ WAVERAM_MARGIN [2/2]

unsigned { ... } ::WAVERAM_MARGIN

WaveRAM Margin

◆ WAVERAM_PARITY_ERR [1/2]

unsigned { ... } ::WAVERAM_PARITY_ERR

Parity error in wave RAM

◆ WAVERAM_PARITY_ERR [2/2]

unsigned int _ADI_USEQ_REGS_MAP1_USEQ_PARITY_t::WAVERAM_PARITY_ERR

Parity error in wave RAM

◆ WTYPE [1/2]

unsigned int _ADI_SS_REGS_SSCTRL_t::WTYPE

No description provided

◆ WTYPE [2/2]

unsigned { ... } ::WTYPE

No description provided

◆ XA [1/2]

unsigned { ... } ::XA

No description provided

◆ XA [2/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_0_t::XA

No description provided

◆ XAGCOFF [1/2]

unsigned { ... } ::XAGCOFF

No description provided

◆ XAGCOFF [2/2]

unsigned int _ADI_AI_REGS_YODA_ANA_SPARE_0_t::XAGCOFF

No description provided

◆ XIDLE_HOST [1/2]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST

No description provided

◆ XIDLE_HOST [2/2]

unsigned { ... } ::XIDLE_HOST

No description provided

◆ XIDLE_HOST_CLEAR [1/2]

unsigned { ... } ::XIDLE_HOST_CLEAR

No description provided

◆ XIDLE_HOST_CLEAR [2/2]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST_CLEAR

No description provided

◆ XIDLE_HOST_SET [1/2]

unsigned { ... } ::XIDLE_HOST_SET

No description provided

◆ XIDLE_HOST_SET [2/2]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_HOST_SET

No description provided

◆ XIDLE_YEATS [1/2]

unsigned { ... } ::XIDLE_YEATS

No description provided

◆ XIDLE_YEATS [2/2]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS

No description provided

◆ XIDLE_YEATS_CLEAR [1/2]

unsigned { ... } ::XIDLE_YEATS_CLEAR

No description provided

◆ XIDLE_YEATS_CLEAR [2/2]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS_CLEAR

No description provided

◆ XIDLE_YEATS_SET [1/2]

unsigned int _ADI_AI_REGS_YODA_XOSC_CTRL_t::XIDLE_YEATS_SET

No description provided

◆ XIDLE_YEATS_SET [2/2]

unsigned { ... } ::XIDLE_YEATS_SET

No description provided